Closed stephenhensley closed 4 years ago
I also added MPU files to mark the SDRAM as cached, and the sram starting at 0x30000000
as non-cached (for DMA buffers), but because the linker script doesn't have that RAM region defined we still can't enable the DCache without adding cache maintenance to the SAI callback.
I'm looking into making an update on the STM32Duino variant to fix this, or add a custom linker, but that will be in a later update.
Ability to use SDRAM has been added.
Currently only bss is used for SDRAM, which means no initialized data can be loaded there. Usage works as follows: