It made me confused initially since there are already multiple ways that pins are addressed in the patch sm schema (e.g. CV_1 vs C5 vs SIG_KNOB1) and I was getting the hang of how the naming works. (in this case, I thought maybe PIN_PATCH_SM_CV_5 is another way of addressing CV_1 or something)
This is a very minor change in the comments.
It made me confused initially since there are already multiple ways that pins are addressed in the patch sm schema (e.g. CV_1 vs C5 vs SIG_KNOB1) and I was getting the hang of how the naming works. (in this case, I thought maybe PIN_PATCH_SM_CV_5 is another way of addressing CV_1 or something)