The CPU’s SMI interface is used to access the device’s registers but it
cannot be used until the device’s INTn pin becomes active low (indicating
the Register Loader is done processing the EEPROM or that no EEPROM
was present).
(although this may not be a problem since MMC attaches PS to switch, so it can do so only after INTn is low)
But it has access to MDIO through IC59.
(although this may not be a problem since MMC attaches PS to switch, so it can do so only after INTn is low)