Tests [version 1.0] - Githubissues

atcher0 commented 5 years ago

Tests

Power Supply

[x] Power supply Tested: voltage levels + PG + LEDs

IC

NOTE: I2C CLK: 100 kHz; SPI CLK: 5 MHz

[x] EEPROM (24AA64T) TESTED: read, write
[x] AD7291 (ADC - voltage monitor) TESTED: temperature and voltage measurements
[x] AD9234 (ADC) TESTED: [4/8] GT LINKS @ 10 Gbps, PRBS31; JESD204B link
[ ] AD9528 (CLK) TESTED: PLL2 LOCK; clock and sysref generation
[x] MAX5442 (offset correction DAC)

ADC analog input

[x] Offset correction ( +/-5 V) NOTE: Measured range: <- 4.83 V; 4.86 V>
[x] Gain steps (+/-50 mV, +/-0.5 V, +/-5 V)
[x] Linearity
[x] FFT analysis
[x] Bandwidth

Others

[x] Trigger
[x] LEDs

atcher0 commented 4 years ago

f_in = 10 MHz

adc_linearity_10MHz_50mV adc_linearity_10MHz_0 5V adc_linearity_10MHz_5V

atcher0 commented 4 years ago

fft_10MHz_0 5V_32000_3 fft_10MHz_5V_32000_3 fft_10MHz_50mV_32000_3

gkasprow commented 4 years ago

What generator did you use? Is it DDS? It may have a lot of harmonics.

atcher0 commented 4 years ago

Keysight 33621A

gkasprow commented 4 years ago

Yes. I have a much better one at the WUT, SMB100A which has much lower phase noise and harmonics. It's also good to connect LPF before to reduce them. Bring the stuff to WUT for characterisation

atcher0 commented 4 years ago

Yes, SMB100A is much better. I will come on Thursday.

atcher0 commented 4 years ago

I repeated my measurements using SMB100A generator and LP (SLP-15+; DC to 15 MHz) filter. Here are the results: fft_ch3_10MHz_500mV_0 85Vpp_32000 fft_ch3_10MHz_5000mV_8 5Vpp_32000_2 fft_ch3_10MHz_50mV_0 085Vpp_32000