SCH & PCB review

[gkasprow]

• [x] missing ESD strips
• [x] missing DIOT power sequencing circuit
• [x] move 0R resistors closer to EEM connector to minimize stubs
• [x] get rid of ERC errors
• [x] missing Power_Stage schematic file
• [x] Add power, Overtemp and some user LEDs to the front panel
• [x] change nets LVDSx to LVDS_DRVx
• [x] make C46,47,50,51 1nF
• [x] missing front panel mounting holes

[gkasprow]

• [x] use 1% resistors, no need to use expensive 0.1% ones
• [x] add SERVMOD pulldown control (MOSFET at R7)
• [x] the power stage needs to have common mode voltage at 3V. DAC generates 0-2.048V so common voltage is 1V. It is then doubled by U1B, but additional offset is needed. Look how it's done in Magneto

[zdun8]

Initial routing is done. DRC passed. Please review.