design review

[gkasprow]

SCH:

• [ ] add .gitignore

• [x] add IDC connector with power supply status

• [x] that thing won't work: the MCP has open drain, connect button to its output, VDD to 3V3 and passive network is not needed

• [x] the power supply chip already generates PG signal that can be used to reset the SOM as in the original design

• [x] such thing is hard to read, just route individual GPIOs without harnesses

• [x] #3

• [x] connect SFP I2C to SoM. We need to report the optical power and configure SFP between SGMII/1000base-x mode

• [x] use WUT schematic template everywhere:

• [x] #6

• [x] add series 1k resistors between FPGA and SoM to prevent from latchup

• [x] #11

• [x] #5

• [x] #7

• [x] #10

• [x] use native SOM GPIO numbers; for the moment we have twice GPIO0...3; route the GPIOs as single wires; add FPGA GPIOs as text comment.

• [x] use P3V3 from SPEC-A7 connector to enable MPM converter

• [x] #4

• [x] pls add SD card connector, we will need it for development purposes; USB may be occupied with SPEC USB debug port

• [x] spelling Consol -> Console

PCB:

• [ ] place the power unit status header somewhere here
• [ ] add pinout of I2C and UART headers
• [ ] add board name and WUT logo, date and revision

[gkasprow]

PCB:

• [ ] follow datasheet of SOM with vias tenting; copy the footprint from K700-178 design

• [ ] replace SOM and other libs with CERN symbols and footprints
• [ ] use single footprint instead of primitives for SOM!

[gkasprow]

• [x] use one of supported OpenOCD jtag adapters, for the moment Xilinx JTAG connector is used; maybe switch to the pin header used on Ka-Ro boards

[gkasprow]

there is conflict with enclosure The 2.54 connectors are too high, the RJ45 will hit the wall Use lower profile connectors, for the moment elevated ones are used with no reason