The half transfer irq needs to be enabled in order for the hardware to notify the waker when the transfer is at half. This is needed to ensure no overuns occur when using ReadableDmaRingBuffer's read_exact. Otherwise we are only notified when the DMA has completed its cycle and is on its way to start overwriting the data. The docs in the dma_bdma buf module also seem to imply that the half transfer irq must be enabled for proper operation. The only consumers of the ReadableDmaRingBuffer api are the sai module and the RingBufferedUartRx. The former enables the irq manually when constructing the transfer options while the latter does not. This may also be the cause for #1441.
The half transfer irq needs to be enabled in order for the hardware to notify the waker when the transfer is at half. This is needed to ensure no overuns occur when using
ReadableDmaRingBuffer'sread_exact. Otherwise we are only notified when the DMA has completed its cycle and is on its way to start overwriting the data. The docs in the dma_bdma buf module also seem to imply that the half transfer irq must be enabled for proper operation. The only consumers of theReadableDmaRingBufferapi are the sai module and theRingBufferedUartRx. The former enables the irq manually when constructing the transfer options while the latter does not. This may also be the cause for #1441.