Flash interrupt with STM32F7 only triggering once

[dpl0]

Hi everyone!

We're trying to set up an interrupt for flash programming with a Nucleo-f767zi, to be triggered when when the flash has finished writing (the BSY bit is cleared). So far we've managed to make it work, but it only triggers once.

For now, we're trying the following:

• • Unmask the flash interrupt in the NVIC (using cortex-m).
• • Unlock the flash.
• • Write in the cr register and enable the EOPIE (End Of Operation Interrupt Enable).
• • Erase the flash. (This should trigger and exception interrupt and run the ISR, and it does).
• • Write to the flash. (This also should trigger an interrupt, and run the ISR, but it only triggers the interrupt).

We know the interrupt is triggered because we are checking via a print.

• The first interrupt fires and prints as expected.
• When the write finished, we print and it works, but the ISR is not called.
• We can see that the exception is pending though. (via cortex-m::NVIC::is_pending(embassy_stm32::pac::Interrupt::FLASH);).
• We can also see that the EOP bit (end of operation) is set to 1 after both erase and write, as expected.

Is there something we're missing? All the help is appreciated. Thanks for the help!!

[chemicstry]

I'm not sure if still relevant, but you could check my PR for F4 async flash: https://github.com/embassy-rs/embassy/pull/870

I remember having similar behavior as yours, when I had separate enable_irq() and disable_irq() functions, which set the EOPIE and ERRIE bits. Once I moved them together with with setting PG bit the problem disappeared. It could have been just a coincidence, but worth checking.