ceekdee
commented
1 year ago Test procedure:
- clone (or sync for the newest updates) rust-lorawan, embassy, and lora from the ceekdee github repo into the same project folder (denoted as ??? below) so the relative paths in embassy Cargo.toml files work;
- add the following at the end of ???/embassy/examples/stm32wl/Cargo.toml: [profile.release] debug = 2
- update ???/embassy/examples/stm32wl/src/bin/lora_lorawan.rs for region, deveui, appeui, and appkey (and maybe data rate). Note that there is also a lorawan.rs example, which is not pertinent here.
- hook up your stm32wl to your computer's USB port;
- within a terminal: cd ???/embassy/examples/stm32wl clear; DEFMT_LOG=info cargo run --bin lora_lorawan --release
- capture the logs and paste to a comment here (if the join write buffer or any other write/read buffers contain sensitive information, consider removing that before pasting here).
A trace is given below of stm32wl example lora_lorawan.rs, which is expected to fail here because there is no LoRaWAN gateway with which to communicate. However, the trace does show the setup for chip initialization and transmit/receive operations.
There does not appear to be anything remarkable in the trace, but one thing to verify against The Things Network is that it responds with IQ inverted packets to the join request. The trace does not include pin manipulations (for example, for RF switch settings). It traces write/read operations.
` ---- LoRa chip initialization start ----
0.001617 INFO write: 0x[c0, 0] GetStatus - awake Sx1262
0.001861 INFO write: 0x[80, 0] SetStandby
0.002105 INFO write: 0x[8a, 1] SetPacketType LoRa
0.002380 INFO write: 0x[d, 7, 40, 34, 44] WriteRegister LoRaSyncword LORA_MAC_PUBLIC_SYNCWORD
0.002685 INFO write: 0x[97, 1, 0, 2, 80] SetTCXOMode Ctrl1V7, board wakeup timeout
0.002990 INFO write: 0x[96, 1] SetRegulatorMode UseDCDC
0.003234 INFO write: 0x[8f, 0, 0] SetBufferBaseAddress 0 0
0.003540 INFO write: 0x[1d, 8, d8, 0] ReadRegister TxClampCfg 0.003784 INFO read 1: 0x[de] 0.004058 INFO write: 0x[d, 8, d8, de] WriteRegister TxClampCfg
0.004364 INFO write: 0x[95, 4, 7, 0, 1] SetPAConfig pa_duty_cycle, hp_max, device_sel, pa_lut
0.004669 INFO write: 0x[8e, 0, 4] SetTxParams power, ramp_time (set low during chip initialization)
0.004943 INFO write: 0x[8, ff, ff, ff, ff, 0, 0, 0, 0] CfgDIOIrq all
0.005432 INFO write: 0x[1d, 2, 9f, 0] ReadRegister RetentionList (add RxGain and TxModulation to retention list) 0.005676 INFO read 9: 0x[0, 1c, 4c, d4, 87, c2, bc, 3b, 85] 0.006134 INFO write: 0x[d, 2, 9f] 0x[1, 8, ac, d4, 87, c2, bc, 3b, 85] WriteRegister RetentionList 0.006774 INFO write: 0x[1d, 2, 9f, 0] ReadRegister RetentionList 0.006988 INFO read 9: 0x[1, 8, ac, d4, 87, c2, bc, 3b, 85] 0.007446 INFO write: 0x[d, 2, 9f] 0x[2, 8, ac, 8, 89, c2, bc, 3b, 85] WriteRegister
---- LoRa chip initialization end ----
0.060699 INFO Joining LoRaWAN network
0.062683 INFO write: 0x[8b, c, 4, 1, 1] SetModulationParams spreading_factor, bandwidth_val, coding_rate_val, low_data_rate_optimize
0.063018 INFO write: 0x[1d, 8, 89, 0] ReadRegister TxModulation 0.063232 INFO read 1: 0x[25] 0.063507 INFO write: 0x[d, 8, 89, 25] WriteRegister TxModulation
0.063842 INFO write: 0x[1d, 8, d8, 0] ReadRegister TxClampCfg 0.064086 INFO read 1: 0x[fe] 0.064361 INFO write: 0x[d, 8, d8, fe] WriteRegister TxClampCfg
0.064666 INFO write: 0x[95, 2, 2, 0, 1] SetPAConfig pa_duty_cycle, hp_max, device_sel, pa_lut
0.064971 INFO write: 0x[8e, 16, 2] SetTxParams power, ramp_time
0.065277 INFO write: 0x[8c, 0, 8, 0, 17, 1, 0] SetPacketParams preamble_length (8 here), implicit_header, payload_length, crc_on, iq_inverted
0.078369 INFO write: 0x[98, d7, db] CalibrateImage - values depend on frequency: see calibrate_image()
0.078735 INFO write: 0x[86, 36, 41, 99, 9a] SetRFFrequency - see set_channel() for value
0.079162 INFO write: 0x[e, 0] 0x[join request buffer elided] WriteBuffer with join request
0.079742 INFO write: 0x[8, 2, 1, 2, 1, 0, 0, 0, 0] CfgDIOIrq TxDone and RxTxTimeout
0.091461 INFO write: 0x[83, ff, ff, ff] SetTx no timeout
0.091766 INFO process_irq loop entered
1.573455 INFO write: 0x[12] GetIrqStatus 1.573638 INFO read 2 status 0xac: 0x[0, 1] TxDone 1.573974 INFO write: 0x[2, 0, 1] ClrIrqStatus 1.574188 INFO process_irq satisfied: irq_flags = 1
6.571472 INFO write: 0x[80, 0] SetStandby
6.571807 INFO write: 0x[8b, c, 4, 1, 1] SetModulationParams SetModulationParams spreading_factor, bandwidth_val, coding_rate_val, low_data_rate_optimize
6.572143 INFO write: 0x[1d, 8, 89, 0] ReadRegister TxModulation 6.572387 INFO read 1: 0x[24] 6.572662 INFO write: 0x[d, 8, 89, 24] WriteRegister TxModulation
6.572998 INFO write: 0x[8c, 0, 8, 0, 0, 1, 1] SetPacketParams preamble_length (8 here), implicit_header, payload_length, crc_on, iq_inverted (IQ INVERTED SET)
6.573425 INFO write: 0x[86, 36, 41, 99, 9a] SetRFFrequency - see set_channel() for value
6.573760 INFO write: 0x[8, ff, ff, ff, ff, 0, 0, 0, 0] CfgDIOIrq all
6.574127 INFO write: 0x[9f, 0] SetStopRxTimerOnPreamble false
6.574371 INFO write: 0x[a0, 0] SetLoRaSymbTimeout 0 since rx continuous used
6.574676 INFO write: 0x[1d, 7, 36, 0] ReadRegister IQPolarity 6.574920 INFO read 1: 0x[9] 6.575195 INFO write: 0x[d, 7, 36, 9] WriteRegister IQPolarity
6.575500 INFO write: 0x[d, 8, ac, 94] WriteRegister RxGain - see do_rx() for value
6.587219 INFO write: 0x[82, ff, ff, ff] SetRx rx continuous without timeout
6.587463 INFO process_irq loop entered
6.587707 INFO write: 0x[12] GetIrqStatus unproductive interrupt 6.587921 INFO read 2 status 0xd2: 0x[0, 0] 6.588226 INFO write: 0x[2, 0, 0] ClrIrqStatus 6.588439 INFO process_irq satisfied: irq_flags = 0
6.588592 INFO process_irq loop entered
7.571563 INFO write: 0x[80, 0] SetStandby - this must have happened due to a timeout in rust-lorawan, since lora is still in the irq loop, try again as above
7.571929 INFO write: 0x[8b, c, 4, 1, 1] SetModulationParams
7.572265 INFO write: 0x[1d, 8, 89, 0] ReadRegister TxModulation 7.572509 INFO read 1: 0x[24] 7.572784 INFO write: 0x[d, 8, 89, 24] WriteRegister TxModulation
7.573120 INFO write: 0x[8c, 0, 8, 0, 0, 1, 1] SetPacketParams
7.573516 INFO write: 0x[86, 36, 58, 66, 66] SetRFFrequency
7.573883 INFO write: 0x[8, ff, ff, ff, ff, 0, 0, 0, 0] CfgDIOIrq
7.574249 INFO write: 0x[9f, 0] SetStopRxTimerOnPreamble
7.574493 INFO write: 0x[a0, 0] SetLoRaSymbTimeout
7.574768 INFO write: 0x[1d, 7, 36, 0] ReadRegister IQPolarity 7.575012 INFO read 1: 0x[9] 7.575286 INFO write: 0x[d, 7, 36, 9] WriteRegister IQPolarity
7.575592 INFO write: 0x[d, 8, ac, 94] WriteRegister RxGain
7.587310 INFO write: 0x[82, ff, ff, ff] SetRx
7.587554 INFO process_irq loop entered
8.574554 INFO Radio error = RxTimeout - rust-lorawan apparently gives up after 2 attempts `