Closed eZioPan closed 6 months ago
if it's really always at <PKA_base_addr> + 0x0400
we can make it be a u32 register array in the PKA block. Same as USBRAM, except part of PKA instead of a separate PKARAM peripheral.
(USBRAM is a separate peripheral because the offset, and the size and access modes vary a lot, so putting it in USB would require too many versions where the registers are otherwise identical, so I decided to make it separate. Hopefully this is not the case with PKARAM...)
although the start offset of the PKA RAM
is the same, there are still 2 versions of ram capacity.
Chip | stm32-data ver. | Length (as byte) |
---|---|---|
H573 / WBA52 | v1a | 5336 |
U5[45/85/a5/a9] | v1b | 5336 |
WB[10/15/35/50/55] / WL[54/55/e4/e5] / L562 / L4Q5 | v1c | 3576 |
But they just fit into current stm32-data ver., thus we can simple add them to yaml files.
When a MCU have
PKA
(Public Key Accelerator) peripheral, there is aPKA RAM
that<PKA_base_addr>
+0x0400
5336
~ (a little bit different) bytesfrom generated metapac, here is a list of
PKA_base_addr