HDL Solidification

[ogamespec]

Once the entire HDL is implemented, you need to shake it up, optimize it, document it in places and make sure it is moving at all.

• [x] ALU
• [x] DataLatch / DataBridge
• [x] Bottom IncDec
• [x] Bottom IRQ Logic
• [x] Bottom Regs vs Buses (including WZ)
• [x] Bottom SP / PC
• [x] Decoders
• [x] Seq

[ogamespec]

For some reason IR = xx.

This causes Decoder to return xx too and the Sequencer to go crazy.

[ogamespec]

Stabilized the simulation by delays, but now for some reason the CLK is off

[ogamespec]

Fixed posedge DFF / rs_latch. Revisited DataBridge.

Better

[ogamespec]

Added abus/bbus bus keepers (transparent DLatches).

[ogamespec]

Added cbus/dbus bus keepers.

[ogamespec]

It got much better and stabilized, but still Addr does not increase during NOP (0x00). Closing this Issue in favor of others.