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enjoy-digital / litedram

Small footprint and configurable DRAM core
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Add Halfrate GENSDRPHY #183

Closed enjoy-digital closed 4 years ago

enjoy-digital commented 4 years ago

On small FPGAs with SDRAM, we are currently running the SDRAM at the CPU frequency while in most of the cases we could probably run the SDRAM at 2x the CPU frequency (for example 50MHz CPU/100MHz SDRAM, 66MHz CPU/133MHz SDRAM). To support this, we could generate a sys2x clock with the main PLL of the design and create a wrapper around the GENSDRPHY that would do the clock/DFI adaptation.

rowanG077 commented 4 years ago

This issue can be closed I think?

enjoy-digital commented 4 years ago

@rowanG077: yes this is implemented, i just wanted to test it on various SDRAM boards before closing. This is now done.