The current implementation of the FIFO expects a continous stream of data. When the stream is interrupted, due to the read_threshold some data that should be emitted on the source are blocked in the FIFO until new data are written to the sink. We should implement a mechanism to avoid this and emit the data. The read_threshold was implemented to handle write-to-read latency and be sure write was done to the DRAM before initiating the read, but we can probably use internal signals of the controller to increment the level on a write exactly when the write burst is done to the DRAM and avoid the read_threshold.
The current implementation of the FIFO expects a continous stream of data. When the stream is interrupted, due to the
read_thresholdsome data that should be emitted on thesourceare blocked in the FIFO until new data are written to thesink. We should implement a mechanism to avoid this and emit the data. Theread_thresholdwas implemented to handle write-to-read latency and be sure write was done to the DRAM before initiating the read, but we can probably use internal signals of the controller to increment the level on a write exactly when the write burst is done to the DRAM and avoid theread_threshold.