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enjoy-digital / litedram

Small footprint and configurable DRAM core
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core: use wider DFI address/bank if PHY requires it #237

Closed jedrzejboczar closed 3 years ago

jedrzejboczar commented 3 years ago

This is a part of changes related to https://github.com/enjoy-digital/litedram/pull/224.

LiteDRAM normally encodes Mode Register Set command using DFIInjector, passing mode register address as dfi.baddress and value as dfi.address. In LPDDR4 there are more Mode Registers than in other DRAMs and we need 6 bits to store the address. So when a module has only 8 banks it is not possible to issue MRS via DFIInjector this way.

Initially I tried encoding both the address and the value in dfi.address, but then I had to modify the implementation of sdram_write_leveling_on/sdram_write_leveling_off in sdram.c for LPDDR4 specifically. To avoid it, now LPDDR4 PHY sets bankbits to 6: https://github.com/enjoy-digital/litedram/pull/224/commits/dfd7816567bf3b6c3f6b3c8f97cc22d512c99c47#diff-d84b2ae2991ef50d505ebd78f702957557f81bdfcd77f1aafbdd7bc66cc86ae5L97, and with this PR DFIInjector would use the higher value of geom_settings.bankbits and phy.bankbits, making sure that there are enough bits for Mode Register address.