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enjoy-digital / litedram

Small footprint and configurable DRAM core
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Problem with adding new LPDDR module: MT46H128M16 #310

Closed cklarhorst closed 1 year ago

cklarhorst commented 1 year ago

Hi, I would like to add a new LPDDR module (MT46H128M16LF) which is mostly an easy task except that this module skips an address bit (A10) for the column addressing. So for col addressing it uses A11 and A[9:0]: image Does somebody know how I should specify that in litedram? My current version looks like:

class MT46H128M16(LPDDRModule):
    # geometry
    nbanks = 4
    nrows  = 16384
    ncols  = 2048
    # timings
    technology_timings = _TechnologyTimings(tREFI=64e6/8192, tWTR=(2, None), tCCD=(1, None), tRRD=None)
    speedgrade_timings = {"default": _SpeedgradeTimings(tRP=15, tRCD=15, tWR=15, tRFC=(None, 72), tFAW=None, tRAS=None)}

Thanks in advance!

cklarhorst commented 1 year ago

Closed because of https://github.com/enjoy-digital/litedram/pull/313