I am working with the pci_screamer project of your own, and I am experiencing issues with the PCIe PHY from the Xilinx 7 series.
I am able to send TLP (read or write), I have been able to validate that write TLPs are working (by checking the address where I am writing to), but I have issues with the read TLPs. Indeed, I never get the completion TLPs.
I used litescope to probe some signals, and it seems nothing come from the PHY...
Hi,
I am working with the pci_screamer project of your own, and I am experiencing issues with the PCIe PHY from the Xilinx 7 series.
I am able to send TLP (read or write), I have been able to validate that write TLPs are working (by checking the address where I am writing to), but I have issues with the read TLPs. Indeed, I never get the completion TLPs.
I used litescope to probe some signals, and it seems nothing come from the PHY...
Any idea ?
Thanks