phy/usppciephy: Use double wide axis for gen4

enjoy-digital / litepcie

Small footprint and configurable PCIe core

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phy/usppciephy: Use double wide axis for gen4 #135

Closed Johnsel closed 6 months ago

Johnsel commented 6 months ago

This completes gen4 support on the gateware side.

Screenshot from 2024-04-30 03-24-05

Johnsel commented 6 months ago

Note that there still seem to be issues with liblitepcie as litepcie_util can't open the device even though the device shows up properly now, even though dmesg can read out the version. Will investigate further tomorrow. Screenshot from 2024-04-30 03-27-25

Johnsel commented 6 months ago

Looks like that just needed a reboot. That leaves only the DMA side by the looks of it. Signing off Screenshot from 2024-04-30 03-32-42 for today though

Johnsel commented 6 months ago

Seems to have minor issues still, and is not tuned yet for speed. Verifying the further changes I made still to confirm it doesn't touch anything untowardly w/ non gen4 xcau devices

Johnsel commented 6 months ago

enjoy-digital commented 6 months ago

Great, thanks @Johnsel.