Closed piotr-binkowski closed 3 years ago
@piotr-binkowski, @mithro: after thinking a bit about it, I don't think it's a good idea to integrate this proFPGA VU19P: most of the boards used in LiteX and the ecosystem have been selected to be useful and affordable to allow others to reproduce results. The Ultrascale boards are still expensive but I tried to select affordable ones (BCU1525 and FK33 that can be found around 1k$), which still allow some users of the community to buy them and play with them. Here with the proFPGA VU19P we are probably around 70k$ the board (and probably more), so this is only accessible to very large companies.
I'm already using proFPGA boards for some clients and testing the cores on them, but maintain them in specific repositories. So this configuration should probably be supported and maintained in a specific project/repository. The current Ultrascale(+) code is also working, but some refactoring is needed to ease supporting more boards, for example: https://github.com/enjoy-digital/litepcie/issues/42. So let's first finish things that have been started before going further.
VU19P uses PCIE4C block (the same as in HBM configs) that needs a modified
.xci
file (to select GTY Quad 231). This PR adds.xci
files for 3.0 x4/x8 and 4.0 x4 configurations and example target for that board. Support for the board itself will be added in litex-hub/litex-boards#125For the moment only x4 3.0 configuration was successfully tested on hardware (3.0 x8 and 4.0 x4 pass the
scratch_test
but fail ondma_test
oflitex_tool
- DMA buffer counters stay at 0 or run for a short while and then stop at some value).I think it is worth noting that building this example requires Vivado 2020.1.1 with this patch and even with that it seems like some 3.0 x4 builds fail the
dma_test
.