Getting empty wave forms

Hi there, I'm trying to add litescope to the fomu. I'm starting from the fomu-workshop example and then adding litescope like below:

class LiteScopeSoC(BaseSoC):
    def __init__(self,args, usb_bridge):
        #platform = arty.Platform()

        # BaseSoC ----------------------------------------------------------------------------------
        BaseSoC.__init__(self, args.board, pnr_seed=args.seed, pnr_placer=args.placer, usb_bridge=usb_bridge)
        #BaseSoC.__init__(self,
        #    integrated_rom_size = 0x8000,
        #    with_etherbone      = True,
        #)

        # LiteScope Analyzer -----------------------------------------------------------------------
        count = Signal(8)
        self.sync += count.eq(count + 1)
        analyzer_signals = [
            self.usb.usb_core.iobuf.usb_pullup,
            self.usb.iobuf.usb_tx_en,
            self.usb.iobuf.usb_p_tx,
            self.usb.iobuf.usb_p_rx,
            self.crg.cd_por.clk,
            count,
        ]
        from litescope import LiteScopeAnalyzer
        self.submodules.analyzer = LiteScopeAnalyzer(analyzer_signals,
            depth        = 1024,
            clock_domain = "sys",
            csr_csv      = "analyzer.csv")
        self.add_csr("analyzer")

def main():
...
    #soc = BaseSoC(args.board, pnr_seed=args.seed, pnr_placer=args.placer, usb_bridge=True)
    soc = LiteScopeSoC(args,usb_bridge=True)

litescope seems responsive and trigger seem to hit, however waveforms are empty: csr_register,analyzer_trigger_done,0x00003008,1,ro

[Sun Aug 23 19:37:16 ronaldv@Ronalds-MBP16:~/Projects/repositories/fomu-workshop/litex ] $ wishbone-tool 0x00003008
INFO [wishbone_tool::bridge::usb] opened USB device device 007 on bus 020
Value at 00003008: 00000001
Exited MemoryAccess thread

 litescope_cli -v soc_count 0 --offset 0 --length 512
Exact: soc_count
Exact: soc_count
Condition: soc_count == 0
[running]...
[uploading]...

[writing to dump.vcd]...

Then

[Sun Aug 23 19:39:47 ronaldv@Ronalds-MBP16:~/Projects/repositories/fomu-workshop/litex ] $ cat dump.vcd
$date
    2020-08-23 19:36
$end
$timescale 1ps $end
$scope 1ps $end
$var wire 1 ! soc_usb_iobuf_usb_pullup $end
$var wire 1 " soc_usb_iobuf_usb_tx_en $end
$var wire 1 # soc_usb_iobuf_usb_p_tx $end
$var wire 1 $ soc_usb_iobuf_usb_p_rx $end
$var wire 1 % por_clk $end
$var wire 8 & soc_count $end
$var wire 1 ' scope_clk $end
$unscope  $end
$enddefinitions  $end
$dumpvars
bx !
bx "
bx #
bx $
bx %
bxxxxxxxx &
bx '
$end

Not sure if related, but length register seems to have constant zero:

csr_register,analyzer_storage_length,0x00003034,2,rw

[Sun Aug 23 19:36:34 ronaldv@Ronalds-MBP16:~/Projects/repositories/fomu-workshop/litex ] $ wishbone-tool 0x00003034
INFO [wishbone_tool::bridge::usb] opened USB device device 007 on bus 020
Value at 00003034: 00000000
Exited MemoryAccess thread

enjoy-digital / litescope

Getting empty wave forms #28