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enjoy-digital / litescope

Small footprint and configurable embedded FPGA logic analyzer
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VCD: Add samplerate support to fix displayed timestamps #40

Closed jevinskie closed 2 years ago

jevinskie commented 2 years ago

To use this, pass the samplerate kwarg to LiteScopeAnalyzer(). If using the sys domain, soc_obj.sys_clk_freq works.

enjoy-digital commented 2 years ago

Thanks @jevinskie!

pftbest commented 2 years ago

@jevinskie Default sample rate is set to samplerate=1e-12 which is not an integer, so it causes a crash if user does not set their own samplerate.

enjoy-digital commented 2 years ago

@pftbest: Thanks, I also had the issue and fixed it with https://github.com/enjoy-digital/litescope/commit/6f0287fecd57f76cf56bd4e04179788ff55baddc.