Support pulseview / sigrok directly

enjoy-digital / litescope

Small footprint and configurable embedded FPGA logic analyzer

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Support pulseview / sigrok directly #8

Open mithro opened 7 years ago

mithro commented 7 years ago

Currently litescope supports dumping sigrok data. It would be awesome if instead you could just use a LiteScope system like any other sigrok board.

mithro commented 7 years ago

This work is in progress and can be found at https://github.com/mithro/libsigrok/tree/litescope

mithro commented 7 years ago

It's kind of working!

mithro commented 7 years ago

Code needs a lot of cleanup before it can be sent upstream, but it is slowly getting there.

mithro commented 7 years ago

@paddatrapper & @cr1901 - PTAL.

abraxa commented 6 years ago

Hi there, we just discovered your great project and would like to upstream libsigrok support for it. What needs to happen from your point of view to allow this? Is the driver just unpolished or is it buggy and/or lacks essential features? The screenshot above implies that basic functionality is there, so we'd like to upstream it, if possible. Thanks for your great work!

enjoy-digital commented 6 years ago

Hi @abraxa, i'll discuss with @mithro in the next days about that and will try to give you a detailed status of the situation. I would also really like to upstream that work to libsigrok.

mithro commented 6 years ago

@abraxa The driver is unpolished and buggy, it needs a bunch of clean up.

@xobs has done some stuff with creating a C library for doing the etherbone stuff needed which should reduce the complexity quite a bit.

xobs commented 6 years ago

A simple proof-of-concept library is available at https://github.com/xobs/wishbone-adapter/. The library is in etherbone.c, with an API exposed in etherbone.h.

As a reference program, you can look at litex-devmem2.c.

mithro commented 6 years ago

Just FYI the parts of my stuff are;

Etherbone driver (for communicating to wishbone bus inside the LiteX SoC) - easy-eb.h easy-eb.c. The litex-server allows you to use the Etherbone driver to communicate via PCIe or UART.
CSV reader (for reading the LiteX csr.csv file created) - simple-csv.h simple-csv.c
Tools for communicating with the LiteScope "Analyzer" on the wishbone bus inside the LiteX SoC - analyzer.h analyzer.c
Actual sigrok code - api.c protocol.h protocol.c

mithro commented 6 years ago

There are a bunch of hacks to libsigrok directly. These include;

Driver Config files
Hacks to allow reading files
Some hacks to allow access to the TCP socket (can't find them?)

danielkucera commented 4 years ago

Hi @mithro , there are many FX2LP+FPGA+RAM logic analyzers on the market. Would you see it possible to adapt this concept to communicate via FX2LP? So it would be possible to create "one firmware rules them all" ? For example I own https://sigrok.org/wiki/Sysclk_LWLA1016 and I'd love to see it running some opensource FW.