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enjoy-digital / litesdcard

Small footprint and configurable SDCard core
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RFC: phy: add support for Lattice ECP5 (SDPHYIOECP5) #10

Closed gsomlo closed 4 years ago

gsomlo commented 4 years ago

@enjoy-digital: please don't apply (yet) -- this "should" (but isn't) working at the moment, so let's wait until we figure it out :)

gsomlo commented 4 years ago

per @daveshah1, it might be that the ECP5 ODDRX1F has a 3 clock cycle latency, which might be higher than the 1 or 2 cycle latency on the Xilinx, which might be a breaking change. I wanted to write that down here, to remember when I (or anyone else) end up working on this later...

enjoy-digital commented 4 years ago

@gsomlo: i'm merging it since i'm going to work on it and will also do some cleanup on the PHYs so want to avoid merge conflicts.

enjoy-digital commented 4 years ago

The latency was indeed too high and was causing de-synchronization between CLK and CMD/DAT. I merged and replaced the ECP5 PHY with a Generic PHY in https://github.com/enjoy-digital/litesdcard/commit/27572e742b25171c8e67afad3cb1ff0eae7c2d1b and tested it successfully on the ULX3S target of LiteX with: ./ulx3s.py --cpu-type=serv --with-sdcard --integrated-main-ram-size=0x100 --build --load and then with the following commands: