Closed gsomlo closed 4 years ago
@gsomlo: thanks, i'll have a closer look at this on next Tuesday, will try to understand why https://github.com/enjoy-digital/litesdcard/commit/ada24055bc1c6a42fdaa3ebed24eec68ffdd49bd was needed and what information is available on the unused bits. We should indeed try to get rid of the complicated 8-bit CSR accessor on the response register.
@mateusz-holenko @kamilrakoczy please also take a look and let us know what you think!
Thanks, this seems fine. I'm merging to be able to merge #547 and will continue working on it to clarify the others points.
@gsomlo Looks good!
We will see what changes are needed in the Linux driver: https://github.com/litex-hub/linux/blob/litex-vexriscv--linux5.0_sd_card/drivers/mmc/host/litex_mmc.c#L157
While the internal response register may need 136 bits, the software side (bios and kernel) ignore the last byte, using only information provided in the first 128 bits. As such, let's only expose those 128 bits, with the advantage of re-enabling software to once again deal with CSR endianness and alignment in a sane, portable way.
NOTEs:
(mor1kx, vexriscv, rocket) x (csr_data_with \in {8, 32})