Closed gsomlo closed 4 years ago
updated with a better comment and commit log explanation: the long-response register is still 136bits internally, it's just that right now, the most convenient way to expose the right 128-bit portion is to add an extra 8-bit shift to the FSM. There's probably a more elegant way to assign the proper 128 bits to the software-visible response register, but this seems to work for now...
Thanks @gsomlo, this makes sense and we can merge it with the comment.
Ensure each bit of the long (16 byte) response register is shifted into its appropriate position (off by 8 bits before this patch).
E.g., on my 32GB sdcard, with spi-sdcard the CSD register comes back (correctly) as:
However, before this patch, with litesdcard, the CSD register of the very same SDcard is shown as:
After the patch, the CSD register is the same as in SPI mode, which means the (long) response register should now be returned correctly, hopefully in all cases, not just when returning the CSD register :)
@enjoy-digital: I tried just shifting things into place in software (in the linux driver), and that resulted in the same behavior as this patch, so anything further that's broken is probably broken in software, and this patch should be applied anyway as-is, since it's most likely doing the right thing :)
EDIT: well, the least-significant byte is 0a404000 (instead of 0a4040c3 -- i.e., the CRC isn't computed, but that's already a known FIXME item in litesdcard, so I'm not worried about it for now)