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enjoy-digital / litex

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Multi-clock plateform #1623

Open jwfaye opened 1 year ago

jwfaye commented 1 year ago

Hello,

I was wondering if I had 3 standalone SoC generated with litex_soc_gen integrated into a higher level design if I could make each standalone SoC work at a different frequency? I tried but the response of the CPU working at a frequency different from the higher-level design is stuck when I open litex_term.

Does anyone have an idea about this?

enjoy-digital commented 1 year ago

Hello @jwfaye,

This should be possible yes. If the SoCs are not interconnected, each one should be able to use a specific clock. If the SoC are interconnected, you'll have to make sure you have CDC modules between each SoCs and the part(s) interconnected.