enjoy-digital / litex

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Clock domain crossing for peripherals #1873

Open rhgndf opened 10 months ago

rhgndf commented 10 months ago

Is it possible to use soc.add_slave to add peripherals on a different clock domain? Possible use cases are running some peripherals such as spi flash or sd card at a higher frequency than the main cpu to allow for faster accesses.

enjoy-digital commented 10 months ago

Hi @rhgndf,

for now this is not directly integrated in the framework and still have to be done manually in the user logic (ie first add a CDC to run the MMAP interface in sys_clk). This is a features that will probably be added in the future.

rhgndf commented 10 months ago

Thanks for the reply.

If I'm not wrong to do this manually this involves making a new Wishbone/AXI CDC wrapper where all the bus lines are used in a BusSynchronizer for both directions?

enjoy-digital commented 10 months ago

For Wishbone, we don't have yet a CDC module, but for AXI-Lite, you can use: https://github.com/enjoy-digital/litex/blob/master/litex/soc/interconnect/axi/axi_lite.py#L489-L527