Closed enjoy-digital closed 2 years ago
ADC PLL + ADC <-> FPGA link seems OK now, we can correctly receive the ramp pattern emitted by the ADC when configured to output it (here observed with LiteScope):
Done, HMCAD1511 is configured correctly and synchronized correctly/operating correctly with the FPGA.
The HMCAD1511 is also used on the SDS1104X-E, so we can reuse most of the code already developed for it in 360nosc0pe project; https://github.com/360nosc0pe/scope.
We can list the use/configuration difference here to know the adaptations that will be required.
Being able to do first ADC captures requires:
With these features implemented, let's first do a simple unit-test over JTAGBone and verify sampling over LiteScope.