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epics-modules / mrfioc2

EPICS driver for Micro Research Finland event timing system devices
http://epics-modules.github.io/mrfioc2/
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clear sumerr in event of error while draining buffer #20

Closed daykin closed 3 years ago

daykin commented 5 years ago

After adding this line, I attempted to reproduce the problem (#19) 20+ times and was unable to.

mark0n commented 5 years ago

LGTM. Seems like the failing CI jobs are unrelated.

mdavidsaver commented 5 years ago

Your patch is to write one to DataBufCtrl[DBCS] (as I incorrectly guessed). However, the documentation I have says:

Data Buffer Checksum Error (read-only) Flag is cleared by writing ‘1’ to DBRX or DBRDY or disabling data buffer

I'm doing the former:

https://github.com/epics-modules/mrfioc2/blob/76820e4373faad921334c2cea340bc6bca8ed645/evrMrmApp/src/drvemRxBuf.cpp#L127

So I'm still at a loss to explain why you say a repeated error.

@jpietari Can you clarify on the proper way to clear a checksum error? Maybe the RXENA bit should be toggled?

jpietari commented 5 years ago

The checksum error flag is cleared if the data buffer is armed from a "receive complete" state (by writing a '1' to bit 15, DBRX). Another way is to write a '1' to bit 14 (DBDIS) to unarm the data buffer and this should always work regardless of the data buffer state.

Writing to DBCS does not do anything.