In a project of our company we had the following problems:
-small mode was not usable as the (used) flash area was larger than 32kB
-medium mode made to many problems in decompilation because of the zero extension of the stack pointer.
Our solution was to create a mixed mode. Similar to an harvard architecture we specified a 16 bit address bus "RAM" for all data accesses and a 24 bit address bus "ROM" for all code fetching.
Pro:
Indirect memory accesses don't have a zero extension in the address calculation, so the decompiled c code looks better.
Code can be larger than 32kB.
Con:
Constants in flash memory must be within the first 32kB of the flash.
The stack pointer + 0 problem still exist (bug in Ghidra, not in the CPU definition)
In a project of our company we had the following problems: -small mode was not usable as the (used) flash area was larger than 32kB -medium mode made to many problems in decompilation because of the zero extension of the stack pointer. Our solution was to create a mixed mode. Similar to an harvard architecture we specified a 16 bit address bus "RAM" for all data accesses and a 24 bit address bus "ROM" for all code fetching.
Pro: