Installation

[arkup]

Hi,

interesting extension. I'm new to sleigh and try to follow installation but get errors during compile:

ghidra_v850-master\data\languages\v850.slaspec" is not properly case dependent: Case difference found:

ERROR Unrecoverable error(s), halting compilation (SleighCompile) ghidra.sleigh.grammar.BailoutException: input file "ghidra_v850-master\data\languages\v850.slaspec" 

is not properly case dependent: Case difference found:

I'm not sure if im doing something wrong. I've set GHIDRA_HOME to Ghidra root dir. I've tried different ghidra versions including 9.1.0. Do you know what could be the problem?

[esaulenka]

Hello Oh, I never tested makefile, it written by @pd0wm. I am working on windows, and simply run sleigh.bat:

C:\Projects\Ghidra_v850\data\languages>C:\Projects\ghidra_9.2_DEV\support\sleigh.bat v850.slaspec   

OpenJDK 64-Bit Server VM warning: Archived non-system classes are disabled because the java.system.class.loader property is specified (value = "ghidra.GhidraClassLoader"). To use archived non-system classes, this property must not be set
INFO  Using log config file: jar:file:/C:/Projects/ghidra_9.2_DEV/Ghidra/Framework/Generic/lib/Generic.jar!/generic.log4j.xml (LoggingInitialization)                                                   
INFO  Using log file: C:\Users\a.esaulenko\.ghidra\.ghidra_9.2_DEV\application.log (LoggingInitialization)
WARN  24 NOP constructors found (SleighCompile)
WARN  Use -n switch to list each individually (SleighCompile)                                        

And I am using latest Ghidra (from theirs github), and work with another versions also not tested.

Please, try to comment out includes in the bottom of slaspec file. I hope, this will help to find error.

[arkup]

Thanks, using PowerShell I was able to compile.

You wrote copy files to $(GHIDRA_HOME)\Ghidra\Extensions\ which files only v850.sla and v850.slaspec? because I did that and I don't see module for Renesas v850 when loeaded my ELF binary.

[esaulenka]

No, you should copy everything.

You can skip .slaspec and .sinc files, which are sources for .sla, but nothing bad is happen if you don't.

UPD Please note, directory structure must be saved: you can create directory with any name in Extensions dir, but there should be data and language directories.

[arkup]

thx, I was able to load your module for Renesas v850. I will play it tomorrow. From quick analysis I see that not all instruction can be dissam :( e.g.

        000ab4fc ea              ??         EAh
        000ab4fd 07              ??         07h
        000ab4fe a3              ??         A3h
        000ab4ff 01              ??         01h

in IDA

text:000AB4FC EA 07 A3 01                       bnz     __lin@

[esaulenka]

It is very strange. Branch instructions should be encoded only by 16 bits, not 32. Which processor you are using in IDA ?

Looks like erroneous sequence, parsed as LD.HU with r0 as destination (it is not possible).

[arkup]

IDA:
Format      : ELF for NEC V800 or Renesas RH850 (Executable)

in ELF header e_machine is 0024 NEC V800 series

[esaulenka]

I didnt dig in that direction, but looks like V800 use diffreent instruction set than the V850. Sorry, your V800 not supported now.

[timkoers]

I didnt dig in that direction, but looks like V800 use diffreent instruction set than the V850. Sorry, your V800 not supported now.

Are you planning to add support for the V800?

[esaulenka]

Are you planning to add support for the V800?

No, sorry. I don't have enough free time and excess of motivation to work with MCU that I have never seen before ;)

[timkoers]

No worries, could you give me a hand in understanding what to write down into the script in order to add support for the MCU?

[esaulenka]

Sorry, I missed your message. To do a new processor module, you should have a good knowledges about this processor architecture itself (i.e. registers, addressing modes, etc.) and SLEIGH - it is a specific language to describe binary instructions in two forms - in human-readable assembler code and in machine-readable sequences of operations (like LDR a,[b] should read memory from address b to register a).

SLEIGH description can be found here: https://github.com/NationalSecurityAgency/ghidra/tree/master/GhidraDocs/languages Also you can find some tricks from other processor modules.

And if you really wants to do a new module, feel free to ask me. I hope, I can be useful ;-) I promise to answer more quickly.