search

esl-epfl / cv32e40px

CV32E40P is an in-order 4-stage RISC-V RV32IMFCXpulp CPU based on RI5CY from PULP-Platform
Other
2 stars 2 forks source link

merge cv32e40p #3

Closed davideschiavone closed 8 months ago

davideschiavone commented 8 months ago

Not merging it yet as I found a bug when in X-HEEP running example_matfadd with the X-IF - the print is broken 

program finished with 0 errors and 96 cycles
2.��, 2.��
-2.��, 2.��

from the waveforms, I can see the UART output is indeed wrong with the same application running with the previous version - I suspect a bug in the X-IF, it is under debugging

davideschiavone commented 8 months ago

waiting for https://github.com/esl-epfl/x-heep/pull/441