esp-rs / esp-mbedtls

mbedtls for ESP32 bare-metal
Apache License 2.0
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esp32c6 compatibility #56

Open arthurbabu opened 6 days ago

arthurbabu commented 6 days ago

Hello,

I want to make an HTTPS client with TLS+Certificates. esp32-c6 chip compatibility is foreseen ? Or is there another way to do TLS+certificates on no_std environment ?

bjoernQ commented 6 days ago

Getting this to work with ESP32-C6 should be straightforward

Applying this diff should add support for C6

diff --git a/.cargo/config.toml b/.cargo/config.toml
index 4d9defd..881904f 100644
--- a/.cargo/config.toml
+++ b/.cargo/config.toml
@@ -19,6 +19,18 @@ rustflags = [
   "-C", "force-frame-pointers",
 ]

+[target.riscv32imac-unknown-none-elf]
+runner = "espflash flash --monitor --baud 921600"
+
+rustflags = [
+  "-C", "link-arg=-Tlinkall.x",
+  "-C", "link-arg=-Trom_functions.x",
+
+  # Required to obtain backtraces (e.g. when using the "esp-backtrace" crate.)
+  # NOTE: May negatively impact performance of produced code
+  "-C", "force-frame-pointers",
+]
+
 [target.xtensa-esp32s2-none-elf]
 runner = "espflash flash --monitor --baud 921600"

diff --git a/Cargo.toml b/Cargo.toml
index 06f0722..48483b9 100644
--- a/Cargo.toml
+++ b/Cargo.toml
@@ -32,7 +32,7 @@ esp-println = { version = "0.12.0", features = ["log"] }
 esp-hal-embassy = { version = "0.4.0", optional = true }

 embassy-time = { version = "0.3.0", optional = true }
-embassy-executor = { version = "=0.6.0", package = "embassy-executor", features = [
+embassy-executor = { version = "0.6.3", package = "embassy-executor", features = [
     "nightly",
     "integrated-timers",
 ], optional = true }
@@ -112,6 +112,14 @@ esp32c3 = [
     "esp-wifi/esp32c3",
     "esp-mbedtls/esp32c3",
 ]
+esp32c6 = [
+    "esp-hal/esp32c6",
+    "esp-hal-embassy?/esp32c6",
+    "esp-backtrace/esp32c6",
+    "esp-println/esp32c6",
+    "esp-wifi/esp32c6",
+    "esp-mbedtls/esp32c6",
+]
 esp32s2 = [
     "esp-hal/esp32s2",
     "esp-hal-embassy?/esp32s2",
@@ -152,8 +160,3 @@ edge-server = [
 edge-http = { git = "https://github.com/ivmarkov/edge-net", rev = "722f92ac0fffd0cb1e1ce76086cca58df6eb49ee" }
 edge-nal = { git = "https://github.com/ivmarkov/edge-net", rev = "722f92ac0fffd0cb1e1ce76086cca58df6eb49ee" }
 edge-nal-embassy = { git = "https://github.com/ivmarkov/edge-net", rev = "722f92ac0fffd0cb1e1ce76086cca58df6eb49ee" }
-
-# Patch before 0.6.0 got yanked
-embassy-executor = { git = "https://github.com/embassy-rs/embassy", rev = "886580179ff250e15b0fad6448e8ebed6cdabf2b" }
-embassy-time-driver = { git = "https://github.com/embassy-rs/embassy", rev = "886580179ff250e15b0fad6448e8ebed6cdabf2b" }
-embassy-time-queue-driver = { git = "https://github.com/embassy-rs/embassy", rev = "886580179ff250e15b0fad6448e8ebed6cdabf2b" }
diff --git a/esp-mbedtls-sys/Cargo.toml b/esp-mbedtls-sys/Cargo.toml
index fa332c6..27ce712 100644
--- a/esp-mbedtls-sys/Cargo.toml
+++ b/esp-mbedtls-sys/Cargo.toml
@@ -14,5 +14,6 @@ default = []
 # Exactly *one* chip MUST be selected via its feature:
 esp32 = []
 esp32c3 = []
+esp32c6 = []
 esp32s2 = []
 esp32s3 = []
diff --git a/esp-mbedtls-sys/src/lib.rs b/esp-mbedtls-sys/src/lib.rs
index bf1f67a..a105dce 100644
--- a/esp-mbedtls-sys/src/lib.rs
+++ b/esp-mbedtls-sys/src/lib.rs
@@ -4,6 +4,7 @@ pub mod c_types;

 #[cfg_attr(feature = "esp32", path = "include/esp32.rs")]
 #[cfg_attr(feature = "esp32c3", path = "include/esp32c3.rs")]
+#[cfg_attr(feature = "esp32c6", path = "include/esp32c3.rs")]
 #[cfg_attr(feature = "esp32s2", path = "include/esp32s2.rs")]
 #[cfg_attr(feature = "esp32s3", path = "include/esp32s3.rs")]
 pub mod bindings;
diff --git a/esp-mbedtls/Cargo.toml b/esp-mbedtls/Cargo.toml
index 35e3645..1f2c4df 100644
--- a/esp-mbedtls/Cargo.toml
+++ b/esp-mbedtls/Cargo.toml
@@ -21,6 +21,7 @@ critical-section = "1.1.3"
 async = ["dep:embedded-io-async"]
 esp32 = ["esp-hal/esp32", "esp-mbedtls-sys/esp32"]
 esp32c3 = ["esp-hal/esp32c3", "esp-mbedtls-sys/esp32c3"]
+esp32c6 = ["esp-hal/esp32c6", "esp-mbedtls-sys/esp32c6"]
 esp32s2 = ["esp-hal/esp32s2", "esp-mbedtls-sys/esp32s2"]
 esp32s3 = ["esp-hal/esp32s3", "esp-mbedtls-sys/esp32s3"]

diff --git a/esp-mbedtls/src/bignum.rs b/esp-mbedtls/src/bignum.rs
index 9622da7..65be520 100644
--- a/esp-mbedtls/src/bignum.rs
+++ b/esp-mbedtls/src/bignum.rs
@@ -21,7 +21,7 @@ macro_rules! error_checked {

 #[cfg(feature = "esp32")]
 const SOC_RSA_MAX_BIT_LEN: usize = 4096;
-#[cfg(feature = "esp32c3")]
+#[cfg(any(feature = "esp32c3", feature = "esp32c6"))]
 const SOC_RSA_MAX_BIT_LEN: usize = 3072;
 #[cfg(feature = "esp32s2")]
 const SOC_RSA_MAX_BIT_LEN: usize = 4096;
@@ -319,7 +319,7 @@ pub unsafe extern "C" fn mbedtls_mpi_exp_mod(
                         mod_exp.read_results(&mut out);
                         copy_bytes(out.as_ptr(), (*Z).private_p, m_words);
                     }
-                    #[cfg(not(feature = "esp32c3"))]
+                    #[cfg(not(any(feature = "esp32c3", feature = "esp32c6")))]
                     U4096::LIMBS => {
                         const OP_SIZE: usize = U4096::LIMBS;
                         let mut base = [0u32; OP_SIZE];
diff --git a/esp-mbedtls/src/compat/mod.rs b/esp-mbedtls/src/compat/mod.rs
index d05b33c..d125246 100644
--- a/esp-mbedtls/src/compat/mod.rs
+++ b/esp-mbedtls/src/compat/mod.rs
@@ -47,3 +47,14 @@ impl core::fmt::Write for StrBuf {
         Ok(())
     }
 }
+
+#[cfg(feature = "esp32c6")]
+#[no_mangle]
+unsafe extern "C" fn memchr(ptr: *const u8, ch: u8, count: usize) -> *const u8{
+    for i in 0..count {
+        if ptr.add(i).read() == ch {
+            return ptr.add(i);
+        } 
+    }
+
+    return core::ptr::null()
+}
\ No newline at end of file
diff --git a/esp-mbedtls/src/lib.rs b/esp-mbedtls/src/lib.rs
index 578d4d2..818e6e8 100644
--- a/esp-mbedtls/src/lib.rs
+++ b/esp-mbedtls/src/lib.rs
@@ -14,7 +14,7 @@ use hal::{

 mod compat;

-#[cfg(any(feature = "esp32c3", feature = "esp32s2", feature = "esp32s3"))]
+#[cfg(any(feature = "esp32c3", feature = "esp32s2", feature = "esp32s3", feature = "esp32c6"))]
 mod bignum;
 #[cfg(not(feature = "esp32"))]
 mod sha;

Ideally, we should change the xtask to name the artifacts for RISC-V differently (= we can just use the same for all currently supported RISC-V targets) - but it should work this way

yanshay commented 6 days ago

For options for no_std TLS, depending on your exact needs, see https://github.com/esp-rs/esp-hal/discussions/1924