espressif / clang-tidy-runner

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Tool doesn't work on esp32c3 risc-v cpu's (RDT-113) #6

Closed sqrtroot closed 1 year ago

sqrtroot commented 2 years ago

When running idf.py clang-check on a project using the esp32c3 you get the following output in warnings.txt repeated:

error: unknown target CPU 'rv32imc' [clang-diagnostic-error]
note: valid target CPU values are: nocona, core2, penryn, bonnell, atom, silvermont, slm, goldmont, goldmont-plus, tremont, nehalem, cor
ei7, westmere, sandybridge, corei7-avx, ivybridge, core-avx-i, haswell, core-avx2, broadwell, skylake, skylake-avx512, skx, cascadelake,
 cooperlake, cannonlake, icelake-client, icelake-server, tigerlake, sapphirerapids, alderlake, knl, knm, k8, athlon64, athlon-fx, optero
n, k8-sse3, athlon64-sse3, opteron-sse3, amdfam10, barcelona, btver1, btver2, bdver1, bdver2, bdver3, bdver4, znver1, znver2, znver3, x8
6-64, x86-64-v2, x86-64-v3, x86-64-v4
Error while processing /home/robert/Programs/esp-idf/components/openssl/platform/ssl_port.c.
Suppressed 4 warnings (4 in non-user code).
Use -header-filter=.* to display errors from all non-system headers. Use -system-headers to display errors from system headers as well.
Found compiler error(s).

versions of all the components used:

$ clang --version
clang version 12.0.1 (https://github.com/espressif/llvm-project.git d9341b81fc589c0483d629155bc88e6e85e3db34)
Target: x86_64-unknown-linux-gnu
Thread model: posix
InstalledDir: .espressif/tools/xtensa-clang/12.0.1-d9341b81fc/xtensa-esp32-elf-clang/bin
$ clang-tidy --version
LLVM (http://llvm.org/):
  LLVM version 12.0.1
  Optimized build.
  Default target: x86_64-unknown-linux-gnu
  Host CPU: skylake
$ which run-clang-tidy.py
.espressif/tools/xtensa-clang/12.0.1-d9341b81fc/xtensa-esp32-elf-clang/bin/run-clang-tidy.py
$ idf.py --version
ESP-IDF v5.0-dev-1462-g3441dd1e98
sqrtroot commented 2 years ago

Adding the following replacements in https://github.com/espressif/clang-tidy-runner/blob/79b79fa772cb9ee93b91af0b04e97fa8822207c9/pyclang/runner.py#L51 fixes this error

    '-march=rv32imc': '',
    '-Wno-error=format=': '',
    '-Werror=unused-but-set-variable': '',
    '-Wformat-overflow=2': '',
    '-Wformat-signedness': '',
    '-Wformat-truncation': '',
    '-Wlogical-op': '',
    '-Wno-old-style-declaration': '',

But still leaves another error, "machine/endian.h not found".

hfudev commented 2 years ago

@sqrtroot Hi, according to the doc, it doesn't support RISC-V yet. I'll keep it open and ping you again when we support this :)

igrr commented 1 year ago

This should now work with ESP-IDF master branch. esp-clang distribution bundled with IDF now supports both Xtensa and RISC-V.