[Question] Decimation step in dsps_fird_f32_ae32 (DSP-86)

[ashvarma-git]

In the implementation of this FIR function with decimation support, I have following questions:

(1) Is decimation applied before FIR filtering or after FIR filtering? (2) Say I have sampling rate of 10KHz (10K samples collected in one sec), and I want to use decimation factor of 10 for an output filtered array of 1K samples per sec, then do I design FIR coefficients corresponding to 10KHz sampling or 1KHz sampling?

The issue is that my desired filtering range is 0-500Hz and filter response is very different when choosing 10KHz vs 1KHz sampling rate for FIR coefficients. What is the correct sampling rate to design FIR coefficients for when using this decimation function?

(3) Does the setup of FIR using

esp_err_t dsps_fird_init_f32((fir_f32_t) *fir, float *coeffs, float *delay, int N, int decim, int start_pos)

does N need to be an odd number? In several implementations of FIR, N must be an odd number.

[dmitry1945]

Hi @ashvarma-git ,

1. The decimation applied before. We make filtering once for every input sample, but only every Nth input event. It means, every input sample will be stored to the delay line, but the FIR calculation for the full delay line and full coefficients array will be executed every Nth time.
2. You do FIR filter design for 10k sample rate, because we apply FIR coefficients to input signal that is 10k.
3. You have to distinguish between real FIR coefficients length and N, which is a parameter for the FIR filter. In our case, for example for esp32s3 the N should be divided by 4, but if you have FIR design with number of coefficients which is not divided by 4, you should add zero values to your coefficients array to make the length divided by 4. It will not affect the impulse response in this case, but will allow to make calculation much faster.

Regards, Dmitry