Open xiongyu0523 opened 3 years ago
I've also experienced non-ideal performance with lwip. Except for the amount of malloc/free it seems also that many transfers are not used to actually transfer data. most likely the way I've got lwip configured.
Hello @drorgl,
Appreciate all your efforts for integrating lwip. We will look into the throughput issue and get back to you.
Hello @drorgl ,
We checked your esphosted code porting and appreciate all your efforts. Although I have some questions in priority,
pbuf
instead of working around as esp_pbuf
. If so, the integration with lwip should be seamless.Please do let us know any inputs or any questions in this regard.
Hi @mantriyogesh ,
If you're planning to investigate and improve the MCU demo in esp-hosted, I propose the following changes to esp-hosted:
I'm using the nucleo 446 which has only 128K RAM, in a different MCU the lwip can be optimized to use a larger window and packet size so it might be faster, a partially successful UDP test showed 2Mbps but there were SPI transfer errors which I didn't investigate.
I fully agree with @xiongyu0523 's suggestions. one of them is that the code also needs an OS abstraction layer.
I've also simplified the build for the ESP32 hosted project using platformio, if you're interested in that I can push my fork.
Sure @drorgl. Thanks @xiongyu0523, @drorgl.
All your findings hold important value.
Malloc and free with zero copy might be very optimised way to do the things. Which I believe users while porting should definitely do, which will save the good CPU cycles. In addition, we will shortly port it to some network driver, it may or may not be lwip, but we will try to incorporate your points there.
If you observe the we have two STM32CubeMX ioc
projects. One of them is with hardware NSS and one is without NSS (software controlled). We wish the NSS to be working to get driver time execution benefit. Software controlled NSS is basically Toggling the Chip select /NSS value before and after SPI transfer.
a. DMA will be a good value addition. We will surely try to add support for this. In case you have already working code, we can accept as for of pull request.
b. Regarding unwanted pulses you observed, This looks like a problem. Could you please point us the code and image log, we will try to investigate this further.
OS abstraction layer - we thought of adding wrapper layer, which will save users time. but note that it may not necessarily CMSIS. The problem here is multiple RTOS may not respect same wrapper OS. This wrapper OS layer will help make code agnostic of OS underlying.
Definitely please push the work you feel is relevant. It will definitely help users in similar problems. Additionally, if you have any contributions, directly into the code, we do accept the pull requests. This helps ESP-Hosted and its users to get acknowledgement for their open source work.
Hello @mantriyogesh, are there any updates on future releases for LWIP integration of the esp-host-fg solution? I have just seen the updates of 2 months ago where they were announced to be realesed soon
Not everything is done from above list. But many changes we had already added.
We have simplified the porting layer, added lwip integration etc. These changes gone in for ESP as slave with: STM32 as host and also ESP as host. Right now our focus is with ESP to ESP.
There is branch, https://github.com/espressif/esp-hosted/tree/feature/esp_as_mcu_host (do not get confused with another similar named branch name)
Some time back I had added changes in espressif/esp-hosted-mcu#17 .
Again there are many ongoing changes (under review), which I expect to be pushed by this month end.
Hi @mantriyogesh, thanks for the quick reply. I am more interested in the ESP as slave with an STM32 master. Is the master branch the most updated one? Thanks in advance, Regards
we have done some development for ST as MCU, if you want to take a look (can provide as is and of coarse, cannot raise bug against unless goes in master!!).
As said earlier, right now we are concentrating esp as mcu. But anyway this code will will come back in focus at later some point. by the time can have a look: h1_mcu_st_and_esp.tgz
Hi,
Is there a plan to optimize performance on the MCU host? I have ported esp-hosted to Azure RTOS NetX DUO based on your reference implementation but performance is extremely low (1Mbps). It makes no sense if we can't improve the performance with this middleware.