[ESP32] I2C Read Operation is not working in ULP Core (IDFGH-9252)

Answers checklist.

[X] I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
[X] I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
[X] I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

v4.4.2

Operating System used.

Linux

How did you build your project?

Command line with idf.py

If you are using Windows, please specify command line type.

None

Development Kit.

ESP32-WOVER-IE

Power Supply used.

USB

What is the expected behavior?

When we read I2C data in the ULP core from Slave Address 0x76, It should store 0x58 in the R0 register.

What is the actual behavior?

When we read I2C data in the ULP core from Slave Address 0x76, It is storing 0xB1 in the R0 register.

Steps to reproduce.

Flash the below code in ESP32.

#define ULP_WAKEUP_INTERVAL_MS 5000
#define SLAVE1_ADDR    0x76
#define SCL_PIN GPIO_NUM_4
#define SDA_PIN GPIO_NUM_15

void init_ulp()
{
   printf("init ulp...\n");
   const ulp_insn_t program[] = {
      I_MOVI(R2, 36),
      I_I2C_READ(0, 0xD0),
      I_ST(R0, R2, 0),
      I_WAKE(),
      I_HALT(),
   };

   hulp_register_i2c_slave(0, SLAVE1_ADDR);
   hulp_configure_i2c_pins(SCL_PIN, SDA_PIN, true, true);

   const hulp_i2c_controller_config_t config = HULP_I2C_CONTROLLER_CONFIG_DEFAULT();
   ESP_ERROR_CHECK(hulp_configure_i2c_controller(&config));

   esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_AUTO);

   ESP_ERROR_CHECK(hulp_ulp_load(program, sizeof(program), ULP_WAKEUP_INTERVAL_MS * 1000, 0));
   ESP_ERROR_CHECK(hulp_ulp_run(0));
}

static inline uint16_t ulp_data_read(size_t offset)
{
    return RTC_SLOW_MEM[36 + offset] & 0xffff;
}

extern "C" void app_main()
{
   switch(esp_sleep_get_wakeup_cause()) {
      case ESP_SLEEP_WAKEUP_ULP :
         {
            printf("ULP wakeup\n");
            int16_t data = (int16_t)ulp_data_read(0);
            printf("data = 0x%x\n", data);
            break;
         }
      default :
         {
            printf("Not a deep sleep reset\n");
            init_ulp();
         }
   }
   ESP_ERROR_CHECK( esp_sleep_enable_ulp_wakeup() );
   esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);

   printf("entering in deep sleep...\n");
   vTaskDelay(1000/ portTICK_PERIOD_MS);
   esp_deep_sleep_start();
}```

### Debug Logs.

```plain
I (0) cpu_start: App cpu up.
I (227) cpu_start: Pro cpu start user code
I (227) cpu_start: cpu freq: 160000000
I (227) cpu_start: Application information:
I (231) cpu_start: Project name:     hulp_example_i2cbb_multi
I (238) cpu_start: App version:      2.0.1-51-g3cd0ef8-dirty
I (244) cpu_start: Compile time:     Jan 28 2023 19:27:46
I (250) cpu_start: ELF file SHA256:  c7b8e4952c5edfbf...
I (256) cpu_start: ESP-IDF:          v4.4.2-dirty
I (262) heap_init: Initializing. RAM available for dynamic allocation:
I (269) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (275) heap_init: At 3FFB2CB0 len 0002D350 (180 KiB): DRAM
I (281) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (287) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (294) heap_init: At 4008BE5C len 000141A4 (80 KiB): IRAM
I (301) spi_flash: detected chip: gd
I (304) spi_flash: flash io: dio
W (308) spi_flash: Detected size(8192k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (322) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
Not a deep sleep reset
init ulp...
entering in deep sleep...
ets Jul 29 2019 12:21:46
rst:0x5 (DEEPSLEEP_RESET),boot:0x17 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0030,len:6664
load:0x40078000,len:14848
load:0x40080400,len:3792
0x40080400: _init at ??:?
entry 0x40080694
I (27) boot: ESP-IDF v4.4.2-dirty 2nd stage bootloader
I (27) boot: compile time 19:27:51
I (27) boot: chip revision: 3
I (31) boot_comm: chip revision: 3, min. bootloader chip revision: 0
I (38) boot.esp32: SPI Speed      : 40MHz
I (42) boot.esp32: SPI Mode       : DIO
I (47) boot.esp32: SPI Flash Size : 2MB
I (52) boot: Enabling RNG early entropy source...
I (57) boot: Partition Table:
I (61) boot: ## Label            Usage          Type ST Offset   Length
I (68) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (75) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (83) boot:  2 factory          factory app      00 00 00010000 00100000
I (90) boot: End of partition table
I (94) boot_comm: chip revision: 3, min. application chip revision: 0
I (101) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=0925ch ( 37468) map
I (124) esp_image: segment 1: paddr=00019284 vaddr=3ffb0000 size=023b8h (  9144) load
I (128) esp_image: segment 2: paddr=0001b644 vaddr=40080000 size=049d4h ( 18900) load
I (137) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=168f0h ( 92400) map
I (171) esp_image: segment 4: paddr=00036918 vaddr=400849d4 size=07488h ( 29832) load
I (184) esp_image: segment 5: paddr=0003dda8 vaddr=400c0000 size=00064h (   100) 
I (184) esp_image: segment 6: paddr=0003de14 vaddr=50000200 size=00010h (    16) 
I (195) boot: Loaded app from partition at offset 0x10000
I (195) boot: Disabling RNG early entropy source...
I (212) cpu_start: Pro cpu up.
I (212) cpu_start: Starting app cpu, entry point is 0x40081104
0x40081104: call_start_cpu1 at /home/embrill/esp/esp-idf/components/esp_system/port/cpu_start.c:160
I (0) cpu_start: App cpu up.
I (226) cpu_start: Pro cpu start user code
I (226) cpu_start: cpu freq: 160000000
I (226) cpu_start: Application information:
I (231) cpu_start: Project name:     hulp_example_i2cbb_multi
I (237) cpu_start: App version:      2.0.1-51-g3cd0ef8-dirty
I (244) cpu_start: Compile time:     Jan 28 2023 19:27:46
I (250) cpu_start: ELF file SHA256:  c7b8e4952c5edfbf...
I (256) cpu_start: ESP-IDF:          v4.4.2-dirty
I (261) heap_init: Initializing. RAM available for dynamic allocation:
I (268) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM
I (274) heap_init: At 3FFB2CB0 len 0002D350 (180 KiB): DRAM
I (280) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM
I (287) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM
I (293) heap_init: At 4008BE5C len 000141A4 (80 KiB): IRAM
I (301) spi_flash: detected chip: gd
I (304) spi_flash: flash io: dio
W (308) spi_flash: Detected size(8192k) larger than the size in the binary image header(2048k). Using the size in the binary image header.
I (322) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
ULP wakeup
### ulp i2c_rd data ### = 0xb1 177
entering in deep sleep...

More Information.

I am using I_I2C_READ API to read data from Slave Address in the ULP core. When I check the I2C signal in the logic analyzer, it shows expected behaviour and the slave is responding. But the ULP code couldn't store data in the R0 register.

espressif / esp-idf