esp_idf5.0.2 rgb_panel demo Unlimited restart problem (IDFGH-10515)

[GodVerture]

Answers checklist.

• [X] I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
• [X] I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
• [X] I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

esp-idf-v5.0.2

Operating System used.

Windows

How did you build your project?

VS Code IDE

If you are using Windows, please specify command line type.

None

Development Kit.

esp32-s3-wroom-1u

Power Supply used.

External 5V

What is the expected behavior?

A scatter chart will show up on the LCD as expected.

What is the actual behavior?

run examples/peripherals/lcd/rgb_panel demo,Continue to restart

Steps to reproduce.

1.After running the program, the screen shines for about 30 seconds, but the backlight is not white, but a little blue 2.Then start to restart 3.Attach the changed code to more information

Debug Logs.

PS G:\EspLcdLvgl\rgb_panel> set IDF_PATH=C:/Espressif/frameworks/esp-idf-v5.0.2/
PS G:\EspLcdLvgl\rgb_panel> C:/Espressif/python_env/idf5.0_py3.11_env/Scripts/python.exe C:\Espressif\frameworks\esp-idf-v5.0.2\tools\idf_monitor.py -p COM7 -b 115200 --toolchain-prefix xtensa-esp32s3-elf- --target esp32s3 g:\EspLcdLvgl\rgb_panel\build\rgb_panel.elf
--- WARNING: GDB cannot open serial ports accessed as COMx
--- Using \\.\COM7 instead...
--- idf_monitor on \\.\COM7 115200 ---
--- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H ---
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x1b (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x165c
load:0x403c9700,len:0xbe0
load:0x403cc700,len:0x2d9c
entry 0x403c9900
I (25) boot: ESP-IDF v5.0.2-dirty 2nd stage bootloader
I (25) boot: compile time 12:20:18
I (25) boot: chip revision: v0.1
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (32) boot.esp32s3: SPI Mode       : DIO
I (37) boot.esp32s3: SPI Flash Size : 16MB
I (42) boot: Enabling RNG early entropy source...
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=00010020 vaddr=3c050020 size=0f70ch ( 63244) map
I (104) esp_image: segment 1: paddr=0001f734 vaddr=3fc93600 size=008e4h (  2276) load
I (105) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=47de8h (294376) map
I (163) esp_image: segment 3: paddr=00067e10 vaddr=3fc93ee4 size=02444h (  9284) load
I (165) esp_image: segment 4: paddr=0006a25c vaddr=40374000 size=0f55ch ( 62812) load
I (189) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) octal_psram: vendor id    : 0x0d (AP)
I (200) octal_psram: dev id       : 0x02 (generation 3)
I (201) octal_psram: density      : 0x03 (64 Mbit)
I (205) octal_psram: good-die     : 0x01 (Pass)
I (211) octal_psram: Latency      : 0x01 (Fixed)
I (216) octal_psram: VCC          : 0x01 (3V)
I (221) octal_psram: SRF          : 0x01 (Fast Refresh)
I (227) octal_psram: BurstType    : 0x01 (Hybrid Wrap)
I (233) octal_psram: BurstLen     : 0x01 (32 Byte)
I (238) octal_psram: Readlatency  : 0x02 (10 cycles@Fixed)
I (244) octal_psram: DriveStrength: 0x00 (1/1)
I (250) esp_psram: Found 8MB PSRAM device
I (254) esp_psram: Speed: 80MHz
I (292) mmu_psram: Instructions copied and mapped to SPIRAM
I (299) mmu_psram: Read only data copied and mapped to SPIRAM
I (299) cpu_start: Pro cpu up.
I (299) cpu_start: Starting app cpu, entry point is 0x403753dc
0x403753dc: call_start_cpu1 at C:/Espressif/frameworks/esp-idf-v5.0.2/components/esp_system/port/cpu_start.c:141

I (0) cpu_start: App cpu up.
I (729) esp_psram: SPI SRAM memory test OK
I (738) cpu_start: Pro cpu start user code
I (738) cpu_start: cpu freq: 240000000 Hz
I (738) cpu_start: Application information:
I (741) cpu_start: Project name:     rgb_panel
I (746) cpu_start: App version:      1
I (751) cpu_start: Compile time:     Jun 17 2023 18:00:19
I (757) cpu_start: ELF file SHA256:  0fe0ffccbd3e5b3e...
I (763) cpu_start: ESP-IDF:          v5.0.2-dirty
I (768) cpu_start: Min chip rev:     v0.0
I (773) cpu_start: Max chip rev:     v0.99 
I (778) cpu_start: Chip rev:         v0.1
I (782) heap_init: Initializing. RAM available for dynamic allocation:
I (789) heap_init: At 3FC972B8 len 00052458 (329 KiB): DRAM
I (796) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (802) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (809) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (815) esp_psram: Adding pool of 7808K of PSRAM memory to heap allocator
I (823) spi_flash: detected chip: gd
I (827) spi_flash: flash io: dio
I (831) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (851) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (851) example: Create semaphores
I (861) example: Turn off LCD backlight
I (861) gpio: GPIO[4]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (871) example: Install RGB LCD panel driver
I (881) example: Register event callbacks
I (881) example: Initialize RGB LCD panel
I (891) example: Turn on LCD backlight
----->line3:188
----->line4:190
I (891) example: Initialize LVGL library
I (901) example: Allocate separate LVGL draw buffers from PSRAM
I (901) example: Register display driver to LVGL
I (911) example: Install LVGL tick timer
I (911) example: Display LVGL Scatter Chart
GESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x1b (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x165c
load:0x403c9700,len:0xbe0
load:0x403cc700,len:0x2d9c
entry 0x403c9900
I (25) boot: ESP-IDF v5.0.2-dirty 2nd stage bootloader
I (25) boot: compile time 12:20:18
I (25) boot: chip revision: v0.1
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (32) boot.esp32s3: SPI Mode       : DIO
I (37) boot.esp32s3: SPI Flash Size : 16MB
I (42) boot: Enabling RNG early entropy source...
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=00010020 vaddr=3c050020 size=0f70ch ( 63244) map
I (104) esp_image: segment 1: paddr=0001f734 vaddr=3fc93600 size=008e4h (  2276) load
I (105) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=47de8h (294376) map
I (163) esp_image: segment 3: paddr=00067e10 vaddr=3fc93ee4 size=02444h (  9284) load
I (165) esp_image: segment 4: paddr=0006a25c vaddr=40374000 size=0f55ch ( 62812) load
I (189) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) octal_psram: vendor id    : 0x0d (AP)
I (200) octal_psram: dev id       : 0x02 (generation 3)
I (201) octal_psram: density      : 0x03 (64 Mbit)
I (205) octal_psram: good-die     : 0x01 (Pass)
I (211) octal_psram: Latency      : 0x01 (Fixed)
I (216) octal_psram: VCC          : 0x01 (3V)
I (221) octal_psram: SRF          : 0x01 (Fast Refresh)
I (227) octal_psram: BurstType    : 0x01 (Hybrid Wrap)
I (233) octal_psram: BurstLen     : 0x01 (32 Byte)
I (238) octal_psram: Readlatency  : 0x02 (10 cycles@Fixed)
I (244) octal_psram: DriveStrength: 0x00 (1/1)
I (250) esp_psram: Found 8MB PSRAM device
I (254) esp_psram: Speed: 80MHz
I (292) mmu_psram: Instructions copied and mapped to SPIRAM
I (299) mmu_psram: Read only data copied and mapped to SPIRAM
I (299) cpu_start: Pro cpu up.
I (299) cpu_start: Starting app cpu, entry point is 0x403753dc
0x403753dc: call_start_cpu1 at C:/Espressif/frameworks/esp-idf-v5.0.2/components/esp_system/port/cpu_start.c:141

I (0) cpu_start: App cpu up.
I (729) esp_psram: SPI SRAM memory test OK
I (738) cpu_start: Pro cpu start user code
I (738) cpu_start: cpu freq: 240000000 Hz
I (738) cpu_start: Application information:
I (741) cpu_start: Project name:     rgb_panel
I (746) cpu_start: App version:      1
I (751) cpu_start: Compile time:     Jun 17 2023 18:00:19
I (757) cpu_start: ELF file SHA256:  0fe0ffccbd3e5b3e...
I (763) cpu_start: ESP-IDF:          v5.0.2-dirty
I (768) cpu_start: Min chip rev:     v0.0
I (773) cpu_start: Max chip rev:     v0.99 
I (778) cpu_start: Chip rev:         v0.1
I (782) heap_init: Initializing. RAM available for dynamic allocation:
I (789) heap_init: At 3FC972B8 len 00052458 (329 KiB): DRAM
I (796) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (802) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (809) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (815) esp_psram: Adding pool of 7808K of PSRAM memory to heap allocator
I (823) spi_flash: detected chip: gd
I (827) spi_flash: flash io: dio
I (831) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (851) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (851) example: Create semaphores
I (861) example: Turn off LCD backlight
I (861) gpio: GPIO[4]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (871) example: Install RGB LCD panel driver
I (881) example: Register event callbacks
I (881) example: Initialize RGB LCD panel
I (891) example: Turn on LCD backlight
----->line3ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x1b (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x165c
load:0x403c9700,len:0xbe0
load:0x403cc700,len:0x2d9c
entry 0x403c9900
I (25) boot: ESP-IDF v5.0.2-dirty 2nd stage bootloader
I (25) boot: compile time 12:20:18
I (25) boot: chip revision: v0.1
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (32) boot.esp32s3: SPI Mode       : DIO
I (37) boot.esp32s3: SPI Flash Size : 16MB
I (42) boot: Enabling RNG early entropy source...
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=00010020 vaddr=3c050020 size=0f70ch ( 63244) map
I (104) esp_image: segment 1: paddr=0001f734 vaddr=3fc93600 size=008e4h (  2276) load
I (105) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=47de8h (294376) map
I (163) esp_image: segment 3: paddr=00067e10 vaddr=3fc93ee4 size=02444h (  9284) load
I (165) esp_image: segment 4: paddr=0006a25c vaddr=40374000 size=0f55ch ( 62812) load
I (189) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) octal_psram: vendor id    : 0x0d (AP)
I (200) octal_psram: dev id       : 0x02 (generation 3)
I (201) octal_psram: density      : 0x03 (64 Mbit)
I (205) octal_psram: good-die     : 0x01 (Pass)
I (211) octal_psram: Latency      : 0x01 (Fixed)
I (216) octal_psram: VCC          : 0x01 (3V)
I (221) octal_psram: SRF          : 0x01 (Fast Refresh)
I (227) octal_psram: BurstType    : 0x01 (Hybrid Wrap)
I (233) octal_psram: BurstLen     : 0x01 (32 Byte)
I (238) octal_psram: Readlatency  : 0x02 (10 cycles@Fixed)
I (244) octal_psram: DriveStrength: 0x00 (1/1)
I (250) esp_psram: Found 8MB PSRAM device
I (254) esp_psram: Speed: 80MHz
I (292) mmu_psram: Instructions copied and mapped to SPIRAM
I (299) mmu_psram: Read only data copied and mapped to SPIRAM
I (299) cpu_start: Pro cpu up.
I (299) cpu_start: Starting app cpu, entry point is 0x403753dc
0x403753dc: call_start_cpu1 at C:/Espressif/frameworks/esp-idf-v5.0.2/components/esp_system/port/cpu_start.c:141

I (0) cpu_start: App cpu up.
I (729) esp_psram: SPI SRAM memory test OK
I (738) cpu_start: Pro cpu start user code
I (738) cpu_start: cpu freq: 240000000 Hz
I (738) cpu_start: Application information:
I (741) cpu_start: Project name:     rgb_panel
I (746) cpu_start: App version:      1
I (751) cpu_start: Compile time:     Jun 17 2023 18:00:19
I (757) cpu_start: ELF file SHA256:  0fe0ffccbd3e5b3e...
I (763) cpu_start: ESP-IDF:          v5.0.2-dirty
I (768) cpu_start: Min chip rev:     v0.0
I (773) cpu_start: Max chip rev:     v0.99 
I (778) cpu_start: Chip rev:         v0.1
I (782) heap_init: Initializing. RAM available for dynamic allocation:
I (789) heap_init: At 3FC972B8 len 00052458 (329 KiB): DRAM
I (796) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (802) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (809) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (815) esp_psram: Adding pool of 7808K of PSRAM memory to heap allocator
I (823) spi_flash: detected chip: gd
I (827) spi_flash: flash io: dio
I (831) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (851) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (851) example: Create semaphores
I (861) example: Turn off LCD backlight
I (861) gpio: GPIO[4]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (871) example: Install RGB LCD panel driver
I (881) example: Register event callbacks
I (881) example: Initialize RGB LCD panel
I (891) example: Turn on LCD backlight
----->line3:188
----->line4:190
ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x1b (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x165c
load:0x403c9700,len:0xbe0
load:0x403cc700,len:0x2d9c
entry 0x403c9900
I (25) boot: ESP-IDF v5.0.2-dirty 2nd stage bootloader
I (25) boot: compile time 12:20:18
I (25) boot: chip revision: v0.1
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (32) boot.esp32s3: SPI Mode       : DIO
I (37) boot.esp32s3: SPI Flash Size : 16MB
I (42) boot: Enabling RNG early entropy source...
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=00010020 vaddr=3c050020 size=0f70ch ( 63244) map
I (104) esp_image: segment 1: paddr=0001f734 vaddr=3fc93600 size=008e4h (  2276) load
I (105) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=47de8h (294376) map
I (163) esp_image: segment 3: paddr=00067e10 vaddr=3fc93ee4 size=02444h (  9284) load
I (165) esp_image: segment 4: paddr=0006a25c vaddr=40374000 size=0f55ch ( 62812) load
I (189) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) octal_psram: vendor id    : 0x0d (AP)
I (200) octal_psram: dev id       : 0x02 (generation 3)
I (201) octal_psram: density      : 0x03 (64 Mbit)
I (205) octal_psram: good-die     : 0x01 (Pass)
I (211) octal_psram: Latency      : 0x01 (Fixed)
I (216) octal_psram: VCC          : 0x01 (3V)
I (221) octal_psram: SRF          : 0x01 (Fast Refresh)
I (227) octal_psram: BurstType    : 0x01 (Hybrid Wrap)
I (233) octal_psram: BurstLen     : 0x01 (32 Byte)
I (238) octal_psram: Readlatency  : 0x02 (10 cycles@Fixed)
I (244) octal_psram: DriveStrength: 0x00 (1/1)
I (250) esp_psram: Found 8MB PSRAM device
I (254) esp_psram: Speed: 80MHz
I (292) mmu_psram: Instructions copied and mapped to SPIRAM
I (299) mmu_psram: Read only data copied and mapped to SPIRAM
I (299) cpu_start: Pro cpu up.
I (299) cpu_start: Starting app cpu, entry point is 0x403753dc
0x403753dc: call_start_cpu1 at C:/Espressif/frameworks/esp-idf-v5.0.2/components/esp_system/port/cpu_start.c:141

I (0) cpu_start: App cpu up.
I (729) esp_psram: SPI SRAM memory test OK
I (738) cpu_start: Pro cpu start user code
I (738) cpu_start: cpu freq: 240000000 Hz
I (738) cpu_start: Application information:
I (741) cpu_start: Project name:     rgb_panel
I (746) cpu_start: App version:      1
I (751) cpu_start: Compile time:     Jun 17 2023 18:00:19
I (757) cpu_start: ELF file SHA256:  0fe0ffccbd3e5b3e...
I (763) cpu_start: ESP-IDF:          v5.0.2-dirty
I (768) cpu_start: Min chip rev:     v0.0
I (773) cpu_start: Max chip rev:     v0.99 
I (778) cpu_start: Chip rev:         v0.1
I (782) heap_init: Initializing. RAM available for dynamic allocation:
I (790) heap_init: At 3FC972B8 len 00052458 (329 KiB): DRAM
I (796) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (802) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (809) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (815) esp_psram: Adding pool of 7808K of PSRAM memory to heap allocator
I (823) spi_flash: detected chip: gd
I (827) spi_flash: flash io: dio
I (831) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (851) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (851) example: Create semaphores
I (861) example: Turn off LCD backlight
I (861) gpio: GPIO[4]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (871) example: Install RGB LCD panel driver
I (881) example: Register event callbacks
I (881) example: Initialize RGB LCD panel
I (891) example: Turn on LCD backlight
----->line3:188
----->line4:190
I (891) exam0lESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x1b (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x165c
load:0x403c9700,len:0xbe0
load:0x403cc700,len:0x2d9c
entry 0x403c9900
I (25) boot: ESP-IDF v5.0.2-dirty 2nd stage bootloader
I (25) boot: compile time 12:20:18
I (25) boot: chip revision: v0.1
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (32) boot.esp32s3: SPI Mode       : DIO
I (37) boot.esp32s3: SPI Flash Size : 16MB
I (42) boot: Enabling RNG early entropy source...
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=00010020 vaddr=3c050020 size=0f70ch ( 63244) map
I (104) esp_image: segment 1: paddr=0001f734 vaddr=3fc93600 size=008e4h (  2276) load
I (105) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=47de8h (294376) map
I (163) esp_image: segment 3: paddr=00067e10 vaddr=3fc93ee4 size=02444h (  9284) load
I (165) esp_image: segment 4: paddr=0006a25c vaddr=40374000 size=0f55ch ( 62812) load
I (189) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) octal_psram: vendor id    : 0x0d (AP)
I (200) octal_psram: dev id       : 0x02 (generation 3)
I (201) octal_psram: density      : 0x03 (64 Mbit)
I (205) octal_psram: good-die     : 0x01 (Pass)
I (211) octal_psram: Latency      : 0x01 (Fixed)
I (216) octal_psram: VCC          : 0x01 (3V)
I (221) octal_psram: SRF          : 0x01 (Fast Refresh)
I (227) octal_psram: BurstType    : 0x01 (Hybrid Wrap)
I (233) octal_psram: BurstLen     : 0x01 (32 Byte)
I (238) octal_psram: Readlatency  : 0x02 (10 cycles@Fixed)
I (244) octal_psram: DriveStrength: 0x00 (1/1)
I (250) esp_psram: Found 8MB PSRAM device
I (254) esp_psram: Speed: 80MHz
I (292) mmu_psram: Instructions copied and mapped to SPIRAM
I (299) mmu_psram: Read only data copied and mapped to SPIRAM
I (299) cpu_start: Pro cpu up.
I (299) cpu_start: Starting app cpu, entry point is 0x403753dc
0x403753dc: call_start_cpu1 at C:/Espressif/frameworks/esp-idf-v5.0.2/components/esp_system/port/cpu_start.c:141

I (0) cpu_start: App cpu up.
I (729) esp_psram: SPI SRAM memory test OK
I (738) cpu_start: Pro cpu start user code
I (738) cpu_start: cpu freq: 240000000 Hz
I (738) cpu_start: Application information:
I (741) cpu_start: Project name:     rgb_panel
I (746) cpu_start: App version:      1
I (751) cpu_start: Compile time:     Jun 17 2023 18:00:19
I (757) cpu_start: ELF file SHA256:  0fe0ffccbd3e5b3e...
I (763) cpu_start: ESP-IDF:          v5.0.2-dirty
I (768) cpu_start: Min chip rev:     v0.0
I (773) cpu_start: Max chip rev:     v0.99 
I (778) cpu_start: Chip rev:         v0.1
I (782) heap_init: Initializing. RAM available for dynamic allocation:
I (790) heap_init: At 3FC972B8 len 00052458 (329 KiB): DRAM
I (796) heap_init: At 3FCE9710 len 00005724 (21 KiB): STACK/DRAM
I (802) heap_init: At 3FCF0000 len 00008000 (32 KiB): DRAM
I (809) heap_init: At 600FE010 len 00001FF0 (7 KiB): RTCRAM
I (815) esp_psram: Adding pool of 7808K of PSRAM memory to heap allocator
I (823) spi_flash: detected chip: gd
I (827) spi_flash: flash io: dio
I (831) cpu_start: Starting scheduler on PRO CPU.
I (0) cpu_start: Starting scheduler on APP CPU.
I (851) esp_psram: Reserving pool of 32K of internal memory for DMA/internal allocations
I (851) example: Create semaphores
I (861) example: Turn off LCD backlight
I (861) gpio: GPIO[4]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 
I (871) example: Install RGB LCD panel driver
I (881) example: Register event callbacks
I (881) example: Initialize RGB LCD panel
I (891) example: Turn on LCD backlight
----->line3:188
----->line4:190
I (891) example: Initialize LVCD ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0x1 (POWERON),boot:0x1b (SPI_FAST_FLASH_BOOT)
SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3810,len:0x165c
load:0x403c9700,len:0xbe0
load:0x403cc700,len:0x2d9c
entry 0x403c9900
I (25) boot: ESP-IDF v5.0.2-dirty 2nd stage bootloader
I (25) boot: compile time 12:20:18
I (25) boot: chip revision: v0.1
I (27) boot.esp32s3: Boot SPI Speed : 80MHz
I (32) boot.esp32s3: SPI Mode       : DIO
I (37) boot.esp32s3: SPI Flash Size : 16MB
I (42) boot: Enabling RNG early entropy source...
I (47) boot: Partition Table:
I (51) boot: ## Label            Usage          Type ST Offset   Length
I (58) boot:  0 nvs              WiFi data        01 02 00009000 00006000
I (65) boot:  1 phy_init         RF data          01 01 0000f000 00001000
I (73) boot:  2 factory          factory app      00 00 00010000 00100000
I (80) boot: End of partition table
I (84) esp_image: segment 0: paddr=00010020 vaddr=3c050020 size=0f70ch ( 63244) map
I (104) esp_image: segment 1: paddr=0001f734 vaddr=3fc93600 size=008e4h (  2276) load
I (105) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=47de8h (294376) map
I (163) esp_image: segment 3: paddr=00067e10 vaddr=3fc93ee4 size=02444h (  9284) load
I (165) esp_image: segment 4: paddr=0006a25c vaddr=40374000 size=0f55ch ( 62812) load
I (189) boot: Loaded app from partition at offset 0x10000
I (189) boot: Disabling RNG early entropy source...
I (200) octal_psram: vendor id    : 0x0d (AP)
I (200) octal_psram: dev id       : 0x02 (generation 3)
I (201) oct

More Information.

According to the schematic diagram and the screen data changes are as follows： ``#define EXAMPLE_LCD_PIXEL_CLOCK_HZ (65 100 1000) //6.5Mhz

define EXAMPLE_LCD_BK_LIGHT_ON_LEVEL 1

define EXAMPLE_LCD_BK_LIGHT_OFF_LEVEL !EXAMPLE_LCD_BK_LIGHT_ON_LEVEL

define EXAMPLE_PIN_NUM_BK_LIGHT 4

define EXAMPLE_PIN_NUM_HSYNC 20

define EXAMPLE_PIN_NUM_VSYNC 19

define EXAMPLE_PIN_NUM_DE 15

define EXAMPLE_PIN_NUM_PCLK 7

define EXAMPLE_PIN_NUM_DATA0 39 // B0

define EXAMPLE_PIN_NUM_DATA1 48 // B1

define EXAMPLE_PIN_NUM_DATA2 47 // B2

define EXAMPLE_PIN_NUM_DATA3 21 // B3

define EXAMPLE_PIN_NUM_DATA4 14 // B4

define EXAMPLE_PIN_NUM_DATA5 13 // G0

define EXAMPLE_PIN_NUM_DATA6 12 // G1

define EXAMPLE_PIN_NUM_DATA7 11 // G2

define EXAMPLE_PIN_NUM_DATA8 10 // G3

define EXAMPLE_PIN_NUM_DATA9 16 // G4

define EXAMPLE_PIN_NUM_DATA10 38 // G5

define EXAMPLE_PIN_NUM_DATA11 46 // R0

define EXAMPLE_PIN_NUM_DATA12 8 // R1

define EXAMPLE_PIN_NUM_DATA13 3 // R2

define EXAMPLE_PIN_NUM_DATA14 40 // R3

define EXAMPLE_PIN_NUM_DATA15 9 // R4

define EXAMPLE_PIN_NUM_DISP_EN -1

// The pixel number in horizontal and vertical

define EXAMPLE_LCD_H_RES 320

define EXAMPLE_LCD_V_RES 240

   .timings = {
        .pclk_hz = EXAMPLE_LCD_PIXEL_CLOCK_HZ,
        .h_res = EXAMPLE_LCD_H_RES,
        .v_res = EXAMPLE_LCD_V_RES,
        // The following parameters should refer to LCD spec
        .hsync_back_porch = 68,
        .hsync_front_porch = 20,
        .hsync_pulse_width = 5,
        .vsync_back_porch = 18,
        .vsync_front_porch = 4,
        .vsync_pulse_width = 1,
        .flags.pclk_active_neg = true,
    },
    .flags.fb_in_psram = true, // allocate frame buffer in PSRAM
};
ESP_ERROR_CHECK(esp_lcd_new_rgb_panel(&panel_config, &panel_handle));

[suda-morris]

Can you try not use GPIO19 and 20 for as the LCD HSYNC and VSYNC? They're used by USB by default. https://docs.espressif.com/projects/esp-idf/en/latest/esp32s3/api-reference/peripherals/gpio.html

[GodVerture]

There are no free pins to use，Can GPIO19 and GPIO20 be used as regular io?

[suda-morris]

it can. As long as you don't use the USB-Serial-JTAG as the console.

I ran the example with the GPIO mapping provided by you (didn't connect to an LCD though). My board didn't experience a "Power On Reset" like yours. Please check your power supply.

[GodVerture]

不接lcd屏的时候，我这边demo也是正常的，但是接上屏幕后，就会出现最开始提问的那种情况，请问有可能是什么原因引起的