Open msarmadsaeed opened 7 months ago
ESP-Marius
commented
7 months ago I assume you are using the ULP-FSM, right?
Try keeping the RTC peripheral power domain on:
esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON);like we do on master. On S3 this domain will powerdown during sleep if the ULP is sleeping, causing any configured ADC related register to be reset. This might explain why you are getting this readings
msarmadsaeed
commented
7 months ago Yes I did try that as well. I tried by only using esp_sleep_pd_config(ESP_PD_DOMAIN_RTC_PERIPH, ESP_PD_OPTION_ON); this config for PD with and without esp_sleep_pd_config(ESP_PD_DOMAIN_VDDSDIO, ESP_PD_OPTION_ON); but it didn't work either. I tried putting other RTC configs in PD on but nothing worked.
ESP-Marius
commented
7 months ago Hmm,
Are you able to reproduce this with a minimal example that you could share with me? When I tested the results seemed to be as expected
msarmadsaeed
commented
7 months ago ulp.zip Here are the project files you can use. I have found if I change ulp_high_thr value 4095 (line 209) i am able to go into sleep and it wakes up because of timer. But that behavior is wrong, for any other value than 4095 it instantly wakes up even though the values of adc are within threshold.
This example is very similar to the adc ulp example in the esp-idf. It has the same assembly code and c code according to v4.4.
To go within bounds you can adjust the value of SetTemp (line 138).
Also if ESP_PD_DOMAIN_VDDSDIO has PD on during sleep the last value returned is always 4095 and reads woke up because of temp. And even in this condition with PD off, even though it returns the right last value which shoes is with in bounds, it reads woke up because of temp (means value was out of bounds.)
Answers checklist.
IDF version.
v4.4
Espressif SoC revision.
ESP32-S3
Operating System used.
macOS
How did you build your project?
Command line with idf.py
If you are using Windows, please specify command line type.
None
Development Kit.
ESP32S3
Power Supply used.
USB
What is the expected behavior?
We were previously using ESP32 chips and the sleep(light sleep) was working perfectly fine with the ADC and ADC values were causing the device to wake from sleep, but since we moved to S3 chip when we go into sleep (light sleep), the ADC doesn't seem to be working, when waking up from sleep last value is 4095. On the contrary when I run the ULP in parallel with the main processors it works fine and is reading the right values. We are currently using v4.4 of idf that has support for S3 chips. We can not port code to the latest version because of our library dependencies and product pilot being a critical path. The behavior on the main processors is exactly the same as it was on ESP32 processor for the S3 chip.
What is the actual behavior?
The device is supposed to go into sleep when ADC values are within bounds and wake up when the values are out of the threshold. It goes into sleep and then instantly wakes up because the value it reads in 4095 and it is out of bounds. The ULP is reading right values when running in parallel with the main processors, something not working when main processors go into sleep.
Steps to reproduce.
These are the functions that are called leading to triggering of ULP:
esp_err_t err = ulp_load_binary(0, bin_start, (bin_end - bin_start) / sizeof(uint32_t)); adc1_ulp_enable(); esp_sleep_pd_config(ESP_PD_DOMAIN_VDDSDIO, ESP_PD_OPTION_ON); esp_sleep_enable_timer_wakeup(get_report_period() * MILLIS_TO_MICRO); err = esp_sleep_enable_ulp_wakeup(); ulp_run(&ulp_entry - RTC_SLOW_MEM); esp_light_sleep_start(); ulp_timer_stop();Debug Logs.
No response
More Information.
No response