SPI issue in v4.1: DMA MOSI transmissions have gaps, but SCK does not. (IDFGH-4569)

Environment

Development Kit: Custom ESP32 board
Kit version (for WroverKit/PicoKit/DevKitC): n/a
Module or chip used: ESP32-WROOM-32U
IDF version (run git describe --tags to find it): v4.1 -- (I have not updated to master to see if this is the issue, but will check tomorrow AM)
Build System: CMake
Compiler version (run xtensa-esp32-elf-gcc --version to find it): xtensa-esp32-elf-gcc (crosstool-NG esp-2020r2) 8.2.0
Operating System: [Windows|Linux|macOS]
(Windows only) environment type: [MSYS2 mingw32|ESP Command Prompt|Plain Command Prompt|PowerShell].
Using an IDE?: VSCode
Power Supply: external 12V through 60W DC-DC and then 3.3V LDO

Problem Description

When doing large (4608 bytes, in this case) SPI transactions using DMA, there are gaps in the MOSI datastream that are not matched by the SCK datastream.

That is to say: there are the expected (due to RTOS task switching) disruptions in the MOSI line, but the SCK line continues clocking. This, of course, completely destroys the integrity of the data as the MOSI line is read as 0x00.

Expected Behavior

When MOSI pauses, SCK should pause as well.

Steps to reproduce

Execute the attached code

Code to reproduce this issue

https://gist.github.com/benpeoples/47d9837120fe606ac625795654f43447

This fills the framebuffer with a repeating pattern of 0x01 0x02 0x03 and then transmits it, using DMA as the buffer is larger than 64 bytes.

Revising the lcd_cmd function with this:

void lcd_cmd(spi_device_handle_t spi)
{
    esp_err_t ret;
    spi_transaction_t t;

    for(int x = 0; x < 72; x++)
    {
    memset(&t, 0, sizeof(t));       //Zero out the transaction
    t.length=64*8;                     //Command is 8 bits
    t.tx_buffer=framebuffer+x*64;               //The data is the cmd itself
    ret=spi_device_transmit(spi,&t); 
    assert(ret==ESP_OK);            //Should have had no issues.
    }

}

is the workaround I'm currently using, and this works with short (44us) gaps between the transmissions. I took manual control of the CS line so we don't toggle that between spi_device_transmits

Here are the SPI traces in PulseView: https://imgur.com/a/5Iabif7

The top signal is MOSI, the lower signal is SCK. While I did not zoom all the way in, the SCK clock is clean and consistent through these MOSI pauses.

espressif / esp-idf