Closed roysG closed 3 years ago
Hi @roysG
It sounds like you might be trying to flash a device where flash encryption is already enabled. You can check this with espefuse.py summary
, if FLASH_CRYPT_CNT
's value is an odd number of bits, then flash encryption is enabled and the method described here will not work.
If flash encryption is already enabled in release mode and OTA is not possible then the only option is to pre-encrypt the binary on your PC before flashing it (assuming you have the key). See https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/flash-encryption.html#manual-encryption for how to do this.
But, i could not understand how to run the last line code line: espefuse.py --port /dev/usb-0001 burn_key BLOCK my_flash_encryption_key.bin XTS_AES_128_KEY What should i set instead the "BLOCK" and "XTS_AES_128_KEY"?
Sorry, this is our mistake. Seems like some commands that are only used for ESP32-S2 is present in the ESP32 documentation. This line is not needed on ESP32. I'll make sure we update the docs here.
Hi, Thank you for your reply, i have a key for flash encryption.
But the encryption still does not work. Can you tell me the commands for generate the encrypted code, that works for you?
Thanks
On Thu, 9 Sep 2021, 5:33 ESP-Marius @.***> wrote:
Hi @roysG https://github.com/roysG
It sounds like you might be trying to flash a device where flash encryption is already enabled. You can check this with espefuse.py summary, if FLASH_CRYPT_CNT's value is an odd number of bits, then flash encryption is enabled and the method described here will not work.
If flash encryption is already enabled in release mode and OTA is not possible then the only option is to pre-encrypt the binary on your PC before flashing it (assuming you have the key). See https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/flash-encryption.html#manual-encryption for how to do this.
But, i could not understand how to run the last line code line: espefuse.py --port /dev/usb-0001 burn_key BLOCK my_flash_encryption_key.bin XTS_AES_128_KEY What should i set instead the "BLOCK" and "XTS_AES_128_KEY"? Sorry, this is our mistake. Seems like some commands that are only used for ESP32-S2 is present in the ESP32 documentation. This line is not needed on ESP32. I'll make sure we update the docs here.
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You will have to explain a bit more in details what the status is.
Is flash encryption already enabled? (value of the efuse FLASH_CRYPT_CNT)? If yes then follow the instructions here: https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/flash-encryption.html#manually-encrypting-files
This is the summary of the device:
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1128 R/W (0b00100)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 51 R/W (0x33) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = ac:67:b2:2c:0e:20 (CRC 0x27 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 39 R/W (0x27) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 3 R/W (0b0000011) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = False R/W (0b0) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).
As it looks the flash encryption already enabled
I tried to run this commands as follow your link:
` espsecure.py encrypt_flash_data --keyfile flash_encryption_key.bin --address 0x10000 --output build/arduino-lib-builder-encrypted.bin build/arduino-lib-builder.bin
esptool.py -b 115200 write_flash 0x0 build/arduino-lib-builder-encrypted.bin
idf.py monitor
` But this is the result i get continuously in monitor this messages:
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
Alos i checked in menuconfig that flash encyption is disabled
Actually if FLASH_CRYPT_CNT is an even number of bits then flash encryption is disabled.
Just flashing the plaintext with idf.py flash
should work fine now that the encryption efuse is disabled.
You can either:
SECURE_FLASH_ENC_ENABLED
config is not enabled. Project should now boot and run without flash encryptionSECURE_FLASH_ENC_ENABLED
config is enabled. Project should now boot, encrypt the binary, burn efuse to enable flash encryption."Flash a project where the SECURE_FLASH_ENC_ENABLED config is enabled. Project should now boot, encrypt the binary, burn efuse to enable flash encryption."
You mean, change in the menuconfig the option to allow flash encryption and the run command: "idf.py flash monitor", right?
Yes, but be aware that on bootup it will burn efuses and there is no way to undo this.
I enabled it as production and this is what i get in the monitor:
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
This is the result from summary:
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1128 R/W (0b00100)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 51 R/W (0x33) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = ac:67:b2:2c:0e:20 (CRC 0x27 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 39 R/W (0x27) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 3 R/W (0b0000011) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = False R/W (0b0) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).
I think you are probably still burning a pre-encrypted binary to a chip where flash enc is not enabled.
Could you please post the whole log from when you are flashing?
Yes of course, Do you want i will put here the output of "idf.py flash" ?
Yes please
$ idf.py flash Executing action: flash Serial port /dev/cu.usbserial-3 Connecting........
Detecting chip type... ESP32 Running ninja in directory /Users/roysabah/esp/esp32-arduino-lib-builder/build Executing "ninja flash"... [1/5] cd /Users/roysabah/esp/esp32-arduino-lib-builder...sp32-arduino-lib-builder/build/arduino-lib-builder.bin arduino-lib-builder.bin binary size 0xad550 bytes. Smallest app partition is 0x100000 bytes. 0x52ab0 bytes (32%) free. [2/5] Performing build step for 'bootloader' [1/1] cd /Users/roysabah/esp/esp32-arduino-lib-builder/build/bootloader/esp-idf/esptool_py && /Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python /Users/roysabah/esp/esp-idf/components/partition_table/check_sizes.py --offset 0x80000 bootloader 0x1000 /Users/roysabah/esp/esp32-arduino-lib-builder/build/bootloader/bootloader.bin Bootloader binary size 0x5570 bytes. 0x79a90 bytes (2278%) free. [2/3] cd /Users/roysabah/esp/esp-idf/components/esptoo...sp/esp-idf/components/esptool_py/run_serial_tool.cmake esptool.py esp32 -p /dev/cu.usbserial-3 -b 460800 --before=default_reset --after=no_reset write_flash --flash_mode dio --flash_freq 40m --flash_size 2MB 0x1000 bootloader/bootloader.bin 0x90000 arduino-lib-builder.bin 0x80000 partition_table/partition-table.bin esptool.py v3.2-dev Serial port /dev/cu.usbserial-3 Connecting........__ Chip is ESP32-D0WDQ6 (revision 1) Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None Crystal is 40MHz MAC: ac:67:b2:2c:0e:20 Uploading stub... Running stub... Stub running... Changing baud rate to 460800 Changed. Configuring flash size... Flash will be erased from 0x00001000 to 0x00006fff... Flash will be erased from 0x00090000 to 0x0013dfff... Flash will be erased from 0x00080000 to 0x00080fff... Compressed 21872 bytes to 15226... Writing at 0x00001000... (100 %) Wrote 21872 bytes (15226 compressed) at 0x00001000 in 0.8 seconds (effective 214.6 kbit/s)... Hash of data verified. Compressed 709968 bytes to 450136... Writing at 0x00090000... (3 %) Writing at 0x0009c550... (7 %) Writing at 0x000a5e3f... (10 %) Writing at 0x000b076d... (14 %) Writing at 0x000b6275... (17 %) Writing at 0x000bbb88... (21 %) Writing at 0x000c1312... (25 %) Writing at 0x000c6ecc... (28 %) Writing at 0x000cc50d... (32 %) Writing at 0x000d1cda... (35 %) Writing at 0x000d75c8... (39 %) Writing at 0x000dce5f... (42 %) Writing at 0x000e3827... (46 %) Writing at 0x000e8b61... (50 %) Writing at 0x000eddb7... (53 %) Writing at 0x000f30e7... (57 %) Writing at 0x000f873b... (60 %) Writing at 0x000fdd04... (64 %) Writing at 0x001037ab... (67 %) Writing at 0x00109160... (71 %) Writing at 0x0010ec85... (75 %) Writing at 0x001145a4... (78 %) Writing at 0x0011af49... (82 %) Writing at 0x0012279e... (85 %) Writing at 0x00129be3... (89 %) Writing at 0x0012f959... (92 %) Writing at 0x00135572... (96 %) Writing at 0x0013aa52... (100 %) Wrote 709968 bytes (450136 compressed) at 0x00090000 in 11.1 seconds (effective 511.9 kbit/s)... Hash of data verified. Compressed 3072 bytes to 104... Writing at 0x00080000... (100 %) Wrote 3072 bytes (104 compressed) at 0x00080000 in 0.1 seconds (effective 245.0 kbit/s)... Hash of data verified.
Leaving... Staying in bootloader. Done
Hmm, looks OK to me. Could you try just flashing our hello world example?
This is the output for the hello_world:
Executing action: flash Running cmake in directory /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build Executing "cmake -G Ninja -DPYTHON_DEPS_CHECKED=1 -DESP_PLATFORM=1 -DCCACHE_ENABLE=0 /Users/roysabah/esp/esp-idf/examples/get-started/hello_world"... -- Found Git: /usr/local/bin/git (found version "2.23.0") -- IDF_TARGET not set, using default target: esp32 -- The C compiler identification is GNU 8.4.0 -- The CXX compiler identification is GNU 8.4.0 -- The ASM compiler identification is GNU -- Found assembler: /Users/roysabah/.espressif/tools/xtensa-esp32-elf/esp-2021r1-8.4.0/xtensa-esp32-elf/bin/xtensa-esp32-elf-gcc -- Detecting C compiler ABI info -- Detecting C compiler ABI info - done -- Check for working C compiler: /Users/roysabah/.espressif/tools/xtensa-esp32-elf/esp-2021r1-8.4.0/xtensa-esp32-elf/bin/xtensa-esp32-elf-gcc - skipped -- Detecting C compile features -- Detecting C compile features - done -- Detecting CXX compiler ABI info -- Detecting CXX compiler ABI info - done -- Check for working CXX compiler: /Users/roysabah/.espressif/tools/xtensa-esp32-elf/esp-2021r1-8.4.0/xtensa-esp32-elf/bin/xtensa-esp32-elf-g++ - skipped -- Detecting CXX compile features -- Detecting CXX compile features - done -- Building ESP-IDF components for target esp32 -- Project sdkconfig file /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/sdkconfig -- Found PythonInterp: /Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python (found version "3.9.6") -- Found Perl: /usr/bin/perl (found version "5.18.4") -- App "hello-world" version: v4.4-dev-1849-g8e3e65a47 -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.api.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.libgcc.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.newlib-data.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.syscalls.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.newlib-funcs.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.newlib-time.ld -- Adding linker script /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/esp-idf/esp32/esp32_out.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp32/ld/esp32.project.ld.in -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp32/ld/esp32.peripherals.ld -- Components: app_trace app_update asio bootloader bootloader_support bt cbor cmock coap console cxx driver efuse esp-tls esp32 esp_adc_cal esp_common esp_eth esp_event esp_gdbstub esp_hid esp_http_client esp_http_server esp_https_ota esp_https_server esp_hw_support esp_ipc esp_lcd esp_local_ctrl esp_netif esp_phy esp_pm esp_ringbuf esp_rom esp_serial_slave_link esp_system esp_timer esp_websocket_client esp_wifi espcoredump esptool_py expat fatfs freemodbus freertos hal heap idf_test jsmn json libsodium log lwip main mbedtls mdns mqtt newlib nghttp nvs_flash openssl openthread partition_table perfmon protobuf-c protocomm pthread sdmmc soc spi_flash spiffs tcp_transport tcpip_adapter tinyusb ulp unity vfs wear_levelling wifi_provisioning wpa_supplicant xtensa -- Component paths: /Users/roysabah/esp/esp-idf/components/app_trace /Users/roysabah/esp/esp-idf/components/app_update /Users/roysabah/esp/esp-idf/components/asio /Users/roysabah/esp/esp-idf/components/bootloader /Users/roysabah/esp/esp-idf/components/bootloader_support /Users/roysabah/esp/esp-idf/components/bt /Users/roysabah/esp/esp-idf/components/cbor /Users/roysabah/esp/esp-idf/components/cmock /Users/roysabah/esp/esp-idf/components/coap /Users/roysabah/esp/esp-idf/components/console /Users/roysabah/esp/esp-idf/components/cxx /Users/roysabah/esp/esp-idf/components/driver /Users/roysabah/esp/esp-idf/components/efuse /Users/roysabah/esp/esp-idf/components/esp-tls /Users/roysabah/esp/esp-idf/components/esp32 /Users/roysabah/esp/esp-idf/components/esp_adc_cal /Users/roysabah/esp/esp-idf/components/esp_common /Users/roysabah/esp/esp-idf/components/esp_eth /Users/roysabah/esp/esp-idf/components/esp_event /Users/roysabah/esp/esp-idf/components/esp_gdbstub /Users/roysabah/esp/esp-idf/components/esp_hid /Users/roysabah/esp/esp-idf/components/esp_http_client /Users/roysabah/esp/esp-idf/components/esp_http_server /Users/roysabah/esp/esp-idf/components/esp_https_ota /Users/roysabah/esp/esp-idf/components/esp_https_server /Users/roysabah/esp/esp-idf/components/esp_hw_support /Users/roysabah/esp/esp-idf/components/esp_ipc /Users/roysabah/esp/esp-idf/components/esp_lcd /Users/roysabah/esp/esp-idf/components/esp_local_ctrl /Users/roysabah/esp/esp-idf/components/esp_netif /Users/roysabah/esp/esp-idf/components/esp_phy /Users/roysabah/esp/esp-idf/components/esp_pm /Users/roysabah/esp/esp-idf/components/esp_ringbuf /Users/roysabah/esp/esp-idf/components/esp_rom /Users/roysabah/esp/esp-idf/components/esp_serial_slave_link /Users/roysabah/esp/esp-idf/components/esp_system /Users/roysabah/esp/esp-idf/components/esp_timer /Users/roysabah/esp/esp-idf/components/esp_websocket_client /Users/roysabah/esp/esp-idf/components/esp_wifi /Users/roysabah/esp/esp-idf/components/espcoredump /Users/roysabah/esp/esp-idf/components/esptool_py /Users/roysabah/esp/esp-idf/components/expat /Users/roysabah/esp/esp-idf/components/fatfs /Users/roysabah/esp/esp-idf/components/freemodbus /Users/roysabah/esp/esp-idf/components/freertos /Users/roysabah/esp/esp-idf/components/hal /Users/roysabah/esp/esp-idf/components/heap /Users/roysabah/esp/esp-idf/components/idf_test /Users/roysabah/esp/esp-idf/components/jsmn /Users/roysabah/esp/esp-idf/components/json /Users/roysabah/esp/esp-idf/components/libsodium /Users/roysabah/esp/esp-idf/components/log /Users/roysabah/esp/esp-idf/components/lwip /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/main /Users/roysabah/esp/esp-idf/components/mbedtls /Users/roysabah/esp/esp-idf/components/mdns /Users/roysabah/esp/esp-idf/components/mqtt /Users/roysabah/esp/esp-idf/components/newlib /Users/roysabah/esp/esp-idf/components/nghttp /Users/roysabah/esp/esp-idf/components/nvs_flash /Users/roysabah/esp/esp-idf/components/openssl /Users/roysabah/esp/esp-idf/components/openthread /Users/roysabah/esp/esp-idf/components/partition_table /Users/roysabah/esp/esp-idf/components/perfmon /Users/roysabah/esp/esp-idf/components/protobuf-c /Users/roysabah/esp/esp-idf/components/protocomm /Users/roysabah/esp/esp-idf/components/pthread /Users/roysabah/esp/esp-idf/components/sdmmc /Users/roysabah/esp/esp-idf/components/soc /Users/roysabah/esp/esp-idf/components/spi_flash /Users/roysabah/esp/esp-idf/components/spiffs /Users/roysabah/esp/esp-idf/components/tcp_transport /Users/roysabah/esp/esp-idf/components/tcpip_adapter /Users/roysabah/esp/esp-idf/components/tinyusb /Users/roysabah/esp/esp-idf/components/ulp /Users/roysabah/esp/esp-idf/components/unity /Users/roysabah/esp/esp-idf/components/vfs /Users/roysabah/esp/esp-idf/components/wear_levelling /Users/roysabah/esp/esp-idf/components/wifi_provisioning /Users/roysabah/esp/esp-idf/components/wpa_supplicant /Users/roysabah/esp/esp-idf/components/xtensa -- Configuring done -- Generating done -- Build files have been written to: /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build Serial port /dev/cu.usbserial-3 Connecting........____ Detecting chip type... ESP32 Running ninja in directory /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build Executing "ninja flash"... [13/989] Generating ../../partition_table/partition-table.bin Partition table binary generated. Contents:
nvs,data,nvs,0x9000,24K, phy_init,data,phy,0xf000,4K, factory,app,factory,0x10000,1M,
[288/989] Performing configure step for 'bootloader' -- Found Git: /usr/local/bin/git (found version "2.23.0") -- The C compiler identification is GNU 8.4.0 -- The CXX compiler identification is GNU 8.4.0 -- The ASM compiler identification is GNU -- Found assembler: /Users/roysabah/.espressif/tools/xtensa-esp32-elf/esp-2021r1-8.4.0/xtensa-esp32-elf/bin/xtensa-esp32-elf-gcc -- Detecting C compiler ABI info -- Detecting C compiler ABI info - done -- Check for working C compiler: /Users/roysabah/.espressif/tools/xtensa-esp32-elf/esp-2021r1-8.4.0/xtensa-esp32-elf/bin/xtensa-esp32-elf-gcc - skipped -- Detecting C compile features -- Detecting C compile features - done -- Detecting CXX compiler ABI info -- Detecting CXX compiler ABI info - done -- Check for working CXX compiler: /Users/roysabah/.espressif/tools/xtensa-esp32-elf/esp-2021r1-8.4.0/xtensa-esp32-elf/bin/xtensa-esp32-elf-g++ - skipped -- Detecting CXX compile features -- Detecting CXX compile features - done -- Building ESP-IDF components for target esp32 -- Project sdkconfig file /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/sdkconfig -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp32/ld/esp32.peripherals.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.api.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.libgcc.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/esp_rom/esp32/ld/esp32.rom.newlib-funcs.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/bootloader/subproject/main/ld/esp32/bootloader.ld -- Adding linker script /Users/roysabah/esp/esp-idf/components/bootloader/subproject/main/ld/esp32/bootloader.rom.ld -- Components: bootloader bootloader_support efuse esp32 esp_common esp_hw_support esp_rom esp_system esptool_py freertos hal log main micro-ecc newlib partition_table soc spi_flash xtensa -- Component paths: /Users/roysabah/esp/esp-idf/components/bootloader /Users/roysabah/esp/esp-idf/components/bootloader_support /Users/roysabah/esp/esp-idf/components/efuse /Users/roysabah/esp/esp-idf/components/esp32 /Users/roysabah/esp/esp-idf/components/esp_common /Users/roysabah/esp/esp-idf/components/esp_hw_support /Users/roysabah/esp/esp-idf/components/esp_rom /Users/roysabah/esp/esp-idf/components/esp_system /Users/roysabah/esp/esp-idf/components/esptool_py /Users/roysabah/esp/esp-idf/components/freertos /Users/roysabah/esp/esp-idf/components/hal /Users/roysabah/esp/esp-idf/components/log /Users/roysabah/esp/esp-idf/components/bootloader/subproject/main /Users/roysabah/esp/esp-idf/components/bootloader/subproject/components/micro-ecc /Users/roysabah/esp/esp-idf/components/newlib /Users/roysabah/esp/esp-idf/components/partition_table /Users/roysabah/esp/esp-idf/components/soc /Users/roysabah/esp/esp-idf/components/spi_flash /Users/roysabah/esp/esp-idf/components/xtensa -- Configuring done -- Generating done -- Build files have been written to: /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/bootloader [349/989] Performing build step for 'bootloader' [1/93] Generating project_elf_src_esp32.c [2/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/soc_include_legacy_warn.c.obj [3/93] Building C object CMakeFiles/bootloader.elf.dir/project_elf_src_esp32.c.obj [4/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/i2c_periph.c.obj [5/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/i2s_periph.c.obj [6/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/gpio_periph.c.obj [7/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/ledc_periph.c.obj [8/93] Building C object esp-idf/soc/CMakeFiles/__idf_soc.dir/lldesc.c.obj [9/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/adc_periph.c.obj [10/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/interrupts.c.obj [11/93] Building C object esp-idf/hal/CMakeFiles/idf_hal.dir/mpu_hal.c.obj [12/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/dac_periph.c.obj [13/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/rmt_periph.c.obj [14/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/pcnt_periph.c.obj [15/93] Building C object esp-idf/soc/CMakeFiles/__idf_soc.dir/esp32/soc_memory_layout.c.obj [16/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/mcpwm_periph.c.obj [17/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/sdmmc_periph.c.obj [18/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/sigmadelta_periph.c.obj [19/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/rtc_io_periph.c.obj [20/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/timer_periph.c.obj [21/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/uart_periph.c.obj [22/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/spi_periph.c.obj [23/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/sdio_slave_periph.c.obj [24/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/esp32/touch_sensor_periph.c.obj [25/93] Building C object esp-idf/soc/CMakeFiles/idf_soc.dir/memory_layout_utils.c.obj [26/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_mem.c.obj [27/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_random.c.obj [28/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_clock_init.c.obj [29/93] Building C object esp-idf/hal/CMakeFiles/idf_hal.dir/wdt_hal_iram.c.obj [30/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/secure_boot.c.obj [31/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_random_esp32.c.obj [32/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/flash_encrypt.c.obj [33/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_common_loader.c.obj [34/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/flash_partitions.c.obj [35/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_common.c.obj [36/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_flash.c.obj [37/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_efuse_esp32.c.obj [38/93] Building C object esp-idf/bootloader_support/CMakeFiles/__idf_bootloader_support.dir/src/bootloader_clock_loader.c.obj [39/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_console_loader.c.obj [40/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/flash_qio_mode.c.obj [41/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_panic.c.obj [42/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_console.c.obj [43/93] Building C object esp-idf/bootloader_support/CMakeFiles/__idf_bootloader_support.dir/src/bootloader_init.c.obj [44/93] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/esp32/esp_efuse_table.c.obj [45/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/bootloader_flash_config_esp32.c.obj [46/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp32/bootloader_sha.c.obj [47/93] Building C object esp-idf/spi_flash/CMakeFiles/idf_spi_flash.dir/esp32/spi_flash_rom_patch.c.obj [48/93] Building C object esp-idf/efuse/CMakeFiles/__idf_efuse.dir/src/esp_efuse_fields.c.obj [49/93] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/esp32/esp_efuse_fields.c.obj [50/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/compare_set.c.obj [51/93] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/esp32/esp_efuse_utility.c.obj [52/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/cpu_util.c.obj [53/93] Building C object esp-idf/bootloader_support/CMakeFiles/__idf_bootloader_support.dir/src/bootloader_utility.c.obj [54/93] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/src/esp_efuse_api.c.obj [55/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp32/bootloader_esp32.c.obj [56/93] Building C object esp-idf/esp_hw_support/CMakeFiles/__idf_esp_hw_support.dir/port/esp32/rtc_pm.c.obj [57/93] Building C object esp-idf/bootloader_support/CMakeFiles/idf_bootloader_support.dir/src/esp_image_format.c.obj [58/93] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/src/esp_efuse_api_key_esp32.c.obj [59/93] Building C object esp-idf/xtensa/CMakeFiles/__idf_xtensa.dir/eri.c.obj [60/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/chip_info.c.obj [61/93] Building C object esp-idf/xtensa/CMakeFiles/idf_xtensa.dir/xt_trax.c.obj [62/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/rtc_clk_init.c.obj [63/93] Building C object esp-idf/efuse/CMakeFiles/idf_efuse.dir/src/esp_efuse_utility.c.obj [64/93] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_crc.c.obj [65/93] Building ASM object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_longjmp.S.obj [66/93] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_sys.c.obj [67/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/rtc_init.c.obj [68/93] Building C object esp-idf/esp_rom/CMakeFiles/idf_esp_rom.dir/patches/esp_rom_uart.c.obj [69/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/rtc_time.c.obj [70/93] Building C object esp-idf/esp_common/CMakeFiles/__idf_esp_common.dir/src/esp_err_to_name.c.obj [71/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/rtc_wdt.c.obj [72/93] Building C object esp-idf/log/CMakeFiles/idf_log.dir/log_noos.c.obj [73/93] Building C object esp-idf/main/CMakeFiles/idf_main.dir/bootloader_start.c.obj [74/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/rtc_sleep.c.obj [75/93] Building C object esp-idf/log/CMakeFiles/idf_log.dir/log.c.obj [76/93] Building C object esp-idf/log/CMakeFiles/idf_log.dir/log_buffers.c.obj [77/93] Linking C static library esp-idf/log/liblog.a [78/93] Linking C static library esp-idf/esp_rom/libesp_rom.a [79/93] Linking C static library esp-idf/esp_common/libesp_common.a [80/93] Building C object esp-idf/esp_hw_support/CMakeFiles/idf_esp_hw_support.dir/port/esp32/rtc_clk.c.obj [81/93] Linking C static library esp-idf/xtensa/libxtensa.a [82/93] Linking C static library esp-idf/esp_hw_support/libesp_hw_support.a [83/93] Linking C static library esp-idf/efuse/libefuse.a [84/93] Linking C static library esp-idf/bootloader_support/libbootloader_support.a [85/93] Linking C static library esp-idf/spi_flash/libspi_flash.a [86/93] Building C object esp-idf/micro-ecc/CMakeFiles/__idf_micro-ecc.dir/uECC_verify_antifault.c.obj [87/93] Linking C static library esp-idf/micro-ecc/libmicro-ecc.a [88/93] Linking C static library esp-idf/soc/libsoc.a [89/93] Linking C static library esp-idf/hal/libhal.a [90/93] Linking C static library esp-idf/main/libmain.a [91/93] Linking C executable bootloader.elf [92/93] Generating binary image from built executable esptool.py v3.2-dev Merged 1 ELF section Generated /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/bootloader/bootloader.bin [93/93] cd /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/bootloader/esp-idf/esptool_py && /Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python /Users/roysabah/esp/esp-idf/components/partition_table/check_sizes.py --offset 0x8000 bootloader 0x1000 /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/bootloader/bootloader.bin Bootloader binary size 0x60f0 bytes. 0xf10 bytes (16%) free. [987/989] Generating binary image from built executable esptool.py v3.2-dev Merged 2 ELF sections Generated /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/hello-world.bin [988/989] cd /Users/roysabah/esp/esp-idf/examples/get-...examples/get-started/hello_world/build/hello-world.bin hello-world.bin binary size 0x28520 bytes. Smallest app partition is 0x100000 bytes. 0xd7ae0 bytes (84%) free. [988/989] cd /Users/roysabah/esp/esp-idf/components/es...sp/esp-idf/components/esptool_py/run_serial_tool.cmake esptool.py esp32 -p /dev/cu.usbserial-3 -b 460800 --before=default_reset --after=hard_reset write_flash --flash_mode dio --flash_freq 40m --flash_size 2MB 0x1000 bootloader/bootloader.bin 0x10000 hello-world.bin 0x8000 partitiontable/partition-table.bin esptool.py v3.2-dev Serial port /dev/cu.usbserial-3 Connecting........ Chip is ESP32-D0WDQ6 (revision 1) Features: WiFi, BT, Dual Core, 240MHz, VRef calibration in efuse, Coding Scheme None Crystal is 40MHz MAC: ac:67:b2:2c:0e:20 Uploading stub... Running stub... Stub running... Changing baud rate to 460800 Changed. Configuring flash size... Flash will be erased from 0x00001000 to 0x00007fff... Flash will be erased from 0x00010000 to 0x00038fff... Flash will be erased from 0x00008000 to 0x00008fff... Compressed 24816 bytes to 15371... Writing at 0x00001000... (100 %) Wrote 24816 bytes (15371 compressed) at 0x00001000 in 0.9 seconds (effective 225.2 kbit/s)... Hash of data verified. Compressed 165152 bytes to 87253... Writing at 0x00010000... (16 %) Writing at 0x0001ac43... (33 %) Writing at 0x0002042c... (50 %) Writing at 0x00025c25... (66 %) Writing at 0x0002dae4... (83 %) Writing at 0x0003666a... (100 %) Wrote 165152 bytes (87253 compressed) at 0x00010000 in 2.6 seconds (effective 518.0 kbit/s)... Hash of data verified. Compressed 3072 bytes to 103... Writing at 0x00008000... (100 %) Wrote 3072 bytes (103 compressed) at 0x00008000 in 0.1 seconds (effective 247.6 kbit/s)... Hash of data verified.
Leaving... Hard resetting via RTS pin... Executing action: monitor Serial port /dev/cu.usbserial-3 Connecting..................___ Detecting chip type... ESP32 Running idf_monitor in directory /Users/roysabah/esp/esp-idf/examples/get-started/hello_world Executing "/Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python /Users/roysabah/esp/esp-idf/tools/idf_monitor.py -p /dev/cu.usbserial-3 -b 115200 --toolchain-prefix xtensa-esp32-elf- --target esp32 --revision 0 /Users/roysabah/esp/esp-idf/examples/get-started/hello_world/build/hello-world.elf -m '/Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python' '/Users/roysabah/esp/esp-idf/tools/idf.py'"... --- idf_monitor on /dev/cu.usbserial-3 115200 --- --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H --- ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x3 (DOWNLOAD_BOOT(UART0/UART1/SDIO_REI_REO_V2)) waiting for download read failed: [Errno 6] Device not configured Waiting for the device to reconnect........... 4 lets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0030,len:6744 load:0x40078000,len:14268 ho 0 tail 12 room 4 load:0x40080400,len:3716 0x40080400: _init at ??:?
entry 0x40080680 I (29) boot: ESP-IDF v4.4-dev-1849-g8e3e65a47 2nd stage bootloader I (29) boot: compile time 13:04:04 I (29) boot: chip revision: 1 I (33) boot_comm: chip revision: 1, min. bootloader chip revision: 0 I (40) boot.esp32: SPI Speed : 40MHz I (45) boot.esp32: SPI Mode : DIO I (49) boot.esp32: SPI Flash Size : 2MB I (54) boot: Enabling RNG early entropy source... I (59) boot: Partition Table: I (63) boot: ## Label Usage Type ST Offset Length I (70) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (78) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (85) boot: 2 factory factory app 00 00 00010000 00100000 I (93) boot: End of partition table I (97) boot_comm: chip revision: 1, min. application chip revision: 0 I (104) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=072a0h ( 29344) map I (123) esp_image: segment 1: paddr=000172c8 vaddr=3ffb0000 size=02370h ( 9072) load I (127) esp_image: segment 2: paddr=00019640 vaddr=40080000 size=069d8h ( 27096) load I (140) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=1453ch ( 83260) map I (171) esp_image: segment 4: paddr=00034564 vaddr=400869d8 size=03f7ch ( 16252) load I (178) esp_image: segment 5: paddr=000384e8 vaddr=50000000 size=00010h ( 16) load I (183) boot: Loaded app from partition at offset 0x10000 I (183) boot: Disabling RNG early entropy source... I (199) cpu_start: Pro cpu up. I (200) cpu_start: Starting app cpu, entry point is 0x40080f60 0x40080f60: call_start_cpu1 at /Users/roysabah/esp/esp-idf/components/esp_system/port/cpu_start.c:150
I (0) cpu_start: App cpu up. I (214) cpu_start: Pro cpu start user code I (214) cpu_start: cpu freq: 160000000 I (214) cpu_start: Application information: I (218) cpu_start: Project name: hello-world I (224) cpu_start: App version: v4.4-dev-1849-g8e3e65a47 I (230) cpu_start: Compile time: Sep 9 2021 13:03:57 I (236) cpu_start: ELF file SHA256: b2089fac129a9b56... I (242) cpu_start: ESP-IDF: v4.4-dev-1849-g8e3e65a47 I (249) heap_init: Initializing. RAM available for dynamic allocation: I (256) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM I (262) heap_init: At 3FFB2C48 len 0002D3B8 (180 KiB): DRAM I (268) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM I (274) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM I (281) heap_init: At 4008A954 len 000156AC (85 KiB): IRAM I (288) spi_flash: detected chip: generic I (292) spi_flash: flash io: dio W (296) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header. I (310) cpu_start: Starting scheduler on PRO CPU. I (0) cpu_start: Starting scheduler on APP CPU. Hello world! This is esp32 chip with 2 CPU core(s), WiFi/BT/BLE, silicon revision 1, 2MB external flash Minimum free heap size: 294328 bytes Restarting in 10 seconds... Restarting in 9 seconds... Restarting in 8 seconds... Restarting in 7 seconds... Restarting in 6 seconds... Restarting in 5 seconds... Restarting in 4 seconds... Restarting in 3 seconds... Restarting in 2 seconds... Restarting in 1 seconds... Restarting in 0 seconds... Restarting now. ets Jun 8 2016 00:22:57
Thanks, this means flash encryption is not enabled. So flashing the file we tried earlier should work fine.
Try again, but before flashing delete the build folder and rebuild. This should ensure that any pre-encrypted files you could be mistakenly flashing is gone :)
@roysG did your issue resolve itself?
Thanks for reporting, sorry for slow turnaround, fix is available at https://github.com/espressif/esp-idf/commit/33663461c0cb4cf5e901650578db148732dc8e03, feel free to reopen.
Hi, I gave up after currpted 10 devices of esp32.
The documentation of esp32 is not clear. If you are sure that this time it will work, please write me the exact commands, to repreduce and i will check it.
Thanks.
On Wed, 13 Oct 2021, 6:29 Alvin1Zhang @.***> wrote:
Thanks for reporting, sorry for slow turnaround, fix is available at 3366346 https://github.com/espressif/esp-idf/commit/33663461c0cb4cf5e901650578db148732dc8e03, feel free to reopen.
— You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub https://github.com/espressif/esp-idf/issues/7537#issuecomment-941883614, or unsubscribe https://github.com/notifications/unsubscribe-auth/ABXZDOXMLTMRXMPPOWAL6S3UGT4IVANCNFSM5DUA2IXA . Triage notifications on the go with GitHub Mobile for iOS https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675 or Android https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub.
Sorry, i did not understand what had been fixed?
There were some commands that should only be used on ESP32-S2/C3 (burn_key BLOCK my_flash_encryption_key.bin XTS_AES_128_KEY
) present in the ESP32 docs. These should now be gone.
I couldn't see any other issues in the docs.
In case I want to protect on the device with both protection: secure boot and flash encryption.
Do i need to do in the first place the steps for secure boot and then the flash encryption?
I will also write here the commands I tried to run with no success.
I follow the steps in production according to documentation of the boot menu for esp32. https://docs.espressif.com/projects/esp-idf/en/latest/esp32/security/secure-boot-v1.html
openssl ecparam -name prime256v1 -genkey -noout -out my_secure_boot_signing_key.pem
4.Run command: idf.py flash
Now i following the steps for flash encryption in production mode
enable flash encryption as production.
run command: idf.py flash monitor
restart device
Please approve my steps, thank you.
On Thu, Oct 21, 2021 at 1:40 PM ESP-Marius @.***> wrote:
There were some commands that should only be used on ESP32-S2/C3 (burn_key BLOCK my_flash_encryption_key.bin XTS_AES_128_KEY) present in the ESP32 docs. These should now be gone.
I couldn't see any other issues in the docs.
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@ESP-Marius ?
No this won't work. Flash encryption is enabled by the bootloader and if you choose " One-time Flash" you will not be able to reflash the bootloader.
Can you please describe what you are trying to achieve? How are you planning to update your app after enabling these features?
Hi, I need to lock the device without the option to change the code, with secure boot and flash encryption.
I would like to know what are the correct steps to do it.
Can you write me please the order of the commands for doing this?
Many thanks.
On Fri, 22 Oct 2021, 6:42 ESP-Marius @.***> wrote:
No this won't work. Flash encryption is enabled by the bootloader and if you choose " One-time Flash" you will not be able to reflash the bootloader.
Can you please describe what you are trying to achieve? How are you planning to update your app after enabling these features?
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These steps should work fine, just tested them on the latest master using an ESP32 (clean, no efuses burned):
espsecure.py generate_signing_key --version 1 secure_boot_signing_key.pem
idf.py build
idf.py erase-flash
idf.py bootloader-flash
idf.py flash
Do i need also run command: espefuse.py -p /dev/tty.usbserial-0001 burn_efuse FLASH_CRYPT_CNT
For increase the number of "FLASH_CRYPT_CNT" ?
Can i use the same orders command also for esp32s2? @ESP-Marius
Ok i did the steps you mentioned. (Also upgrade to latest version of idf 5.0.0)
It is important to mention:
After the last step you mention. i ran the command "idf.py flash" and restart the device. Then i ran idf.py monitor and this is the result i get:
Roys-MacBook-Pro:esp32-arduino-lib-builder roysabah$ idf.py monitor Executing action: monitor Serial port /dev/cu.usbserial-0001 Connecting......... Detecting chip type... Unsupported detection protocol, switching and trying again... Connecting............ Detecting chip type... ESP32 Running idf_monitor in directory /Users/roysabah/esp/esp32-arduino-lib-builder Executing "/Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python /Users/roysabah/esp/esp-idf/tools/idf_monitor.py -p /dev/cu.usbserial-0001 -b 115200 --toolchain-prefix xtensa-esp32-elf- --target esp32 --revision 0 /Users/roysabah/esp/esp32-arduino-lib-builder/build/arduino-lib-builder.elf -m '/Users/roysabah/.espressif/python_env/idf4.4_py3.9_env/bin/python' '/Users/roysabah/esp/esp-idf/tools/idf.py'"... --- idf_monitor on /dev/cu.usbserial-0001 115200 --- --- Quit: Ctrl+] | Menu: Ctrl+T | Help: Ctrl+T followed by Ctrl+H --- ets Jun 8 2016 00:22:57
rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371
Does it normal??
Also this is the description of espfuse:
espefuse.py -p /dev/tty.usbserial-0001 summary
Roys-MacBook-Pro:~ roysabah$ espefuse.py -p /dev/tty.usbserial-0001 summary Connecting... Failed to get PID of a device on /dev/tty.usbserial-0001, using standard reset sequence.
.
Detecting chip type... ESP32
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1114 R/W (0b00010)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 56 R/W (0x38) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = 94:b9:7e:d6:48:70 (CRC 0xb1 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 177 R/W (0xb1) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 0 R/W (0b0000000) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = True R/W (0b1) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 16 93 31 5b 8a e7 a7 a2 f7 6c e5 2b 9b 36 1c 9d a2 b1 4b 1d 02 45 ad a3 b7 93 35 73 4c 35 4c b8 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).
Ok, I increase FLASH_CRYPT_CNT to odd number with the command:
espefuse.py -p /dev/tty.usbserial-0001 burn_efuse FLASH_CRYPT_CNT
Then i restart the device, and run command: idf.py monitor.
This is the result i get:
E (177) esp_image: invalid segment length 0x11fdc129 E (178) boot: Factory app partition is not bootable E (178) boot: No bootable app partitions in the partition table ets Jun 8 2016 00:22:57
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:12820 load:0x40078000,len:26184 load:0x40080400,len:3792 0x40080400: _init at ??:?
entry 0x40080694 I (52) boot: ESP-IDF v4.4-dev-3573-gfb24a2941c 2nd stage bootloader I (53) boot: compile time 00:29:04 I (53) boot: chip revision: 1 I (58) boot_comm: chip revision: 1, min. bootloader chip revision: 0 I (65) boot.esp32: SPI Speed : 40MHz I (69) boot.esp32: SPI Mode : DIO I (74) boot.esp32: SPI Flash Size : 4MB I (79) boot: Enabling RNG early entropy source... I (84) boot: Partition Table: I (88) boot: ## Label Usage Type ST Offset Length I (95) boot: 0 nvs WiFi data 01 02 00081000 00006000 I (102) boot: 1 phy_init RF data 01 01 00087000 00001000 I (110) boot: 2 factory factory app 00 00 00090000 00100000 I (117) boot: End of partition table I (122) boot_comm: chip revision: 1, min. application chip revision: 0 I (129) esp_image: segment 0: paddr=00090020 vaddr=3f400020 size=1a19ch (106908) map E (177) esp_image: invalid segment length 0x11fdc129 E (178) boot: Factory app partition is not bootable E (178) boot: No bootable app partitions in the partition table ets Jun 8 2016 00:22:57
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:12820 load:0x40078000,len:26184 load:0x40080400,len:3792 0x40080400: _init at ??:?
entry 0x40080694 I (52) boot: ESP-IDF v4.4-dev-3573-gfb24a2941c 2nd stage bootloader I (53) boot: compile time 00:29:04 I (53) boot: chip revision: 1 I (58) boot_comm: chip revision: 1, min. bootloader chip revision: 0 I (65) boot.esp32: SPI Speed : 40MHz I (69) boot.esp32: SPI Mode : DIO I (74) boot.esp32: SPI Flash Size : 4MB I (79) boot: Enabling RNG early entropy source... I (84) boot: Partition Table: I (88) boot: ## Label Usage Type ST Offset Length I (95) boot: 0 nvs WiFi data 01 02 00081000 00006000 I (102) boot: 1 phy_init RF data 01 01 00087000 00001000 I (110) boot: 2 factory factory app 00 00 00090000 00100000 I (117) boot: End of partition table I (122) boot_comm: chip revision: 1, min. application chip revision: 0 I (129) esp_image: segment 0: paddr=00090020 vaddr=3f400020 size=1a19ch (106908) map E (177) esp_image: invalid segment length 0x11fdc129 E (178) boot: Factory app partition is not bootable E (178) boot: No bootable app partitions in the partition table ets Jun 8 2016 00:22:57
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:12820 load:0x40078000,len:26184 load:0x40080400,len:3792 0x40080400: _init at ??:?
entry 0x40080694 I (53) boot: ESP-IDF v4.4-dev-3573-gfb24a2941c 2nd stage bootloader I (53) boot: compile time 00:29:04 I (53) boot: chip revision: 1 I (58) boot_comm: chip revision: 1, min. bootloader chip revision: 0 I (65) boot.esp32: SPI Speed : 40MHz I (69) boot.esp32: SPI Mode : DIO I (74) boot.esp32: SPI Flash Size : 4MB I (79) boot: Enabling RNG early entropy source... I (84) boot: Partition Table: I (88) boot: ## Label Usage Type ST Offset Length I (95) boot: 0 nvs WiFi data 01 02 00081000 00006000 I (102) boot: 1 phy_init RF data 01 01 00087000 00001000 I (110) boot: 2 factory factory app 00 00 00090000 00100000 I (117) boot: End of partition table I (122) boot_comm: chip revision: 1, min. application chip revision: 0 I (129) esp_image: segment 0: paddr=00090020 vaddr=3f400020 size=1a19ch (106908) map E (177) esp_image: invalid segment length 0x11fdc129 E (178) boot: Factory app partition is not bootable E (178) boot: No bootable app partitions in the partition table ets Jun 8 2016 00:22:57
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:12820 load:0x40078000,len:26184 load:0x40080400,len:3792 0x40080400: _init at ??:?
entry 0x40080694 I (52) boot: ESP-IDF v4.4-dev-3573-gfb24a2941c 2nd stage bootloader I (53) boot: compile time 00:29:04 I (53) boot: chip revision: 1 I (58) boot_comm: chip revision: 1, min. bootloader chip revision: 0 I (65) boot.esp32: SPI Speed : 40MHz I (69) boot.esp32: SPI Mode : DIO I (74) boot.esp32: SPI Flash Size : 4MB I (79) boot: Enabling RNG early entropy source... I (84) boot: Partition Table: I (88) boot: ## Label Usage Type ST Offset Length I (95) boot: 0 nvs WiFi data 01 02 00081000 00006000 I (102) boot: 1 phy_init RF data 01 01 00087000 00001000 I (110) boot: 2 factory factory app 00 00 00090000 00100000 I (117) boot: End of partition table I (122) boot_comm: chip revision: 1, min. application chip revision: 0 I (129) esp_image: segment 0: paddr=00090020 vaddr=3f400020 size=1a19ch (106908) map E (177) esp_image: invalid segment length 0x11fdc129 E (178) boot: Factory app partition is not bootable E (178) boot: No bootable app partitions in the partition table ets Jun 8 2016 00:22:57
rst:0x3 (SW_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:12820 load:0x40078000,len:26184 load:0x40080400,len:3792 0x40080400: _init at ??:?
entry 0x40080694 I (52) boot: ESP-IDF v4.4-dev-3573-gfb24a2941c 2nd stage bootloader I (53) boot: compile time 00:29:04 I (53) boot: chip revision: 1 I (58) boot_comm: chip revision: 1, min. bootloader chip revision: 0 I (65) boot.esp32: SPI Speed : 40MHz I (69) boot.esp32: SPI Mode : DIO I (74) boot.esp32: SPI Flash Size : 4MB I (79) boot: Enabling RNG early entropy source... I (84) boot: Partition Table: I (88) boot: ## Label Usage Type ST Offset Length I (95) boot: 0 nvs WiFi data 01 02 00081000 00006000 I (102) boot: 1 phy_init RF data 01 01 00087000 00001000 I (110) boot: 2 factory factory app 00 00 00090000 00100000 I (117) boot: End of partition table I (122) boot_comm: chip revision: 1, min. application chip revision: 0 I (129) esp_image: segment 0: paddr=00090020 vaddr=3f400020 size=1a19ch (106908) map E (177) esp_image: invalid segment length 0x11fdc129 E (178) boot: Factory app partition is not bootable E (178) boot: No bootable app partitions in the partition table ets Jun 8 2016 00:22:57
What do i miss?? I follow as your instruction, no?
Looking at your first efuse log there is some stuff that doesnt make sense.
You have burned a key (BLOCK1), but FLASH_CRYPT_CNT is not set? The bootloader should burn these two together on the first boot, it shouldnt not be possible for only one of these to be set.
Did you burn the key manually?
I do not think so, but to toda
On Mon, Oct 25, 2021 at 6:09 AM ESP-Marius @.***> wrote:
Looking at your first efuse log there is some stuff that doesnt make sense.
You have burned a key (BLOCK1), but FLASH_CRYPT_CNT is not set? The bootloader should burn these two together on the first boot, it shouldnt not be possible for only one of these to be set.
Did you burn the key manually?
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I do not think so, but today i will bring more chips and will test again and send you the result.
Does it allow me to run idf.py for the first time (before secure boot and encryption is enabled) just to check that the chip is ok?
On Mon, Oct 25, 2021 at 10:20 AM Liroy Sabah @.***> wrote:
I do not think so, but to toda
On Mon, Oct 25, 2021 at 6:09 AM ESP-Marius @.***> wrote:
Looking at your first efuse log there is some stuff that doesnt make sense.
You have burned a key (BLOCK1), but FLASH_CRYPT_CNT is not set? The bootloader should burn these two together on the first boot, it shouldnt not be possible for only one of these to be set.
Did you burn the key manually?
— You are receiving this because you were mentioned. Reply to this email directly, view it on GitHub https://github.com/espressif/esp-idf/issues/7537#issuecomment-950485859, or unsubscribe https://github.com/notifications/unsubscribe-auth/ABXZDOUFJSTUMZ6B5MXTWADUITC4ZANCNFSM5DUA2IXA . Triage notifications on the go with GitHub Mobile for iOS https://apps.apple.com/app/apple-store/id1477376905?ct=notification-email&mt=8&pt=524675 or Android https://play.google.com/store/apps/details?id=com.github.android&referrer=utm_campaign%3Dnotification-email%26utm_medium%3Demail%26utm_source%3Dgithub.
If you follow my steps you should not be burning anything manually. Just do the steps i mentioned and it should do everything automatically.
Does it allow me to run idf.py for the first time (before secure boot and encryption is enabled) just to check that the chip is ok?
You can upload an APP and test the chip first no problem, as long as that app does NOT have any secure boot or flash encryption enabled and doesnt burn any security related efuses. If it does this then the state of the efuses will not be correct for the steps I described for you.
Ok, after the finsl step you mention.
Do i need yo reconnect the device and then run idf.py monitor, right?
On Mon, 25 Oct 2021, 10:30 ESP-Marius @.***> wrote:
If you follow my steps you should not be burning anything manually. Just do the steps i mentioned and it should do everything automatically.
Does it allow me to run idf.py for the first time (before secure boot and encryption is enabled) just to check that the chip is ok?
You can upload an APP and test the chip first no problem, as long as that app does NOT have any secure boot or flash encryption enabled and doesnt burn any security related efuses. If it does this then the state of the efuses will not be correct for the steps I described for you.
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You can do idf.py flash monitor
as step 6 instead if you want to. Remember that after flashing it will boot and encrypt the whole app which might take 1+ min. So remember to let it finish and wait for it to reboot, it's not recommended to start unplugging it, manually reseting it etc.
Ok i am trying again. This is the summary of a new esp32 chip:
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1079 R/W (0b10011)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 53 R/W (0x35) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 0 R/W (0x0000) RD_DIS (BLOCK0): Efuse read disable mask = 0 R/W (0x0) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = ac:67:b2:2c:2e:28 (CRC 0x24 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 36 R/W (0x24) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 0 R/W (0b0000000) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 0 R/W (0x0) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = False R/W (0b0) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = False R/W (0b0) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = False R/W (0b0) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = False R/W (0b0) BLOCK1 (BLOCK1): Flash encryption key = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK2 (BLOCK2): Secure boot key = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V). `
**I changed to enabled the secureBoot and flashEncryption and run the command idf.py flash.
Then i run idf.py monitor I got the same error of output:**
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371
This is the summary of efuse.py (I still did not reboot device)
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1079 R/W (0b10011)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 53 R/W (0x35) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = ac:67:b2:2c:2e:28 (CRC 0x24 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 36 R/W (0x24) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 0 R/W (0b0000000) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = True R/W (0b1) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 97 7d 20 c9 4a 8e be 20 16 4d ff 7b 23 c0 93 3b 19 b4 af ee af 73 9b 98 03 82 be 5e ab 90 c4 02 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).
This is the output of espefuse after reboot device:
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1079 R/W (0b10011)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 53 R/W (0x35) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = ac:67:b2:2c:2e:28 (CRC 0x24 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 36 R/W (0x24) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 0 R/W (0b0000000) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = True R/W (0b1) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 97 7d 20 c9 4a 8e be 20 16 4d ff 7b 23 c0 93 3b 19 b4 af ee af 73 9b 98 03 82 be 5e ab 90 c4 02 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).
Roys-MacBook-Pro:esp32-arduino-lib-builder roysabah$ idf.py --version ESP-IDF v5.0-dev-39-ge5f5eb3cbb
I change the log to ![Uploading Screen Shot 2021-10-25 at 22.01.07.png…]()
I increase the FLASH_CRYPT_CNT with the command: espefuse.py -p /dev/tty.usbserial-0001 burn_efuse FLASH_CRYPT_CNT
The result i get when i run idf.py monitor:
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:2760 load:0x40078000,len:22380 ho 0 tail 12 room 4 load:0x4652bdd7,len:546059903 1162 mmu set 00010000, pos 00010000 1162 mmu set 00020000, pos 00020000 1162 mmu set 00030000, pos 00030000 1162 mmu set 00040000, pos 00040000 1162 mmu set 00050000, pos 00050000 1162 mmu set 00060000, pos 00060000 1162 mmu set 00070000, pos 00070000 1162 mmu set 00080000, pos 00080000 1162 mmu set 00090000, pos 00090000 1162 mmu set 000a0000, pos 000a0000 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:2760 load:0x40078000,len:22380 ho 0 tail 12 room 4 load:0x4652bdd7,len:546059903 1162 mmu set 00010000, pos 00010000 1162 mmu set 00020000, pos 00020000 1162 mmu set 00030000, pos 00030000 1162 mmu set 00040000, pos 00040000 1162 mmu set 00050000, pos 00050000 1162 mmu set 00060000, pos 00060000 1162 mmu set 00070000, pos 00070000 1162 mmu set 00080000, pos 00080000 1162 mmu set 00090000, pos 00090000 1162 mmu set 000a0000, pos 000a0000 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) configsip: 0, SPIWP:0xee clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00 mode:DIO, clock div:2 load:0x3fff0038,len:2760 load:0x40078000,len:22380 ho 0 tail 12 room 4 load:0x4652bdd7,len:546059903
The summary:
Calibration fuses: BLK3_PART_RESERVE (BLOCK0): BLOCK3 partially served for ADC calibration data = False R/W (0b0) ADC_VREF (BLOCK0): Voltage reference calibration = 1079 R/W (0b10011)
Config fuses: XPD_SDIO_FORCE (BLOCK0): Ignore MTDI pin (GPIO12) for VDD_SDIO on reset = False R/W (0b0) XPD_SDIO_REG (BLOCK0): If XPD_SDIO_FORCE, enable VDD_SDIO reg on reset = False R/W (0b0) XPD_SDIO_TIEH (BLOCK0): If XPD_SDIO_FORCE & XPD_SDIO_REG = 1.8V R/W (0b0) CLK8M_FREQ (BLOCK0): 8MHz clock freq override = 53 R/W (0x35) SPI_PAD_CONFIG_CLK (BLOCK0): Override SD_CLK pad (GPIO6/SPICLK) = 0 R/W (0b00000) SPI_PAD_CONFIG_Q (BLOCK0): Override SD_DATA_0 pad (GPIO7/SPIQ) = 0 R/W (0b00000) SPI_PAD_CONFIG_D (BLOCK0): Override SD_DATA_1 pad (GPIO8/SPID) = 0 R/W (0b00000) SPI_PAD_CONFIG_HD (BLOCK0): Override SD_DATA_2 pad (GPIO9/SPIHD) = 0 R/W (0b00000) SPI_PAD_CONFIG_CS0 (BLOCK0): Override SD_CMD pad (GPIO11/SPICS0) = 0 R/W (0b00000) DISABLE_SDIO_HOST (BLOCK0): Disable SDIO host = False R/W (0b0)
Efuse fuses: WR_DIS (BLOCK0): Efuse write disable mask = 128 R/W (0x0080) RD_DIS (BLOCK0): Efuse read disable mask = 1 R/W (0x1) CODING_SCHEME (BLOCK0): Efuse variable block length scheme = NONE (BLK1-3 len=256 bits) R/W (0b00) KEY_STATUS (BLOCK0): Usage of efuse block 3 (reserved) = False R/W (0b0)
Identity fuses: MAC (BLOCK0): Factory MAC Address = ac:67:b2:2c:2e:28 (CRC 0x24 OK) R/W MAC_CRC (BLOCK0): CRC8 for factory MAC address = 36 R/W (0x24) CHIP_VER_REV1 (BLOCK0): Silicon Revision 1 = True R/W (0b1) CHIP_VER_REV2 (BLOCK0): Silicon Revision 2 = False R/W (0b0) CHIP_VERSION (BLOCK0): Reserved for future chip versions = 2 R/W (0b10) CHIP_PACKAGE (BLOCK0): Chip package identifier = 0 R/W (0b000) MAC_VERSION (BLOCK3): Version of the MAC field = 0 R/W (0x00)
Security fuses: FLASH_CRYPT_CNT (BLOCK0): Flash encryption mode counter = 1 R/W (0b0000001) UART_DOWNLOAD_DIS (BLOCK0): Disable UART download mode (ESP32 rev3 only) = False R/W (0b0) FLASH_CRYPT_CONFIG (BLOCK0): Flash encryption config (key tweak bits) = 15 R/W (0xf) CONSOLE_DEBUG_DISABLE (BLOCK0): Disable ROM BASIC interpreter fallback = True R/W (0b1) ABS_DONE_0 (BLOCK0): Secure boot V1 is enabled for bootloader image = False R/W (0b0) ABS_DONE_1 (BLOCK0): Secure boot V2 is enabled for bootloader image = False R/W (0b0) JTAG_DISABLE (BLOCK0): Disable JTAG = True R/W (0b1) DISABLE_DL_ENCRYPT (BLOCK0): Disable flash encryption in UART bootloader = True R/W (0b1) DISABLE_DL_DECRYPT (BLOCK0): Disable flash decryption in UART bootloader = True R/W (0b1) DISABLE_DL_CACHE (BLOCK0): Disable flash cache in UART bootloader = True R/W (0b1) BLOCK1 (BLOCK1): Flash encryption key = ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? ?? -/- BLOCK2 (BLOCK2): Secure boot key = 97 7d 20 c9 4a 8e be 20 16 4d ff 7b 23 c0 93 3b 19 b4 af ee af 73 9b 98 03 82 be 5e ab 90 c4 02 R/W BLOCK3 (BLOCK3): Variable Block 3 = 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 R/W
Flash voltage (VDD_SDIO) determined by GPIO12 on reset (High for 1.8V, Low/NC for 3.3V).
**I changed to enabled the secureBoot and flashEncryption and run the command idf.py flash.
Did you actually follow my commands, i.e. using idf.py bootloader-flash
and idf.py erase-flash
?
Of course! i did all these steps!
@roysG Hmm, I'm sorry then, I have no idea what's happening. I did these steps on a ESP32 without any issues.
Can you think of anyways to help me reproduce this issue on my side? Is your project open source? Can you attach your sdkconfig file?
Of course i attach the the sdkconfig:
#
# CONFIG_IDF_CMAKE=y CONFIG_IDF_TARGET_ARCH_XTENSA=y CONFIG_IDF_TARGET="esp32" CONFIG_IDF_TARGET_ESP32=y CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000
#
# CONFIG_SDK_TOOLPREFIX="xtensa-esp32-elf-"
#
# CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y
CONFIG_APP_BUILD_GENERATE_BINARIES=y CONFIG_APP_BUILD_BOOTLOADER=y CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y
#
# CONFIG_APP_COMPILE_TIME_DATE=y
CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16
#
# CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y
CONFIG_BOOTLOADER_LOG_LEVEL_NONE=y
CONFIG_BOOTLOADER_LOG_LEVEL=0
CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y
CONFIG_BOOTLOADER_WDT_ENABLE=y
CONFIG_BOOTLOADER_WDT_TIME_MS=9000
CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0
CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y
#
# CONFIG_SECURE_SIGNED_ON_BOOT=y CONFIG_SECURE_SIGNED_ON_UPDATE=y CONFIG_SECURE_SIGNED_APPS=y CONFIG_SECURE_SIGNED_APPS_ECDSA_SCHEME=y CONFIG_SECURE_BOOT=y CONFIG_SECURE_BOOT_V1_ENABLED=y CONFIG_SECURE_BOOTLOADER_ONE_TIME_FLASH=y
CONFIG_SECURE_BOOT_BUILD_SIGNED_BINARIES=y CONFIG_SECURE_BOOT_SIGNING_KEY="secure_boot_signing_key.pem"
CONFIG_SECURE_FLASH_ENC_ENABLED=y
CONFIG_SECURE_FLASH_ENCRYPTION_MODE_RELEASE=y CONFIG_SECURE_FLASH_CHECK_ENC_EN_IN_APP=y
#
# CONFIG_ESPTOOLPY_BAUD_OTHER_VAL=115200
CONFIG_ESPTOOLPY_FLASHMODE_DIO=y
CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y CONFIG_ESPTOOLPY_FLASHMODE="dio"
CONFIG_ESPTOOLPY_FLASHFREQ_40M=y
CONFIG_ESPTOOLPY_FLASHFREQ="40m"
CONFIG_ESPTOOLPY_FLASHSIZE_2MB=y
CONFIG_ESPTOOLPY_FLASHSIZE="2MB" CONFIG_ESPTOOLPY_FLASHSIZE_DETECT=y CONFIG_ESPTOOLPY_BEFORE_RESET=y
CONFIG_ESPTOOLPY_BEFORE="default_reset" CONFIG_ESPTOOLPY_AFTER_RESET=y
CONFIG_ESPTOOLPY_AFTER="hard_reset"
CONFIG_ESPTOOLPY_MONITOR_BAUD_115200B=y
CONFIG_ESPTOOLPY_MONITOR_BAUD_OTHER_VAL=115200 CONFIG_ESPTOOLPY_MONITOR_BAUD=115200
#
# CONFIG_PARTITION_TABLE_SINGLE_APP=y
CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y
#
# CONFIG_ESP_RMAKER_TASK_STACK=4096 CONFIG_ESP_RMAKER_TASK_PRIORITY=5 CONFIG_ESP_RMAKER_MAX_NODE_CONFIG_SIZE=2048 CONFIG_ESP_RMAKER_MAX_PARAM_DATA_SIZE=1024 CONFIG_ESP_RMAKER_FACTORY_PARTITION_NAME="fctry"
CONFIG_ESP_RMAKER_MQTT_PORT_443=y
CONFIG_ESP_RMAKER_MQTT_PORT=1 CONFIG_ESP_RMAKER_DEF_TIMEZONE="" CONFIG_ESP_RMAKER_SNTP_SERVER_NAME="pool.ntp.org"
CONFIG_ESP_RMAKER_CONSOLE_UART_NUM_0=y
CONFIG_ESP_RMAKER_CONSOLE_UART_NUM=0
#
# CONFIG_ESP_RMAKER_OTA_AUTOFETCH=y CONFIG_ESP_RMAKER_OTA_AUTOFETCH_PERIOD=0
#
# CONFIG_ESP_RMAKER_SCHEDULING_MAX_SCHEDULES=5
#
# CONFIG_ENABLE_ARDUINO_DEPENDS=y CONFIG_AUTOSTART_ARDUINO=y
CONFIG_ARDUINO_RUN_CORE1=y
CONFIG_ARDUINO_RUNNING_CORE=1 CONFIG_ARDUINO_LOOP_STACK_SIZE=8192
CONFIG_ARDUINO_EVENT_RUN_CORE1=y
CONFIG_ARDUINO_EVENT_RUNNING_CORE=1
CONFIG_ARDUINO_UDP_RUN_CORE1=y
CONFIG_ARDUINO_UDP_TASK_PRIORITY=3 CONFIG_ARDUINO_UDP_RUNNING_CORE=1
#
#
CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL_ERROR=y
CONFIG_ARDUHAL_LOG_DEFAULT_LEVEL=1
CONFIG_ARDUHAL_PARTITION_SCHEME_DEFAULT=y
CONFIG_ARDUHAL_PARTITION_SCHEME="default"
#
#
#
# CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y
CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2
CONFIG_COMPILER_HIDE_PATHS_MACROS=y
CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y
#
#
#
#
CONFIG_APPTRACE_DEST_NONE=y CONFIG_APPTRACE_LOCK_ENABLE=y
#
#
#
#
#
# CONFIG_COAP_MBEDTLS_PSK=y
CONFIG_COAP_LOG_DEFAULT_LEVEL=0
#
#
#
#
CONFIG_ADC_DISABLE_DAC=y
#
#
#
#
CONFIG_SPI_MASTER_ISR_IN_IRAM=y
CONFIG_SPI_SLAVE_ISR_IN_IRAM=y
#
#
#
#
#
#
#
#
#
#
CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y
CONFIG_EFUSE_MAX_BLK_LEN=192
#
# CONFIG_ESP_TLS_USING_MBEDTLS=y
#
# CONFIG_ESP32_REV_MIN_0=y
CONFIG_ESP32_REV_MIN=0 CONFIG_ESP32_DPORT_WORKAROUND=y
CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y
CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160
CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0
CONFIG_ESP32_ULP_COPROC_RESERVE_MEM=0 CONFIG_ESP32_DEBUG_OCDAWARE=y CONFIG_ESP32_BROWNOUT_DET=y CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y
CONFIG_ESP32_BROWNOUT_DET_LVL=0 CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y
CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y
CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 CONFIG_ESP32_XTAL_FREQ_40=y
CONFIG_ESP32_XTAL_FREQ=40
CONFIG_ESP32_DPORT_DIS_INTERRUPT_LVL=5
#
# CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y CONFIG_ADC_CAL_LUT_ENABLE=y
#
# CONFIG_ESP_ERR_TO_NAME_LOOKUP=y
#
# CONFIG_ETH_ENABLED=y CONFIG_ETH_USE_ESP32_EMAC=y CONFIG_ETH_PHY_INTERFACE_RMII=y CONFIG_ETH_RMII_CLK_INPUT=y
CONFIG_ETH_RMII_CLK_IN_GPIO=0 CONFIG_ETH_DMA_BUFFER_SIZE=512 CONFIG_ETH_DMA_RX_BUFFER_NUM=10 CONFIG_ETH_DMA_TX_BUFFER_NUM=10 CONFIG_ETH_USE_SPI_ETHERNET=y
#
#
CONFIG_ESP_EVENT_POST_FROM_ISR=y CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y
#
#
#
# CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y
CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y
#
# CONFIG_HTTPD_MAX_REQ_HDR_LEN=512 CONFIG_HTTPD_MAX_URI_LEN=512 CONFIG_HTTPD_ERR_RESP_NO_DELAY=y CONFIG_HTTPD_PURGE_BUF_LEN=32
#
#
#
#
#
#
#
# CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y
CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4
#
# CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y
#
# CONFIG_ESP_IPC_TASK_STACK_SIZE=1024 CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y CONFIG_ESP_IPC_ISR_ENABLE=y
#
#
#
# CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE=32
#
# CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 CONFIG_ESP_NETIF_TCPIP_LWIP=y
CONFIG_ESP_NETIF_TCPIP_ADAPTER_COMPATIBLE_LAYER=y
#
# CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y
CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=20 CONFIG_ESP_PHY_MAX_TX_POWER=20 CONFIG_ESP_PHY_REDUCE_TX_POWER=y
#
#
#
#
CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y
#
#
CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y
CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 CONFIG_ESP_CONSOLE_UART_DEFAULT=y
CONFIG_ESP_CONSOLE_UART=y CONFIG_ESP_CONSOLE_MULTIPLE_UART=y CONFIG_ESP_CONSOLE_UART_NUM=0 CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 CONFIG_ESP_INT_WDT=y CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 CONFIG_ESP_INT_WDT_CHECK_CPU1=y CONFIG_ESP_TASK_WDT=y
CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y
CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y
#
#
CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1
CONFIG_ESP_TIMER_IMPL_TG0_LAC=y
#
# CONFIG_ESP32_WIFI_ENABLED=y CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32
CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32
CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED=y CONFIG_ESP32_WIFI_TX_BA_WIN=6 CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED=y CONFIG_ESP32_WIFI_RX_BA_WIN=6 CONFIG_ESP32_WIFI_NVS_ENABLED=y CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y
CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 CONFIG_ESP32_WIFI_IRAM_OPT=y CONFIG_ESP32_WIFI_RX_IRAM_OPT=y CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y
#
#
CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y
#
# CONFIG_FATFS_VOLUME_COUNT=2
CONFIG_FATFS_CODEPAGE_437=y
CONFIG_FATFS_CODEPAGE=437 CONFIG_FATFS_LFN_NONE=y
CONFIG_FATFS_FS_LOCK=0 CONFIG_FATFS_TIMEOUT_MS=10000 CONFIG_FATFS_PER_FILE_CACHE=y
#
# CONFIG_FMB_COMM_MODE_TCP_EN=y CONFIG_FMB_TCP_PORT_DEFAULT=502 CONFIG_FMB_TCP_PORT_MAX_CONN=5 CONFIG_FMB_TCP_CONNECTION_TOUT_SEC=20 CONFIG_FMB_COMM_MODE_RTU_EN=y CONFIG_FMB_COMM_MODE_ASCII_EN=y CONFIG_FMB_MASTER_TIMEOUT_MS_RESPOND=150 CONFIG_FMB_MASTER_DELAY_MS_CONVERT=200 CONFIG_FMB_QUEUE_LENGTH=20 CONFIG_FMB_PORT_TASK_STACK_SIZE=4096 CONFIG_FMB_SERIAL_BUF_SIZE=256 CONFIG_FMB_SERIAL_ASCII_BITS_PER_SYMB=8 CONFIG_FMB_SERIAL_ASCII_TIMEOUT_RESPOND_MS=1000 CONFIG_FMB_PORT_TASK_PRIO=10
CONFIG_FMB_PORT_TASK_AFFINITY_CPU0=y
CONFIG_FMB_PORT_TASK_AFFINITY=0x0 CONFIG_FMB_CONTROLLER_SLAVE_ID_SUPPORT=y CONFIG_FMB_CONTROLLER_SLAVE_ID=0x00112233 CONFIG_FMB_CONTROLLER_NOTIFY_TIMEOUT=20 CONFIG_FMB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 CONFIG_FMB_CONTROLLER_STACK_SIZE=4096 CONFIG_FMB_EVENT_QUEUE_TIMEOUT=20
CONFIG_FMB_TIMER_GROUP=0 CONFIG_FMB_TIMER_INDEX=0 CONFIG_FMB_MASTER_TIMER_GROUP=0 CONFIG_FMB_MASTER_TIMER_INDEX=0
#
#
CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER=y CONFIG_FREERTOS_CORETIMER_0=y
CONFIG_FREERTOS_SYSTICK_USES_CCOUNT=y CONFIG_FREERTOS_HZ=100 CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y
CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y
CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 CONFIG_FREERTOS_ASSERT_FAIL_ABORT=y
CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 CONFIG_FREERTOS_ISR_STACKSIZE=1536
CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y
CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0
CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y
CONFIG_FREERTOS_DEBUG_OCDAWARE=y
CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y
#
# CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y
CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2
#
# CONFIG_HEAP_POISONING_DISABLED=y
CONFIG_HEAP_TRACING_OFF=y
#
#
#
#
#
#
CONFIG_LOG_DEFAULT_LEVEL_INFO=y
CONFIG_LOG_DEFAULT_LEVEL=3 CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y
CONFIG_LOG_MAXIMUM_LEVEL=3 CONFIG_LOG_COLORS=y CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y
#
# CONFIG_LWIP_LOCAL_HOSTNAME="espressif"
CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y
CONFIG_LWIP_TIMERS_ONDEMAND=y CONFIG_LWIP_MAX_SOCKETS=10
CONFIG_LWIP_SO_REUSE=y CONFIG_LWIP_SO_REUSE_RXTOALL=y CONFIG_LWIP_SO_RCVBUF=y
CONFIG_LWIP_IP4_FRAG=y CONFIG_LWIP_IP6_FRAG=y
CONFIG_LWIP_ESP_GRATUITOUS_ARP=y CONFIG_LWIP_GARP_TMR_INTERVAL=60 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y
CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y
CONFIG_LWIP_DHCP_OPTIONS_LEN=68
#
# CONFIG_LWIP_DHCPS=y CONFIG_LWIP_DHCPS_LEASE_UNIT=60 CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8
CONFIG_LWIP_IPV6=y
CONFIG_LWIP_IPV6_NUM_ADDRESSES=3
CONFIG_LWIP_NETIF_LOOPBACK=y CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8
#
# CONFIG_LWIP_MAX_ACTIVE_TCP=16 CONFIG_LWIP_MAX_LISTENING_TCP=16 CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y CONFIG_LWIP_TCP_MAXRTX=12 CONFIG_LWIP_TCP_SYNMAXRTX=12 CONFIG_LWIP_TCP_MSS=1440 CONFIG_LWIP_TCP_TMR_INTERVAL=250 CONFIG_LWIP_TCP_MSL=60000 CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5744 CONFIG_LWIP_TCP_WND_DEFAULT=5744 CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y
CONFIG_LWIP_TCP_OVERSIZE_MSS=y
CONFIG_LWIP_TCP_RTO_TIME=1500
#
# CONFIG_LWIP_MAX_UDP_PCBS=16 CONFIG_LWIP_UDP_RECVMBOX_SIZE=6
#
#
CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y
CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF
CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5
#
# CONFIG_LWIP_ICMP=y
#
# CONFIG_LWIP_MAX_RAW_PCBS=16
#
# CONFIG_LWIP_SNTP_MAX_SERVERS=1
CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000
CONFIG_LWIP_ESP_LWIP_ASSERT=y
#
#
CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y
CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y
CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y
CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y
#
# CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y
CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096
#
# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y
CONFIG_MBEDTLS_HARDWARE_AES=y CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_SHA=y CONFIG_MBEDTLS_ROM_MD5=y
CONFIG_MBEDTLS_HAVE_TIME=y
CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y CONFIG_MBEDTLS_SHA512_C=y CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y
CONFIG_MBEDTLS_TLS_SERVER=y CONFIG_MBEDTLS_TLS_CLIENT=y CONFIG_MBEDTLS_TLS_ENABLED=y
#
#
CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_DHE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y
CONFIG_MBEDTLS_SSL_RENEGOTIATION=y
CONFIG_MBEDTLS_SSL_PROTO_TLS1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_1=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y
CONFIG_MBEDTLS_SSL_ALPN=y CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y CONFIG_MBEDTLS_X509_CHECK_KEY_USAGE=y CONFIG_MBEDTLS_X509_CHECK_EXTENDED_KEY_USAGE=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y
#
# CONFIG_MBEDTLS_AES_C=y
CONFIG_MBEDTLS_RC4_DISABLED=y
CONFIG_MBEDTLS_CCM_C=y CONFIG_MBEDTLS_GCM_C=y
#
# CONFIG_MBEDTLS_PEM_PARSE_C=y CONFIG_MBEDTLS_PEM_WRITE_C=y CONFIG_MBEDTLS_X509_CRL_PARSE_C=y CONFIG_MBEDTLS_X509_CSR_PARSE_C=y
CONFIG_MBEDTLS_ECP_C=y CONFIG_MBEDTLS_ECDH_C=y CONFIG_MBEDTLS_ECDSA_C=y
CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y CONFIG_MBEDTLS_ECP_NIST_OPTIM=y
#
# CONFIG_MDNS_MAX_SERVICES=10 CONFIG_MDNS_TASK_PRIORITY=1 CONFIG_MDNS_TASK_STACK_SIZE=4096
CONFIG_MDNS_TASK_AFFINITY_CPU0=y
CONFIG_MDNS_TASK_AFFINITY=0x0 CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000
CONFIG_MDNS_TIMER_PERIOD_MS=100
CONFIG_MDNS_MULTIPLE_INSTANCE=y
#
# CONFIG_MQTT_PROTOCOL_311=y CONFIG_MQTT_TRANSPORT_SSL=y CONFIG_MQTT_TRANSPORT_WEBSOCKET=y CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y
#
# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y
CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y
#
# CONFIG_NVS_ENCRYPTION=y
#
#
CONFIG_OPENSSL_ERROR_STACK=y
CONFIG_OPENSSL_ASSERT_EXIT=y
#
#
#
# CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 CONFIG_PTHREAD_STACK_MIN=768 CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y
CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread"
#
#
CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y
CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192
#
# CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y
CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y
#
# CONFIG_SPIFFS_MAX_PARTITIONS=3
#
# CONFIG_SPIFFS_CACHE=y CONFIG_SPIFFS_CACHE_WR=y
CONFIG_SPIFFS_PAGE_CHECK=y CONFIG_SPIFFS_GC_MAX_RUNS=10
CONFIG_SPIFFS_PAGE_SIZE=256 CONFIG_SPIFFS_OBJ_NAME_LEN=32
CONFIG_SPIFFS_USE_MAGIC=y CONFIG_SPIFFS_USE_MAGIC_LENGTH=y CONFIG_SPIFFS_META_LENGTH=4 CONFIG_SPIFFS_USE_MTIME=y
#
#
#
#
#
# CONFIG_WS_TRANSPORT=y CONFIG_WS_BUFFER_SIZE=1024
#
# CONFIG_UNITY_ENABLE_FLOAT=y CONFIG_UNITY_ENABLE_DOUBLE=y
CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y
#
# CONFIG_VFS_SUPPORT_IO=y CONFIG_VFS_SUPPORT_DIR=y CONFIG_VFS_SUPPORT_SELECT=y CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y CONFIG_VFS_SUPPORT_TERMIOS=y
#
# CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 CONFIG_VFS_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
#
#
CONFIG_WL_SECTOR_SIZE_4096=y CONFIG_WL_SECTOR_SIZE=4096
#
# CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30
#
# CONFIG_WPA_MBEDTLS_CRYPTO=y
#
# CONFIG_IO_GLITCH_FILTER_TIME_MS=50
#
# CONFIG_DSP_OPTIMIZATIONS_SUPPORTED=y
CONFIG_DSP_OPTIMIZED=y CONFIG_DSP_OPTIMIZATION=1
CONFIG_DSP_MAX_FFT_SIZE_4096=y
CONFIG_DSP_MAX_FFT_SIZE=4096
#
# CONFIG_OV7670_SUPPORT=y CONFIG_OV7725_SUPPORT=y CONFIG_NT99141_SUPPORT=y CONFIG_OV2640_SUPPORT=y CONFIG_OV3660_SUPPORT=y CONFIG_OV5640_SUPPORT=y CONFIG_GC2145_SUPPORT=y CONFIG_GC032A_SUPPORT=y CONFIG_GC0308_SUPPORT=y
CONFIG_SCCB_HARDWARE_I2C_PORT1=y
CONFIG_GC_SENSOR_SUBSAMPLE_MODE=y CONFIG_CAMERA_CORE0=y
CONFIG_CAMERA_DMA_BUFFER_SIZE_MAX=32768
#
# CONFIG_LITTLEFS_MAX_PARTITIONS=3 CONFIG_LITTLEFS_PAGE_SIZE=256 CONFIG_LITTLEFS_OBJ_NAME_LEN=64 CONFIG_LITTLEFS_READ_SIZE=128 CONFIG_LITTLEFS_WRITE_SIZE=128 CONFIG_LITTLEFS_LOOKAHEAD_SIZE=128 CONFIG_LITTLEFS_CACHE_SIZE=512 CONFIG_LITTLEFS_BLOCK_CYCLES=512 CONFIG_LITTLEFS_USE_MTIME=y
CONFIG_LITTLEFS_MTIME_USE_SECONDS=y
#
#
CONFIG_TOOLPREFIX="xtensa-esp32-elf-" CONFIG_LOG_BOOTLOADER_LEVEL_NONE=y
CONFIG_LOG_BOOTLOADER_LEVEL=0
CONFIG_SECURE_BOOT_ENABLED=y CONFIG_FLASH_ENCRYPTION_ENABLED=y
CONFIG_FLASHMODE_DIO=y
CONFIG_MONITOR_BAUD_115200B=y
CONFIG_MONITOR_BAUD_OTHER_VAL=115200 CONFIG_MONITOR_BAUD=115200 CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y
CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y
CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2
CONFIG_STACK_CHECK_NONE=y
CONFIG_ESP32_APPTRACE_DEST_NONE=y CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y CONFIG_ADC2_DISABLE_DAC=y
CONFIG_TRACEMEM_RESERVE_DRAM=0x0
CONFIG_ULP_COPROC_RESERVE_MEM=0 CONFIG_BROWNOUT_DET=y CONFIG_BROWNOUT_DET_LVL_SEL_0=y
CONFIG_BROWNOUT_DET_LVL=0 CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y
CONFIG_POST_EVENTS_FROM_ISR=y CONFIG_POST_EVENTS_FROM_IRAM_ISR=y
CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 CONFIG_ESP_SYSTEM_PD_FLASH=y
CONFIG_IPC_TASK_STACK_SIZE=1024 CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y
CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=20 CONFIG_ESP32_PHY_MAX_TX_POWER=20 CONFIG_ESP32_REDUCE_PHY_TX_POWER=y
CONFIG_ESP32S2_PANIC_PRINT_REBOOT=y
CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_MAIN_TASK_STACK_SIZE=3584 CONFIG_CONSOLE_UART_DEFAULT=y
CONFIG_CONSOLE_UART=y CONFIG_CONSOLE_UART_NUM=0 CONFIG_CONSOLE_UART_BAUDRATE=115200 CONFIG_INT_WDT=y CONFIG_INT_WDT_TIMEOUT_MS=300 CONFIG_INT_WDT_CHECK_CPU1=y CONFIG_TASK_WDT=y
CONFIG_TASK_WDT_TIMEOUT_S=5 CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y CONFIG_TIMER_TASK_STACK_SIZE=3584
CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y CONFIG_MB_MASTER_TIMEOUT_MS_RESPOND=150 CONFIG_MB_MASTER_DELAY_MS_CONVERT=200 CONFIG_MB_QUEUE_LENGTH=20 CONFIG_MB_SERIAL_TASK_STACK_SIZE=4096 CONFIG_MB_SERIAL_BUF_SIZE=256 CONFIG_MB_SERIAL_TASK_PRIO=10 CONFIG_MB_CONTROLLER_SLAVE_ID_SUPPORT=y CONFIG_MB_CONTROLLER_SLAVE_ID=0x00112233 CONFIG_MB_CONTROLLER_NOTIFY_TIMEOUT=20 CONFIG_MB_CONTROLLER_NOTIFY_QUEUE_SIZE=20 CONFIG_MB_CONTROLLER_STACK_SIZE=4096 CONFIG_MB_EVENT_QUEUE_TIMEOUT=20
CONFIG_MB_TIMER_GROUP=0 CONFIG_MB_TIMER_INDEX=0
CONFIG_TIMER_TASK_PRIORITY=1 CONFIG_TIMER_TASK_STACK_DEPTH=2048 CONFIG_TIMER_QUEUE_LENGTH=10
CONFIG_ESP_GRATUITOUS_ARP=y CONFIG_GARP_TMR_INTERVAL=60 CONFIG_TCPIP_RECVMBOX_SIZE=32 CONFIG_TCP_MAXRTX=12 CONFIG_TCP_SYNMAXRTX=12 CONFIG_TCP_MSS=1440 CONFIG_TCP_MSL=60000 CONFIG_TCP_SND_BUF_DEFAULT=5744 CONFIG_TCP_WND_DEFAULT=5744 CONFIG_TCP_RECVMBOX_SIZE=6 CONFIG_TCP_QUEUE_OOSEQ=y
CONFIG_TCP_OVERSIZE_MSS=y
CONFIG_UDP_RECVMBOX_SIZE=6 CONFIG_TCPIP_TASK_STACK_SIZE=3072 CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y
CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF
CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 CONFIG_ESP32_PTHREAD_STACK_MIN=768 CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y
CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y
CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y CONFIG_SUPPORT_TERMIOS=y CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 CONFIG_SEMIHOSTFS_HOST_PATH_MAX_LEN=128
Can you also suggest me the correct steps to override the flash encryption manually? Maybe this way will be the best solution for me.
Thank you.
@roysG Didnt see anything strange in your kconfig file except the ardunio configs. Do you think this could impact anything? What is for exactly? Are you using platform.io/Arduino etc?
correct steps to override the flash encryption manually
You mean burning all the fuses manually? I'm afroid this would be even more error prone.
I am using arduino.
I would be great if you xan write the manual command for burnning the flash encryption. I succeed to burn the secure boot
On Wed, 27 Oct 2021, 12:29 ESP-Marius @.***> wrote:
@roysG https://github.com/roysG Didnt see anything strange in your kconfig file except the ardunio configs. Do you think this could impact anything? What is for exactly? Are you using platform.io/Arduino etc?
correct steps to override the flash encryption manually
You mean burning all the fuses manually? I'm afroid this would be even more error prone.
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@ESP-Marius ?
Hi, I generated a key and burned it to device. When i enabled flash encryption, set it to development mode and run the command: idf.py flash monitor
I get errors that i burned regular plaintext(not encrypted). When i run the command "idf.py encrypted-flash monitor" then it run ok.
Then I tried to run the flash encryption in production, I changed it in the menu to production and run the command "idf.py flash monitor".
But i got errors (running without ending):
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
rst:0x10 (RTCWDT_RTC_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT) flash read err, 1000 ets_main.c 371 ets Jun 8 2016 00:22:57
What do i miss?
I follow this document: https://docs.espressif.com/projects/esp-idf/en/release-v4.2/esp32/security/flash-encryption.html#flash-encryption-algorithm
Also it is important to mention, I succeed to burn the key with this lines:
espsecure.py generate_flash_encryption_key my_flash_encryption_key.bin espefuse.py --port PORT burn_key flash_encryption my_flash_encryption_key.bin
But, i could not understand how to run the last line code line: espefuse.py --port /dev/usb-0001 burn_key BLOCK my_flash_encryption_key.bin XTS_AES_128_KEY
What should i set instead the "BLOCK" and "XTS_AES_128_KEY"?