is there a demo for rgb panel(which 8*3 = 24pins RGB data) (IDFGH-6626)

[Kingwulin]

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Environment

• Development Kit: [ESP32-Wrover-Kit|ESP32-DevKitC|ESP32-PICO-Kit|ESP32-LyraT|ESP32-LyraTD-MSC|none]
• Kit version (for WroverKit/PicoKit/DevKitC): [v1|v2|v3|v4]
• Module or chip used: [ESP32-WROOM-32|ESP32-WROOM-32D|ESP32-WROOM-32U|ESP32-WROVER|ESP32-WROVER-I|ESP32-WROVER-B|ESP32-WROVER-IB|ESP32-SOLO-1|ESP32-PICO-D4|ESP32]
• IDF version (run git describe --tags to find it): // v3.2-dev-1148-g96cd3b75c
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• (Windows only) environment type: [MSYS2 mingw32|ESP Command Prompt|Plain Command Prompt|PowerShell].
• Using an IDE?: [No|Yes (please give details)]
• Power Supply: [USB|external 5V|external 3.3V|Battery]

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Expected Behavior

Actual Behavior

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Code to reproduce this issue

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#include "esp_log.h"

void app_main()
{

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[suda-morris]

At the moment, there's only one lvgl demo in the test folder. We will push a new example recently. But is for RGB565 LCD. ESP32S3 doesn't support a parallel 24 bit-width RGB LCD.

[Kingwulin]

And is it possible to modify the test demo https://github.com/espressif/esp-idf/blob/master/components/esp_lcd/test/test_rgb_panel.c to support a parallel 24 bit-width RGB LCD

[Kingwulin]

At the moment, there's only one lvgl demo in the test folder. We will push a new example recently. But is for RGB565 LCD. ESP32S3 doesn't support a parallel 24 bit-width RGB LCD.

hello!!! I build the code ok ,but when i run it ,it say like this: _ [17:52:38.753]收←◆餎SP-ROM:esp32s3-20210327 Build:Mar 27 2021 rst:0x1 (POWERON),boot:0x8 (SPI_FAST_FLASH_BOOT) SPIWP:0xee mode:DIO, clock div:1 load:0x3fcd0108,len:0x16dc load:0x403b6000,len:0xb7c load:0x403ba000,len:0x2f90 entry 0x403b6248 I (24) boot: ESP-IDF v5.0-dev-1281-g09f5c1d32e 2nd stage bootloader I (25) boot: compile time 17:40:38 I (25) boot: chip revision: 0 I (28) boot.esp32s3: Boot SPI Speed : 80MHz I (33) boot.esp32s3: SPI Mode : DIO I (37) boot.esp32s3: SPI Flash Size : 2MB I (42) boot: Enabling RNG early entropy source... I (48) boot: Partition Table: I (51) boot: ## Label Usage Type ST Offset Length I (58) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (66) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (73) boot: 2 factory factory app 00 00 00010000 00100000 I (81) boot: End of partition table I (85) esp_image: segment 0: paddr=00010020 vaddr=3c040020 size=0d738h ( 55096) map I (103) esp_image: segment 1: paddr=0001d760 vaddr=3fc91e10 size=028b8h ( 10424) load I (106) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=3fafch (260860) map

[17:52:38.911]收←◆I (157) esp_image: segment 3: paddr=0005fb24 vaddr=3fc946c8 size=003ach ( 940) load I (158) esp_image: segment 4: paddr=0005fed8 vaddr=40374000 size=0de0ch ( 56844) load I (175) esp_image: segment 5: paddr=0006dcec vaddr=50000000 size=00010h ( 16) load I (181) boot: Loaded app from partition at offset 0x10000 I (181) boot: Disabling RNG early entropy source... I (196) opi psram: vendor id : 0x00 (UNKNOWN) I (196) opi psram: dev id : 0x03 (generation 4) I (196) opi psram: density : 0x07 (256 Mbit) I (201) opi psram: good-die : 0x01 (Pass) I (206) opi psram: Latency : 0x01 (Fixed) I (211) opi psram: VCC : 0x01 (3V) I (216) opi psram: SRF : 0x00 (Slow Refresh) I (222) opi psram: BurstType : [17:52:39.007]收←◆ 0x01 ( Wrap) I (227) opi psram: BurstLen : 0x03 (1024 Byte) I (232) opi psram: Readlatency : 0x07 (20 cycles@Fixed) I (238) opi psram: DriveStrength: 0x03 (1/8) W (243) PSRAM: DO NOT USE FOR MASS PRODUCTION! Timing parameters will be updated in future IDF version. W (254) MSPI Timing: tuning fail, best point is fallen back to index 1 I (260) spiram: Found 32MB SPI RAM device I (265) spiram: Speed: 80MHz I (269) spiram: Initialized, cache is in normal (1-core) mode. E (275) spiram: Virtual address not enough for PSRAM!

abort() was called at PC 0x40376475 on core 0

Backtrac [17:52:39.071]收←◆e:0x40375be2:0x3fceb2400x40379935:0x3fceb260 0x4037fa72:0x3fceb280 0x40376475:0x3fceb2f0 0x403753ca:0x3fceb310 0x403bb0c4:0x3fceb340 0x403bb52d:0x3fceb380 0x403b62b1:0x3fceb4b0 0x40045c01:0x3fceb570 |<-CORRUPTED

ELF file SHA256: 2971b2c87cbf371e

Rebooting... ESP-ROM:esp32s3-20210327 Build:Mar 27 2021 rst:0xc (RTC_SW_CPU_RST),boot:0x8 (SPI_FAST_FLASH_BOOT) Saved PC:0x40375888 SPIWP:0xee mode:DIO, clock div:1 load:0x3fcd0108,len:0x16dc load:0x403b6000,len:0xb7c load:0x403ba000,len:0x2f90 entry 0x403b6248 I (29) boot: ESP-IDF v5.0-dev-1281-g09f5c1d32e 2nd stage bootloader I (29) boot: compile time 17:40:38 I (29) boot: chip revision: 0 I (32) boot.esp32s3: Boot SPI Speed : 80MHz I (37) boot.esp32s3: SPI Mode : DIO I (42) boot.esp32s3: SPI Flash Size : 2MB I (47) boot: Enabling RNG early entropy source... I (52) boot: Partition Table: I (56) boot: ## Label Usage Type ST Offset Length I (63) boot: 0 nvs WiFi data 01 02 00009000 00006000 I (70) boot: 1 phy_init RF data 01 01 0000f000 00001000 I (78) boot: 2 factory factory app 00 00 00010000 00100000 I (85) boot: End of partition table [ [17:52:39.193]收←◆0;32mI (89) esp_image: segment 0: paddr=00010020 vaddr=3c040020 size=0d738h ( 55096) map I (108) esp_image: segment 1: paddr=0001d760 vaddr=3fc91e10 size=028b8h ( 10424) load I (110) esp_image: segment 2: paddr=00020020 vaddr=42000020 size=3fafch (260860) map

[17:52:39.237]收←◆I (162) esp_image: segment 3: paddr=0005fb24 vaddr=3fc946c8 size=003ach ( 940) load I (162) esp_image: segment 4: paddr=0005fed8 vaddr=40374000 size=0de0ch ( 56844) load I (180) esp_image: segment 5: paddr=0006dcec vaddr=50000000 size=00010h ( 16) load I (186) boot: Loaded app from partition at offset 0x10000 I (186) boot: Disabling RNG early entropy source... I (200) opi psram: vendor id : 0x00 (UNKNOWN) I (200) opi psram: dev id : 0x03 (generation 4) I (200) opi psram: density : 0x07 (256 Mbit) I (205) opi psram: good-die : 0x01 (Pass) I (210) opi psram: Latency : 0x01 (Fixed) I (215) opi psram: VCC : 0x01 (3V) I (220) opi psram: SRF : 0x00 (Slow Refresh) I (226) opi psram: BurstType : [17:52:39.335]收←◆ 0x01 ( Wrap) I (231) opi psram: BurstLen : 0x03 (1024 Byte) I (237) opi psram: Readlatency : 0x07 (20 cycles@Fixed) I (243) opi psram: DriveStrength: 0x03 (1/8) W (247) PSRAM: DO NOT USE FOR MASS PRODUCTION! Timing parameters will be updated in future IDF version. W (258) MSPI Timing: tuning fail, best point is fallen back to index 1 I (265) spiram: Found 32MB SPI RAM device I (269) spiram: Speed: 80MHz I (273) spiram: Initialized, cache is in normal (1-core) mode. E (279) spiram: Virtual address not enough for PSRAM!

abort() was called at PC 0x40376475 on core 0

Backtrac [17:52:39.397]收←◆e:0x40375be2:0x3fceb2400x40379935:0x3fceb260 0x4037fa72:0x3fceb280 0x40376475:0x3fceb2f0 0x403753ca:0x3fceb310 0x403bb0c4:0x3fceb340 0x403bb52d:0x3fceb380 0x403b62b1:0x3fceb4b0 0x40045c01:0x3fceb570 |<-CORRUPTED

_ how can i

[Kingwulin]

At the moment, there's only one lvgl demo in the test folder. We will push a new example recently. But is for RGB565 LCD. ESP32S3 doesn't support a parallel 24 bit-width RGB LCD.

hello ，would you please give me a replay on this issues https://github.com/espressif/esp-idf/issues/8273

[suda-morris]

The RGB LCD example has been exist on the mater branch for some time. Due to the lack of enough SRAM for the frame buffer, we recommend users to enable the PSRAM (especially using Octal PSRAM) for RGB LCD application.