espressif / esp-idf

Espressif IoT Development Framework. Official development framework for Espressif SoCs.
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SDMMC returns "card status indicates an error after write operation" after each read/write and erase operations on sdspi (IDFGH-7693) #9237

Closed muratdemirtas closed 2 years ago

muratdemirtas commented 2 years ago

Environment

Problem Description

//Detailed problem description goes here.

Expected Behavior

TEST ok, without warning message,

Actual Behavior

TEST passed but warning message exists.

Code to reproduce this issue

// the code should be wrapped in the ```cpp tag so that it will be displayed better.

    rtc_gpio_hold_dis(GPIO_NUM_4);
    esp_err_t ret;
    esp_err_t err = ESP_OK;
    sdmmc_card_t sdCard;
    /*@formatter:off*/
    spi_bus_config_t spiBusConfig = {
            .mosi_io_num = GPIO_NUM_13,
            .miso_io_num = GPIO_NUM_12,
            .sclk_io_num = GPIO_NUM_14,
            .quadwp_io_num = -1,
            .quadhd_io_num = -1,
            .data4_io_num = -1,     ///< GPIO pin for spi data4 signal in octal mode, or -1 if not used.
            .data5_io_num = -1,     ///< GPIO pin for spi data5 signal in octal mode, or -1 if not used.
            .data6_io_num = -1,     ///< GPIO pin for spi data6 signal in octal mode, or -1 if not used.
            .data7_io_num = -1,     ///< GPIO pin for spi data7 signal in octal mode, or -1 if not used.
            .max_transfer_sz = 0, ///< Maximum transfer size, in bytes. Defaults to 4092 if 0 when DMA enabled, or to `SOC_SPI_MAXIMUM_BUFFER_SIZE` if DMA is disabled.
            .flags = 0,                 ///< Abilities of bus to be checked by the driver. Or-ed value of ``SPICOMMON_BUSFLAG_*`` flags.
            .intr_flags = 0
    };/*@formatter:on*/

//Gonna experiment with a seperate SPI device module
    err= spi_bus_initialize(SPI2_HOST, &spiBusConfig, SPI_DMA_CH_AUTO);

    if (err != ESP_OK) {
        ESP_LOGE(TAG, "Failed to init spi2host");
    }
    sdspi_device_config_t SDSPIDeviceConfig = { .host_id = SPI2_HOST,   ///< SPI host to use, SPIx_HOST (see spi_types.h).
            .gpio_cs = static_cast<gpio_num_t>(0),     ///< GPIO number of CS signal
            .gpio_cd = GPIO_NUM_NC,     ///< GPIO number of card detect signal
            .gpio_wp = GPIO_NUM_NC,     ///< GPIO number of write protect signal
            .gpio_int = GPIO_NUM_NC,    ///< GPIO number of interrupt line (input) for SDIO card.
    };

    sdmmc_host_t SDSPIHost = SDSPI_HOST_DEFAULT();
    SDSPIHost.flags = SDMMC_HOST_FLAG_SPI;
    SDSPIHost.slot = SDSPIDeviceConfig.host_id;
    SDSPIHost.max_freq_khz = SDMMC_FREQ_DEFAULT;

    sdspi_dev_handle_t out_handle;
    sdspi_host_init();
    if( sdspi_host_init_device(&SDSPIDeviceConfig, &out_handle) == ESP_OK)
        printf("ESP host init ok\n");
    else
        printf("ESP host init fail\n");

    sdmmc_card_init(&SDSPIHost, &sdCard);

    // Card has been initialized, print its properties
#if LOG_LOCAL_LEVEL > ESP_LOG_WARN
    sdmmc_card_print_info(stdout, &sdCard);
#endif

    printf("SD Card block size %d, read len %d, capacity %d", sdCard.csd.sector_size, sdCard.csd.read_block_len,
           sdCard.csd.capacity);

    // LittleFS_Mount(&sdCard);
    app_test(&sdCard);

#include "esp_log.h"

uint8_t rx_buffer[512];
uint8_t tx_buffer[512];
void app_test(sdmmc_card_t *sdCard) {
    sdCardInstance = sdCard;

    for(int i = 0 ; i < 20000; i++)
    {
        memset(rx_buffer,0,512);
        memset(tx_buffer,0,512);
        for(int i = 0; i < 512; i++)
            rx_buffer[i] = i%255;
        sdmmc_write_sectors(sdCardInstance, rx_buffer,i, 1 );
        sdmmc_read_sectors(sdCardInstance, tx_buffer, i, 1);
        if(memcmp(tx_buffer, rx_buffer, 512) == 0){
            printf("TEST OK, index %d\n", i);
        }else
            printf("TEST FAIL\n");
    }
}

[15:34:57:862] ␍␊ [15:34:57:862] rst:0x1 (POWERON_RESET),boot:0x17 (SPI_FAST_FLASH_BOOT)␍␊ [15:34:57:862] configsip: 0, SPIWP:0xee␍␊ [15:34:57:862] clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00␍␊ [15:34:57:862] mode:DIO, clock div:2␍␊ [15:34:57:862] load:0x3fff0030,len:6612␍␊ [15:34:57:862] load:0x40078000,len:14780␍␊ [15:34:57:862] load:0x40080400,len:3792␍␊ [15:34:57:862] entry 0x40080694␍␊ [15:34:57:862] <0x1b>[0;32mI (27) boot: ESP-IDF v4.4-dirty 2nd stage bootloader<0x1b>[0m␍␊ [15:34:57:862] <0x1b>[0;32mI (27) boot: compile time 11:57:22<0x1b>[0m␍␊ [15:34:57:862] <0x1b>[0;32mI (27) boot: chip revision: 3<0x1b>[0m␍␊ [15:34:57:862] <0x1b>[0;32mI (30) boot_comm: chip revision: 3, min. bootloader chip revision: 0<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (38) boot.esp32: SPI Speed : 40MHz<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (42) boot.esp32: SPI Mode : DIO<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (47) boot.esp32: SPI Flash Size : 2MB<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (51) boot: Enabling RNG early entropy source...<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (57) boot: Partition Table:<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (60) boot: ## Label Usage Type ST Offset Length<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (68) boot: 0 nvs WiFi data 01 02 00009000 00006000<0x1b>[0m␍␊ [15:34:57:904] <0x1b>[0;32mI (75) boot: 1 phy_init RF data 01 01 0000f000 00001000<0x1b>[0m␍␊ [15:34:57:953] <0x1b>[0;32mI (82) boot: 2 factory factory app 00 00 00010000 00100000<0x1b>[0m␍␊ [15:34:57:953] <0x1b>[0;32mI (90) boot: End of partition table<0x1b>[0m␍␊ [15:34:57:953] <0x1b>[0;32mI (94) boot_comm: chip revision: 3, min. application chip revision: 0<0x1b>[0m␍␊ [15:34:57:953] <0x1b>[0;32mI (101) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=0ed74h ( 60788) map<0x1b>[0m␍␊ [15:34:57:953] <0x1b>[0;32mI (132) esp_image: segment 1: paddr=0001ed9c vaddr=3ffb0000 size=0127ch ( 4732) load<0x1b>[0m␍␊ [15:34:57:978] <0x1b>[0;32mI (134) esp_image: segment 2: paddr=00020020 vaddr=400d0020 size=2400ch (147468) map<0x1b>[0m␍␊ [15:34:58:010] <0x1b>[0;32mI (191) esp_image: segment 3: paddr=00044034 vaddr=3ffb127c size=0183ch ( 6204) load<0x1b>[0m␍␊ [15:34:58:036] <0x1b>[0;32mI (194) esp_image: segment 4: paddr=00045878 vaddr=40080000 size=145e0h ( 83424) load<0x1b>[0m␍␊ [15:34:58:052] <0x1b>[0;32mI (231) esp_image: segment 5: paddr=00059e60 vaddr=50000000 size=00010h ( <0x9c>p 96) load<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (241) boot: Loaded app from partition at offset 0x10000<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (241) boot: Disabling RNG early entropy source...<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (253) cpu_start: Pro cpu up.<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (254) cpu_start: Starting app cpu, entry point is 0x4008114c<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (0) cpu_start: App cpu up.<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (268) cpu_start: Pro cpu start user code<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (268) cpu_start: cpu freq: 160000000<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (268) cpu_start: Application information:<0x1b>[0m␍␊ [15:34:58:102] <0x1b>[0;32mI (272) cpu_start: Project name: sd_card<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (277) cpu_start: App version: v4.4-dirty<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (282) cpu_start: Compile time: Jun 26 2022 11:57:45<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (289) cpu_start: ELF file SHA256: 8db11c4ed32915ab...<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (294) cpu_start: ESP-IDF: v4.4-dirty<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (300) heap_init: Initializing. RAM available for dynamic allocation:<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (307) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM<0x1b>[0m␍␊ [15:34:58:145] <0x1b>[0;32mI (313) heap_init: At 3FFB37E8 len 0002C818 (178 KiB): DRAM<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;32mI (319) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;32mI (326) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;32mI (332) heap_init: At 400945E0 len 0000BA20 (46 KiB): IRAM<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;32mI (340) spi_flash: detected chip: generic<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;32mI (343) spi_flash: flash io: dio<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;33mW (347) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.<0x1b>[0m␍␊ [15:34:58:188] <0x1b>[0;32mI (362) cpu_start: Starting scheduler on PRO CPU.<0x1b>[0m␍␊ [15:34:58:231] <0x1b>[0;32mI (0) cpu_start: Starting scheduler on APP CPU.<0x1b>[0m␍␊ [15:34:58:231] <0x1b>[0;32mI (373) gpio: GPIO[0]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 <0x1b>[0m␍␊ [15:34:58:231] ESP host init ok␍␊ [15:34:58:231] <0x1b>[0;32mI (383) sdspi_transaction: cmd=52, R1 response: command not supported<0x1b>[0m␍␊ [15:34:58:247] <0x1b>[0;32mI (433) sdspi_transaction: cmd=5, R1 response: command not supported<0x1b>[0m␍␊ [15:34:58:324] Name: SD01G␍␊ [15:34:58:324] Type: SDSC␍␊ [15:34:58:324] Speed: 20 MHz␍␊ [15:34:58:324] Size: 922MB␍␊ [15:34:58:324] CSD: ver=1, sector_size=512, capacity=1888256 read_bl_len=9␍␊ [15:34:58:324] SSR: bus_width=1␍␊

// If your code is longer than 30 lines, GIST is preferred. [15:19:05:260] TEST OK, index 1500␍␊ [15:19:05:260] <0x1b>[0;31mE (19473) sdmmc_cmd: sdmmc_write_sectors_dma: card status indicates an error after write operation: r2=0x00ff<0x1b>[0m␍␊ [15:19:05:313] TEST OK, index 1501␍␊ [15:19:05:313] <0x1b>[0;31mE (19483) sdmmc_cmd: sdmmc_write_sectors_dma: card status indicates an error after write operation: r2=0x00ff<0x1b>[0m␍␊ [15:19:05:313] TEST OK, index 1502␍␊ [15:19:05:313] <0x1b>[0;31mE (19503) sdmmc_cmd: sdmmc_write_sectors_dma: card status indicates an error after write operation: r2=0x00ff<0x1b>[0m␍␊ [15:19:05:313] TEST OK, index 1503␍␊ [15:19:05:452] <0x1b>[0;31mE (19623) sdmmc_cmd: sdmmc_write_sectors_dma: card status indicates an error after write operation: r2=0x00ff<0x1b>[0m␍␊ [15:19:05:452] TEST OK, index 1504␍␊ [15:19:05:452] <0x1b>[0;31mE (19633) sdmmc_cmd: sdmmc_write_sectors_dma: card status indicates an error after write operation: r2=0x00ff<0x1b>[0m␍␊ [15:19:05:452] TEST OK, index 1505␍␊ [15:19:05:452] <0x1b>[0;31mE (19643) sdmmc_cmd: sdmmc_write_sectors_dma: card status indicates an error after write operation: r2=0x00ff<0x1b>[0m␍␊ [15:19:05:452] TEST OK, index 1506␍␊

igrr commented 2 years ago

@muratdemirtas thanks for reporting the issue! Do you see this issue with every SD card, or just some specific one? If it happens with a specific SD card, do you mind writing which manufacturer and card model that is?

muratdemirtas commented 2 years ago

@igrr I just upgraded my esp-idf version from 4.4 to the master branch. In the esp-idf 4.4 version, the sdspi MMC sd card test function for read/write works without giving an error message. But I need for mmc sector erase function which is released in the master branch which is why I upgraded my esp version. I believe this is not an sd card issue.

muratdemirtas commented 2 years ago

@igrr I will perform the test asap with new sd cards. thanks.

muratdemirtas commented 2 years ago

[15:57:12:231] rst:0x1 (POWERON_RESET),boot:0x17 (SPI_FAST_FLASH_BOOT)␍␊ [15:57:12:231] configsip: 0, SPIWP:0xee␍␊ [15:57:12:231] clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00␍␊ [15:57:12:231] mode:DIO, clock div:2␍␊ [15:57:12:231] load:0x3fff0030,len:6936␍␊ [15:57:12:231] load:0x40078000,len:15356␍␊ [15:57:12:231] ho 0 tail 12 room 4␍␊ [15:57:12:231] load:0x40080400,len:3840␍␊ [15:57:12:231] entry 0x4008064c␍␊ [15:57:12:231] <0x1b>[0;32mI (29) boot: ESP-IDF v5.0-dev-3654-gc2ccc383da-dirty 2nd stage bootloader<0x1b>[0m␍␊ [15:57:12:231] <0x1b>[0;32mI (29) boot: compile time 15:56:13<0x1b>[0m␍␊ [15:57:12:231] <0x1b>[0;32mI (30) boot: chip revision: 3<0x1b>[0m␍␊ [15:57:12:231] <0x1b>[0;32mI (34) boot_comm: chip revision: 3, min. bootloader chip revision: 0<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (41) boot.esp32: SPI Speed : 40MHz<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (46) boot.esp32: SPI Mode : DIO<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (50) boot.esp32: SPI Flash Size : 2MB<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (55) boot: Enabling RNG early entropy source...<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (60) boot: Partition Table:<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (64) boot: ## Label Usage Type ST Offset Length<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (71) boot: 0 nvs WiFi data 01 02 00009000 00006000<0x1b>[0m␍␊ [15:57:12:274] <0x1b>[0;32mI (79) boot: 1 phy_init RF data 01 01 0000f000 00001000<0x1b>[0m␍␊ [15:57:12:323] <0x1b>[0;32mI (86) boot: 2 factory factory app 00 00 00010000 00100000<0x1b>[0m␍␊ [15:57:12:323] <0x1b>[0;32mI (94) boot: End of partition table<0x1b>[0m␍␊ [15:57:12:323] <0x1b>[0;32mI (98) boot_comm: chip revision: 3, min. application chip revision: 0<0x1b>[0m␍␊ [15:57:12:323] <0x1b>[0;32mI (105) esp_image: segment 0: paddr=00010020 vaddr=3f400020 size=0b87ch ( 47228) map<0x1b>[0m␍␊ [15:57:12:323] <0x1b>[0;32mI (130) esp_image: segment 1: paddr=0001b8a4 vaddr=3ffb0000 size=027b8h ( 10168) load<0x1b>[0m␍␊ [15:57:12:323] <0x1b>[0;32mI (135) esp_image: segment 2: paddr=0001e064 vaddr=40080000 size=01fb4h ( 8116) load<0x1b>[0m␍␊ [15:57:12:355] <0x1b>[0;32mI (140) esp_image: segment 3: paddr=00020020 vaddr=400d0020 size=1c868h (116840) map<0x1b>[0m␍␊ [15:57:12:392] <0x1b>[0;32mI (187) esp_image: segment 4: paddr=0003c890 vaddr=40081fb4 size=0b194h ( 45460) load<0x1b>[0m␍␊ [15:57:12:392] <0x1b>[0;32mI (206) esp_image: segment 5: paddr=00047a2c vaddr=50000000 size=00010h ( 16) load<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (213) boot: Loaded app from partition at offset 0x10000<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (213) boot: Disabling RNG early entropy source...<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (226) cpu_start: Pro cpu up.<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (226) cpu_start: Starting app cpu, entry point is 0x40081160<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (0) cpu_start: App cpu up.<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (240) cpu_start: Pro cpu start user code<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (240) cpu_start: cpu freq: 160000000 Hz<0x1b>[0m␍␊ [15:57:12:437] <0x1b>[0;32mI (240) cpu_start: Application information:<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (245) cpu_start: Project name: sd_card<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (250) cpu_start: App version: v5.0-dev-3654-gc2ccc383da-dirty<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (257) cpu_start: Compile time: Jun 27 2022 15:54:37<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (263) cpu_start: ELF file SHA256: e84b254811d613ed...<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (269) cpu_start: ESP-IDF: v5.0-dev-3654-gc2ccc383da-dirty<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (276) heap_init: Initializing. RAM available for dynamic allocation:<0x1b>[0m␍␊ [15:57:12:480] <0x1b>[0;32mI (284) heap_init: At 3FFAE6E0 len 00001920 (6 KiB): DRAM<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;32mI (290) heap_init: At 3FFB34D8 len 0002CB28 (178 KiB): DRAM<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;32mI (296) heap_init: At 3FFE0440 len 00003AE0 (14 KiB): D/IRAM<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;32mI (302) heap_init: At 3FFE4350 len 0001BCB0 (111 KiB): D/IRAM<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;32mI (309) heap_init: At 4008D148 len 00012EB8 (75 KiB): IRAM<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;32mI (316) spi_flash: detected chip: generic<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;32mI (319) spi_flash: flash io: dio<0x1b>[0m␍␊ [15:57:12:523] <0x1b>[0;33mW (323) spi_flash: Detected size(4096k) larger than the size in the binary image header(2048k). Using the size in the binary image header.<0x1b>[0m␍␊ [15:57:12:566] <0x1b>[0;32mI (337) cpu_start: Starting scheduler on PRO CPU.<0x1b>[0m␍␊ [15:57:12:566] <0x1b>[0;32mI (0) cpu_start: Starting scheduler on APP CPU.<0x1b>[0m␍␊ [15:57:12:566] <0x1b>[0;32mI (349) gpio: GPIO[0]| InputEn: 0| OutputEn: 1| OpenDrain: 0| Pullup: 0| Pulldown: 0| Intr:0 <0x1b>[0m␍␊ [15:57:12:566] ESP host init ok␍␊ [15:57:12:604] <0x1b>[0;32mI (399) sdspi_transaction: cmd=52, R1 response: command not supported<0x1b>[0m␍␊ [15:57:12:779] <0x1b>[0;32mI (599) sdspi_transaction: cmd=5, R1 response: command not supported<0x1b>[0m␍␊ [15:57:13:421] Name: SD01G␍␊ [15:57:13:421] Type: SDSC␍␊ [15:57:13:421] Speed: 20 MHz␍␊ [15:57:13:421] Size: 922MB␍␊ [15:57:13:421] CSD: ver=1, sector_size=512, capacity=1888256 read_bl_len=9␍␊ [15:57:13:421] SSR: bus_width=1␍␊ [15:57:13:540] SD Card block size 512, read len 9, capacity 1888256TEST OK, index 0␍␊ [15:57:13:652] TEST OK, index 1␍␊ [15:57:13:779] TEST OK, index 2␍␊ [15:57:13:890] TEST OK, index 3␍␊ [15:57:14:018] TEST OK, index 4␍␊ [15:57:14:145] TEST OK, index 5␍␊ [15:57:14:273] TEST OK, index 6␍␊ [15:57:14:416] TEST OK, index 7␍␊ [15:57:14:543] TEST OK, index 8␍␊ [15:57:14:671] TEST OK, index 9␍␊ [15:57:14:782] TEST OK, index 10␍␊ [15:57:14:910] TEST OK, index 11␍␊ [15:57:15:037] TEST OK, index 12␍␊ [15:57:15:165] TEST OK, index 13␍␊ [15:57:15:276] TEST OK, index 14␍␊ [15:57:15:404] TEST OK, index 15␍␊ [15:57:15:531] TEST OK, index 16␍␊ [15:57:15:658] TEST OK, index 17␍␊ [15:57:15:770] TEST OK, index 18␍␊ [15:57:15:897] TEST OK, index 19␍␊

muratdemirtas commented 2 years ago

@igrr thanks problem resolved after fresh installation of current master branch(v5.0). SD card is same. Erase sectors function works perfect.

void app_test(sdmmc_card_t *sdCard) { sdCardInstance = sdCard; for(int i = 0 ; i < 20000; i++) { memset(rx_buffer,0,512); memset(tx_buffer,0,512); for(int i = 0; i < 512; i++) rx_buffer[i] = i%255; sdmmc_erase_sectors(sdCardInstance, i,1,SDMMC_ERASE_ARG); sdmmc_write_sectors(sdCardInstance, rx_buffer,i, 1 ); sdmmc_read_sectors(sdCardInstance, tx_buffer, i, 1); if(memcmp(tx_buffer, rx_buffer, 512) == 0){ printf("TEST OK, index %d\n", i); }else printf("TEST FAIL\n"); } }

igrr commented 2 years ago

@muratdemirtas Interesting, thanks for the update!

Indeed, this error message was added recently in the master branch. The code in v4.4 release didn't check the full card status after write operation at all. So it's entirely possible that the logic for this new error message is not correct in some cases. However, so far we haven't met an SD card which exhibited this issue.

If you notice this issue again, please feel free to reopen!