espressif / esp-idf

Espressif IoT Development Framework. Official development framework for Espressif SoCs.
Apache License 2.0
13.49k stars 7.26k forks source link

SPI SRAM memory test fail (IDFGH-8103) #9603

Closed project-x51 closed 2 years ago

project-x51 commented 2 years ago

Answers checklist.

IDF version.

v4.4.2

Operating System used.

Windows

How did you build your project?

VS Code IDE

If you are using Windows, please specify command line type.

No response

Development Kit.

Custom Board using ESP32-S3-WROOM1 N8R8

Power Supply used.

USB

What is the expected behavior?

The SPI SRAM should pass the memory test which is what it was doing up until recently.

What is the actual behavior?

If I enable the SPI ram in any project then it fails startup during the memory test.

Steps to reproduce.

  1. From VSCode
  2. Create a project from the Hello_World example
  3. Build, flash and monitor the code onto my board. Has the ESP32-S3-WROOM-1 N8R8 module.
  4. Observe the code working
  5. Turn on the ESP32S3-Specific > Support for external, SPI-connected RAM
  6. Choose Octal Mode PSRAM
  7. Build, flash and monitor the code onto my board
  8. Fails during the memory test
  9. Switch to ESP32-S3-EYE development board by selecting the boards COM port
  10. Build, flash and monitor the code onto the ESP32-S3-EYE
  11. Passes the memory test.

Debug Logs.

ESP-ROM:esp32s3-20210327
Build:Mar 27 2021
rst:0xc (RTC_SW_CPU_RST),boot:0x18 (SPI_FAST_FLASH_BOOT)
Saved PC:0x40375940
0x40375940: esp_restart_noos at C:/esp/esp-idf/components/esp_system/port/soc/esp32s3/system_internal.c:143 (discriminator 1)

SPIWP:0xee
mode:DIO, clock div:1
load:0x3fce3808,len:0x17a8
load:0x403c9700,len:0xe64
load:0x403cc700,len:0x30e8
entry 0x403c9980
I (24) boot: ESP-IDF v4.4.2 2nd stage bootloader
I (24) boot: compile time 14:01:48
I (24) boot: chip revision: 0
I (26) qio_mode: Enabling default flash chip QIO
I (31) boot.esp32s3: Boot SPI Speed : 80MHz
I (36) boot.esp32s3: SPI Mode       : QIO
I (40) boot.esp32s3: SPI Flash Size : 8MB
I (45) boot: Enabling RNG early entropy source...
I (51) boot: Partition Table:
I (54) boot: ## Label            Usage          Type ST Offset   Length
I (61) boot:  0 nvs              WiFi data        01 02 00011000 00006000
I (69) boot:  1 phy_init         RF data          01 01 00017000 00001000
I (76) boot:  2 factory          factory app      00 00 00020000 00100000
I (84) boot: End of partition table
I (88) esp_image: segment 0: paddr=00020020 vaddr=3c030020 size=0c348h ( 49992) map
I (104) esp_image: segment 1: paddr=0002c370 vaddr=3fc93030 size=03c20h ( 15392) load
I (108) esp_image: segment 2: paddr=0002ff98 vaddr=40374000 size=00080h (   128) load
I (113) esp_image: segment 3: paddr=00030020 vaddr=42000020 size=23ed8h (147160) map
I (144) esp_image: segment 4: paddr=00053f00 vaddr=40374080 size=0efa4h ( 61348) load
I (156) esp_image: segment 5: paddr=00062eac vaddr=50000000 size=00010h (    16) load
I (163) boot: Loaded app from partition at offset 0x20000
I (163) boot: Disabling RNG early entropy source...
I (176) opi psram: vendor id : 0x0d (AP)
I (177) opi psram: dev id    : 0x02 (generation 3)
I (177) opi psram: density   : 0x03 (64 Mbit)
I (180) opi psram: good-die  : 0x01 (Pass)
I (185) opi psram: Latency   : 0x01 (Fixed)
I (190) opi psram: VCC       : 0x01 (3V)
I (195) opi psram: SRF       : 0x01 (Fast Refresh)
I (200) opi psram: BurstType : 0x01 (Hybrid Wrap)
I (205) opi psram: BurstLen  : 0x01 (32 Byte)
I (210) opi psram: Readlatency  : 0x02 (10 cycles@Fixed)
I (216) opi psram: DriveStrength: 0x00 (1/1)
W (221) PSRAM: DO NOT USE FOR MASS PRODUCTION! Timing parameters will be updated in future IDF version.
W (232) MSPI Timing: tuning fail, best point is fallen back to index 1
I (239) spiram: Found 64MBit SPI RAM device
I (243) spiram: SPI RAM mode: sram 80m
I (248) spiram: PSRAM initialized, cache is in normal (1-core) mode.
I (255) cpu_start: Pro cpu up.
I (259) cpu_start: Starting app cpu, entry point is 0x40375328
0x40375328: call_start_cpu1 at C:/esp/esp-idf/components/esp_system/port/cpu_start.c:160

I (247) cpu_start: App cpu up.
E (530) spiram: SPI SRAM error@3d8000a0:aaaaaa92/aaaaaa82 

E (531) spiram: SPI SRAM error@3d8001a0:aaaaaad2/aaaaaac2

E (532) spiram: SPI SRAM error@3d8002a0:aaaaaa12/aaaaaa02

E (702) spiram: SPI SRAM memory test fail. 158897/262144 writes failed, first @ 3D0000A0

E (703) cpu_start: External RAM failed memory test!

More Information.

This was working on all 3 of my custom development boards up until recently. Then started failing on all 3 at the same time.

Starting address varies from run to run but is always around aaaaeaxx

project-x51 commented 2 years ago

I found the issue. I had IO.35, 36 and 37 electrically connected, but they are reserved for SPI RAM on S3 modules with embedded PSRAM.