OpenOCD/JTAG error: Target is already running an algorithm (IDFGH-8612) (OCD-872)

vdm97 commented 2 years ago

Answers checklist.

[X] I have read the documentation ESP-IDF Programming Guide and the issue is not addressed there.
[X] I have updated my IDF branch (master or release) to the latest version and checked that the issue is present there.
[X] I have searched the issue tracker for a similar issue and not found a similar issue.

IDF version.

v4.4.2, v5.0-beta1, v5.0.2

Operating System used.

Windows

How did you build your project?

VS Code IDE

If you are using Windows, please specify command line type.

PowerShell

What is the expected behavior?

A successful flash via OpenOCD/JTAG.

What is the actual behavior?

My company uses a custom board where the ESP32-WROOM-32 with 16MB flash (ESP32) is used as a WiFi chip. For that purpose it works very well, so thank you very much for providing the chip and the good tools! We use the VS Code ESP extension in conjunction with the ESP-Prog Board (JTAG) which works (most of the time) quite good. Furthermore the ESP32 is connected to a STM32 and UART is used for communication. The STM32 can also be used as a last hope to flash the ESP32.

Now about the problem. We wanted to expand the usage of the ESP32 by adding Bluetooth Low Energy (BLE) functionality. For that we activated Bluetooth in the menuconfig and selected the NimBLE stack. This did not work with the error described below. After some searching we found this ticket with a similar error in the OpenOCD log and updated our ESP-IDF from v4.4.1 to v4.4.2 and then to v5.0-beta1 (After realising that the fix is not part of v4.4.2.). After this BLE worked fine on its own and with WiFi coexistence but the WiFi stopped working with timeout issues (SPIFFS could not be served). To fix the issue we tried different task priorities for WiFi and BLE and varying BLE window and interval settings but without success. In the end we opened the menuconfig and changed the BLE stack to Bluedroid. With this stack BLE and WiFi works in coexistence but our initial error appeared again. The OpenOCD log where the error appears is attached below.

We do not know what the real cause of the error is but it appears on ESP-IDF v4.4.1 and v4.4.2 when we activate Bluetooth and select the NimBLE or Bluedroid stack. After we switched to ESP-IDF v5.0-beta1 the error only appears when we select the Bluedroid stack but does not appear when we select the NimBLE stack (We are ignoring the NimBLE/WiFi coexistence error/misconfiguration? here.). To fit a BLE stack on the ESP we had to deactivate all three WiFi IRAM optimizations, so maybe this plays a role in the error. Furthermore the IRAM and DRAM of the ESP32 is quite full so maybe this plays also a role.

Interestingly the ESP32 can always be flashed with the same binary (BLE enabled with Bluedroid stack) when the STM32 is used for serial flashing and the code is working fine if we look at the monitor and connect via WiFi/BLE but the same binary can only be be flashed the first time when OpenOCD/JTAG is used for flashing. On the second flashing the error in OpenOCD/JTAG appears, so BLE/Bluedroid code has to be present on the ESP32 for the error to appear.

All help is appreciated and we are happy to provide more information if needed.

Steps to reproduce.

I cannot provide our closed source firmware of the ESP32 and building an example is not easy because we have a lot of parts and i am not really sure where the error is coming from. I will take the time to do that if it will not be possible to get help otherwise.

Build or installation Logs.

Image size

``` Total sizes: Used static DRAM: 90236 bytes ( 34344 remain, 72.4% used) .data size: 23316 bytes .bss size: 66920 bytes Used static IRAM: 121086 bytes ( 9986 remain, 92.4% used) .text size: 120059 bytes .vectors size: 1027 bytes Used Flash size : 1407143 bytes .text : 1126587 bytes .rodata : 280300 bytes Total image size: 1551545 bytes (.bin may be padded larger) ```

OpenOCD (The VS Code extension is responsible for the strange formatting...)

``` [OpenOCD] Open On-Chip Debugger v0.11.0-esp32-20220706 (2022-07-06-15:48) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html [OpenOCD] debug_level: 2 [OpenOCD] adapter speed: 20000 kHz [OpenOCD] Info : Listening on port 6666 for tcl connections [OpenOCD] Info : Listening on port 4444 for telnet connections [OpenOCD] Info : ftdi: if[OpenOCD] you experience problems at higher adapter clocks, try the command "ftdi tdo_sample_edge falling" Info : clock speed 20000 kHz [OpenOCD] Info : JT[OpenOCD] AG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) [OpenOCD] Info : [esp32.cpu0] [OpenOCD] Target halted, PC=0x40000400, debug_reason=00000000 [OpenOCD] Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [OpenOCD] Info : start[OpenOCD] ing gdb server for esp32.cpu0 on 3333 Info : Listening on port 3333 for gdb connections [OpenOCD] Info : accepting 'tcl' connection on tcp/6666 Info : dropped 'tcl' connection [OpenOCD] Info : accepting 'tcl' connection on tcp/6666 [OpenOCD] Flashing c:/svn/P[OpenOCD] _ARM_xx/ESP32/build/bootloader/bootloader.bin at 0x1000 [OpenOCD] Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e[OpenOCD] 5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) [OpenOCD] Info : [esp32.cpu0] requesting target halt and executing a soft reset [OpenOCD] Info : [esp32.cpu0] Deb[OpenOCD] ug controller was reset. [OpenOCD] Info : [esp3[OpenOCD] 2.cpu0] Core was reset. [OpenOCD] Info : [esp32.cpu0] Targ[OpenOCD] et halted, PC=0x500000CF, debug_reason=00000000 [OpenOCD] Info : Set GDB target to 'es[OpenOCD] p32.cpu0' [OpenOCD] Info : [esp32.cpu1] [OpenOCD] requesting target halt and executing a soft reset [OpenOCD] Info : [esp32.cpu0] Core was reset. [OpenOCD] Info : [esp32.cpu0] Target[OpenOCD] halted, PC=0x40000400, debug_reason=00000000 [OpenOCD] Info : [[OpenOCD] esp32.cpu1] Debug controller was reset. [OpenOCD] Info : [es[OpenOCD] p32.cpu1] Core was reset. [OpenOCD] Info : [es[OpenOCD] p32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [OpenOCD] Info : [esp32.cpu[OpenOCD] 0] Target halted, PC=0x40092612, debug_reason=00000001 [OpenOCD] Info : Flash mapping 0: 0x10020 -> 0x3f400020, 266 [OpenOCD] KB Info : Flash mapping 1: 0x60020 -> 0x400d0020, 1105 KB [OpenOCD] Info : [esp3[OpenOCD] 2.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [OpenOCD] Info : Auto-[OpenOCD] detected flash bank 'esp32.cpu0.flash' size 16384 KB Info : Using flash bank 'esp32.cpu0.flash' size 16384 KB [OpenOCD] Info : [esp3[OpenOCD] 2.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [OpenOCD] Info : Flash mapping 0: 0x10020 -> 0x3f40002[OpenOCD] 0, 266 KB Info : Flash mapping 1: 0x60020 -> 0x400d0020, 1105 KB [OpenOCD] Info : [esp32.cpu[OpenOCD] 0] Target halted, PC=0x40092612, debug_reason=00000001 [OpenOCD] Info : Auto-detected flash bank 'esp32.cpu1.flash' size 16384 KB Info : Using[OpenOCD] flash bank 'esp32.cpu1.flash' size 16384 KB [OpenOCD] ** Progr[OpenOCD] amming Started ** [OpenOCD] ❌ Error: timed out [OpenOCD] while waiting for target halted [OpenOCD] Info : [esp32.cpu0] Target halted, PC[OpenOCD] =0x40082343, debug_reason=00000000 [OpenOCD] ❌ Error: xtensa_wait_algorithm: not halted [OpenOCD] ❌ 0, pc 0x40082343, ps 0x60423 Error: Failed to wait algorithm (-302)! Error: Algorithm run failed (-302)! [OpenOCD] ❌ Error: Ta[OpenOCD] ❌ rget is already running an algorithm Error: Failed to start algorithm (-4)! [OpenOCD] Info : PROF: Erased [OpenOCD] 28672 bytes in 66.962 ms [OpenOCD] Err[OpenOCD] ❌ or: Target is already running an algorithm Error: Failed to start algorithm (-4)! [OpenOCD] Info : PROF: Wrote 286[OpenOCD] 72 bytes in 73.221 ms (data transfer time included) [OpenOCD] ** Program[OpenOCD] ming Finished in 40669 ms ** [OpenOCD] ** Verify[OpenOCD] Started ** [OpenOCD] ❌ Error: Target [OpenOCD] ❌ is already running an algorithm Error: Failed to start algorithm (-4)! [OpenOCD] Info : PROF: Flash verified in 70[OpenOCD] ❌ .972 ms Error: **** Verification failure! **** Error: target_hash 000...000 Error: file_hash: 0d6ef...722da1 [OpenOCD] ** Flashing[OpenOCD] Failed ** -1 ```

More Information.

No response

vdm97 commented 2 years ago

Body was too long...

sdkconfig

``` # # Automatically generated file. DO NOT EDIT. # Espressif IoT Development Framework (ESP-IDF) Project Configuration # CONFIG_SOC_BROWNOUT_RESET_SUPPORTED="Not determined" CONFIG_SOC_TWAI_BRP_DIV_SUPPORTED="Not determined" CONFIG_SOC_DPORT_WORKAROUND="Not determined" CONFIG_SOC_CAPS_ECO_VER_MAX=3 CONFIG_SOC_ADC_SUPPORTED=y CONFIG_SOC_DAC_SUPPORTED=y CONFIG_SOC_MCPWM_SUPPORTED=y CONFIG_SOC_SDMMC_HOST_SUPPORTED=y CONFIG_SOC_BT_SUPPORTED=y CONFIG_SOC_CLASSIC_BT_SUPPORTED=y CONFIG_SOC_PCNT_SUPPORTED=y CONFIG_SOC_WIFI_SUPPORTED=y CONFIG_SOC_SDIO_SLAVE_SUPPORTED=y CONFIG_SOC_TWAI_SUPPORTED=y CONFIG_SOC_EMAC_SUPPORTED=y CONFIG_SOC_ULP_SUPPORTED=y CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y CONFIG_SOC_RTC_MEM_SUPPORTED=y CONFIG_SOC_I2S_SUPPORTED=y CONFIG_SOC_RMT_SUPPORTED=y CONFIG_SOC_SDM_SUPPORTED=y CONFIG_SOC_SUPPORT_COEXISTENCE=y CONFIG_SOC_AES_SUPPORTED=y CONFIG_SOC_MPI_SUPPORTED=y CONFIG_SOC_SHA_SUPPORTED=y CONFIG_SOC_FLASH_ENC_SUPPORTED=y CONFIG_SOC_SECURE_BOOT_SUPPORTED=y CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y CONFIG_SOC_DPORT_WORKAROUND_DIS_INTERRUPT_LVL=5 CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y CONFIG_SOC_ADC_DMA_SUPPORTED=y CONFIG_SOC_ADC_PERIPH_NUM=2 CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10 CONFIG_SOC_ADC_ATTEN_NUM=4 CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 CONFIG_SOC_ADC_PATT_LEN_MAX=16 CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=9 CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 CONFIG_SOC_ADC_DIGI_RESULT_BYTES=2 CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=2 CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=20 CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=9 CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 CONFIG_SOC_RTC_SLOW_CLOCK_SUPPORT_8MD256=y CONFIG_SOC_SHARED_IDCACHE_SUPPORTED=y CONFIG_SOC_CPU_CORES_NUM=2 CONFIG_SOC_CPU_INTR_NUM=32 CONFIG_SOC_CPU_HAS_FPU=y CONFIG_SOC_CPU_BREAKPOINTS_NUM=2 CONFIG_SOC_CPU_WATCHPOINTS_NUM=2 CONFIG_SOC_CPU_WATCHPOINT_SIZE=64 CONFIG_SOC_DAC_PERIPH_NUM=2 CONFIG_SOC_DAC_RESOLUTION=8 CONFIG_SOC_GPIO_PORT=1 CONFIG_SOC_GPIO_PIN_COUNT=40 CONFIG_SOC_GPIO_VALID_GPIO_MASK=0xFFFFFFFFFF CONFIG_SOC_GPIO_SUPPORT_SLP_SWITCH=y CONFIG_SOC_I2C_NUM=2 CONFIG_SOC_I2C_FIFO_LEN=32 CONFIG_SOC_I2C_SUPPORT_SLAVE=y CONFIG_SOC_I2C_SUPPORT_APB=y CONFIG_SOC_CLK_APLL_SUPPORTED=y CONFIG_SOC_APLL_MULTIPLIER_OUT_MIN_HZ=350000000 CONFIG_SOC_APLL_MULTIPLIER_OUT_MAX_HZ=500000000 CONFIG_SOC_APLL_MIN_HZ=5303031 CONFIG_SOC_APLL_MAX_HZ=125000000 CONFIG_SOC_I2S_NUM=2 CONFIG_SOC_I2S_HW_VERSION_1=y CONFIG_SOC_I2S_SUPPORTS_APLL=y CONFIG_SOC_I2S_SUPPORTS_PDM=y CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y CONFIG_SOC_I2S_SUPPORTS_ADC_DAC=y CONFIG_SOC_I2S_SUPPORTS_ADC=y CONFIG_SOC_I2S_SUPPORTS_DAC=y CONFIG_SOC_I2S_SUPPORTS_LCD_CAMERA=y CONFIG_SOC_I2S_TRANS_SIZE_ALIGN_WORD=y CONFIG_SOC_I2S_LCD_I80_VARIANT=y CONFIG_SOC_LCD_I80_SUPPORTED=y CONFIG_SOC_LCD_I80_BUSES=2 CONFIG_SOC_LCD_I80_BUS_WIDTH=24 CONFIG_SOC_LEDC_HAS_TIMER_SPECIFIC_MUX=y CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y CONFIG_SOC_LEDC_SUPPORT_REF_TICK=y CONFIG_SOC_LEDC_SUPPORT_HS_MODE=y CONFIG_SOC_LEDC_CHANNEL_NUM=8 CONFIG_SOC_LEDC_TIMER_BIT_WIDE_NUM=20 CONFIG_SOC_MCPWM_GROUPS=2 CONFIG_SOC_MCPWM_TIMERS_PER_GROUP=3 CONFIG_SOC_MCPWM_OPERATORS_PER_GROUP=3 CONFIG_SOC_MCPWM_COMPARATORS_PER_OPERATOR=2 CONFIG_SOC_MCPWM_GENERATORS_PER_OPERATOR=2 CONFIG_SOC_MCPWM_TRIGGERS_PER_OPERATOR=2 CONFIG_SOC_MCPWM_GPIO_FAULTS_PER_GROUP=3 CONFIG_SOC_MCPWM_CAPTURE_TIMERS_PER_GROUP=y CONFIG_SOC_MCPWM_CAPTURE_CHANNELS_PER_TIMER=3 CONFIG_SOC_MCPWM_GPIO_SYNCHROS_PER_GROUP=3 CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 CONFIG_SOC_PCNT_GROUPS=1 CONFIG_SOC_PCNT_UNITS_PER_GROUP=8 CONFIG_SOC_PCNT_CHANNELS_PER_UNIT=2 CONFIG_SOC_PCNT_THRES_POINT_PER_UNIT=2 CONFIG_SOC_RMT_GROUPS=1 CONFIG_SOC_RMT_TX_CANDIDATES_PER_GROUP=8 CONFIG_SOC_RMT_RX_CANDIDATES_PER_GROUP=8 CONFIG_SOC_RMT_CHANNELS_PER_GROUP=8 CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=64 CONFIG_SOC_RMT_SUPPORT_REF_TICK=y CONFIG_SOC_RMT_SUPPORT_APB=y CONFIG_SOC_RMT_CHANNEL_CLK_INDEPENDENT=y CONFIG_SOC_RTCIO_PIN_COUNT=18 CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y CONFIG_SOC_SDM_GROUPS=1 CONFIG_SOC_SDM_CHANNELS_PER_GROUP=8 CONFIG_SOC_SPI_HD_BOTH_INOUT_SUPPORTED=y CONFIG_SOC_SPI_AS_CS_SUPPORTED=y CONFIG_SOC_SPI_PERIPH_NUM=3 CONFIG_SOC_SPI_DMA_CHAN_NUM=2 CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 CONFIG_SOC_SPI_MAX_PRE_DIVIDER=8192 CONFIG_SOC_MEMSPI_SRC_FREQ_80M_SUPPORTED=y CONFIG_SOC_MEMSPI_SRC_FREQ_40M_SUPPORTED=y CONFIG_SOC_MEMSPI_SRC_FREQ_26M_SUPPORTED=y CONFIG_SOC_MEMSPI_SRC_FREQ_20M_SUPPORTED=y CONFIG_SOC_TIMER_GROUPS=2 CONFIG_SOC_TIMER_GROUP_TIMERS_PER_GROUP=2 CONFIG_SOC_TIMER_GROUP_COUNTER_BIT_WIDTH=64 CONFIG_SOC_TIMER_GROUP_TOTAL_TIMERS=4 CONFIG_SOC_TIMER_GROUP_SUPPORT_APB=y CONFIG_SOC_TOUCH_VERSION_1=y CONFIG_SOC_TOUCH_SENSOR_NUM=10 CONFIG_SOC_TOUCH_PAD_MEASURE_WAIT_MAX=0xFF CONFIG_SOC_TWAI_BRP_MIN=2 CONFIG_SOC_TWAI_SUPPORT_MULTI_ADDRESS_LAYOUT=y CONFIG_SOC_UART_NUM=3 CONFIG_SOC_UART_SUPPORT_REF_TICK=y CONFIG_SOC_UART_FIFO_LEN=128 CONFIG_SOC_UART_BITRATE_MAX=5000000 CONFIG_SOC_SPIRAM_SUPPORTED=y CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y CONFIG_SOC_SHA_SUPPORT_PARALLEL_ENG=y CONFIG_SOC_SHA_SUPPORT_SHA1=y CONFIG_SOC_SHA_SUPPORT_SHA256=y CONFIG_SOC_SHA_SUPPORT_SHA384=y CONFIG_SOC_SHA_SUPPORT_SHA512=y CONFIG_SOC_RSA_MAX_BIT_LEN=4096 CONFIG_SOC_AES_SUPPORT_AES_128=y CONFIG_SOC_AES_SUPPORT_AES_192=y CONFIG_SOC_AES_SUPPORT_AES_256=y CONFIG_SOC_SECURE_BOOT_V1=y CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=y CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=32 CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y CONFIG_SOC_PM_SUPPORT_RTC_FAST_MEM_PD=y CONFIG_SOC_PM_SUPPORT_RTC_SLOW_MEM_PD=y CONFIG_SOC_SDMMC_USE_IOMUX=y CONFIG_SOC_SDMMC_NUM_SLOTS=2 CONFIG_SOC_BLE_DONT_UPDATE_OWN_RPA=y CONFIG_SOC_WIFI_WAPI_SUPPORT=y CONFIG_SOC_WIFI_CSI_SUPPORT=y CONFIG_SOC_WIFI_MESH_SUPPORT=y CONFIG_IDF_CMAKE=y CONFIG_IDF_TARGET_ARCH_XTENSA=y CONFIG_IDF_TARGET_ARCH="xtensa" CONFIG_IDF_TARGET="esp32" CONFIG_IDF_TARGET_ESP32=y CONFIG_IDF_FIRMWARE_CHIP_ID=0x0000 # # Build type # CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y # CONFIG_APP_BUILD_TYPE_ELF_RAM is not set CONFIG_APP_BUILD_GENERATE_BINARIES=y CONFIG_APP_BUILD_BOOTLOADER=y CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y # CONFIG_APP_REPRODUCIBLE_BUILD is not set # CONFIG_APP_NO_BLOBS is not set # CONFIG_APP_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_APP_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set # end of Build type # # Application manager # CONFIG_APP_COMPILE_TIME_DATE=y # CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set # CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set # CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set CONFIG_APP_RETRIEVE_LEN_ELF_SHA=16 # end of Application manager # # Bootloader config # CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x1000 CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set # CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set # CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set # CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y # CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set # CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set CONFIG_BOOTLOADER_LOG_LEVEL=3 # CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_8V is not set CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y # CONFIG_BOOTLOADER_FACTORY_RESET is not set # CONFIG_BOOTLOADER_APP_TEST is not set CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y CONFIG_BOOTLOADER_WDT_ENABLE=y # CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set CONFIG_BOOTLOADER_WDT_TIME_MS=9000 # CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set # CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set # CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set # CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 # CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y # end of Bootloader config # # Security features # CONFIG_SECURE_BOOT_V1_SUPPORTED=y # CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set # CONFIG_SECURE_BOOT is not set # CONFIG_SECURE_FLASH_ENC_ENABLED is not set # end of Security features CONFIG_ESP_ROM_HAS_CRC_LE=y CONFIG_ESP_ROM_HAS_CRC_BE=y CONFIG_ESP_ROM_HAS_JPEG_DECODE=y CONFIG_ESP_ROM_SUPPORT_MULTIPLE_UART=y # # Serial flasher config # # CONFIG_ESPTOOLPY_NO_STUB is not set # CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set # CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set CONFIG_ESPTOOLPY_FLASHMODE_DIO=y # CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y CONFIG_ESPTOOLPY_FLASHMODE="dio" # CONFIG_ESPTOOLPY_FLASHFREQ_80M is not set CONFIG_ESPTOOLPY_FLASHFREQ_40M=y # CONFIG_ESPTOOLPY_FLASHFREQ_26M is not set # CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set CONFIG_ESPTOOLPY_FLASHFREQ="40m" # CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_4MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set CONFIG_ESPTOOLPY_FLASHSIZE_16MB=y # CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set # CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set CONFIG_ESPTOOLPY_FLASHSIZE="16MB" # CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set CONFIG_ESPTOOLPY_BEFORE_RESET=y # CONFIG_ESPTOOLPY_BEFORE_NORESET is not set CONFIG_ESPTOOLPY_BEFORE="default_reset" CONFIG_ESPTOOLPY_AFTER_RESET=y # CONFIG_ESPTOOLPY_AFTER_NORESET is not set CONFIG_ESPTOOLPY_AFTER="hard_reset" CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 # end of Serial flasher config # # Partition Table # # CONFIG_PARTITION_TABLE_SINGLE_APP is not set # CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set # CONFIG_PARTITION_TABLE_TWO_OTA is not set CONFIG_PARTITION_TABLE_CUSTOM=y CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" CONFIG_PARTITION_TABLE_FILENAME="partitions.csv" CONFIG_PARTITION_TABLE_OFFSET=0x8000 CONFIG_PARTITION_TABLE_MD5=y # end of Partition Table # # Compiler options # CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y # CONFIG_COMPILER_OPTIMIZATION_SIZE is not set # CONFIG_COMPILER_OPTIMIZATION_PERF is not set # CONFIG_COMPILER_OPTIMIZATION_NONE is not set CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set # CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 # CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set CONFIG_COMPILER_HIDE_PATHS_MACROS=y # CONFIG_COMPILER_CXX_EXCEPTIONS is not set # CONFIG_COMPILER_CXX_RTTI is not set CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y # CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set # CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set # CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set # CONFIG_COMPILER_WARN_WRITE_STRINGS is not set # CONFIG_COMPILER_DUMP_RTL_FILES is not set # end of Compiler options # # Component config # # # Application Level Tracing # # CONFIG_APPTRACE_DEST_JTAG is not set CONFIG_APPTRACE_DEST_NONE=y # CONFIG_APPTRACE_DEST_UART0 is not set # CONFIG_APPTRACE_DEST_UART2 is not set CONFIG_APPTRACE_DEST_UART_NONE=y CONFIG_APPTRACE_UART_TASK_PRIO=1 CONFIG_APPTRACE_LOCK_ENABLE=y # end of Application Level Tracing # # Bluetooth # CONFIG_BT_ENABLED=y CONFIG_BT_BLUEDROID_ENABLED=y # CONFIG_BT_NIMBLE_ENABLED is not set # CONFIG_BT_CONTROLLER_ONLY is not set CONFIG_BT_CONTROLLER_ENABLED=y # CONFIG_BT_CONTROLLER_DISABLED is not set # # Bluedroid Options # CONFIG_BT_BTC_TASK_STACK_SIZE=3072 CONFIG_BT_BLUEDROID_PINNED_TO_CORE_0=y # CONFIG_BT_BLUEDROID_PINNED_TO_CORE_1 is not set CONFIG_BT_BLUEDROID_PINNED_TO_CORE=0 CONFIG_BT_BTU_TASK_STACK_SIZE=4096 # CONFIG_BT_BLUEDROID_MEM_DEBUG is not set # CONFIG_BT_CLASSIC_ENABLED is not set CONFIG_BT_BLE_ENABLED=y CONFIG_BT_GATTS_ENABLE=y # CONFIG_BT_GATTS_PPCP_CHAR_GAP is not set # CONFIG_BT_BLE_BLUFI_ENABLE is not set CONFIG_BT_GATT_MAX_SR_PROFILES=8 # CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_AUTO=y CONFIG_BT_GATTS_SEND_SERVICE_CHANGE_MODE=0 CONFIG_BT_GATTC_ENABLE=y # CONFIG_BT_GATTC_CACHE_NVS_FLASH is not set CONFIG_BT_GATTC_CONNECT_RETRY_COUNT=3 CONFIG_BT_BLE_SMP_ENABLE=y # CONFIG_BT_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set # CONFIG_BT_STACK_NO_LOG is not set # # BT DEBUG LOG LEVEL # # CONFIG_BT_LOG_HCI_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_HCI_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_HCI_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_HCI_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_HCI_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_HCI_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_HCI_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_HCI_TRACE_LEVEL=2 # CONFIG_BT_LOG_BTM_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_BTM_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_BTM_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_BTM_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_BTM_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_BTM_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_BTM_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_BTM_TRACE_LEVEL=2 # CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_L2CAP_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_L2CAP_TRACE_LEVEL=2 # CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_RFCOMM_TRACE_LEVEL=2 # CONFIG_BT_LOG_SDP_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_SDP_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_SDP_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_SDP_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_SDP_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_SDP_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_SDP_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_SDP_TRACE_LEVEL=2 # CONFIG_BT_LOG_GAP_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_GAP_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_GAP_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_GAP_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_GAP_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_GAP_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_GAP_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_GAP_TRACE_LEVEL=2 # CONFIG_BT_LOG_BNEP_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_BNEP_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_BNEP_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_BNEP_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_BNEP_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_BNEP_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_BNEP_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_BNEP_TRACE_LEVEL=2 # CONFIG_BT_LOG_PAN_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_PAN_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_PAN_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_PAN_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_PAN_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_PAN_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_PAN_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_PAN_TRACE_LEVEL=2 # CONFIG_BT_LOG_A2D_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_A2D_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_A2D_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_A2D_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_A2D_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_A2D_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_A2D_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_A2D_TRACE_LEVEL=2 # CONFIG_BT_LOG_AVDT_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_AVDT_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_AVDT_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_AVDT_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_AVDT_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_AVDT_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_AVDT_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_AVDT_TRACE_LEVEL=2 # CONFIG_BT_LOG_AVCT_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_AVCT_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_AVCT_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_AVCT_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_AVCT_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_AVCT_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_AVCT_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_AVCT_TRACE_LEVEL=2 # CONFIG_BT_LOG_AVRC_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_AVRC_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_AVRC_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_AVRC_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_AVRC_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_AVRC_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_AVRC_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_AVRC_TRACE_LEVEL=2 # CONFIG_BT_LOG_MCA_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_MCA_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_MCA_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_MCA_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_MCA_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_MCA_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_MCA_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_MCA_TRACE_LEVEL=2 # CONFIG_BT_LOG_HID_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_HID_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_HID_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_HID_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_HID_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_HID_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_HID_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_HID_TRACE_LEVEL=2 # CONFIG_BT_LOG_APPL_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_APPL_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_APPL_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_APPL_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_APPL_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_APPL_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_APPL_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_APPL_TRACE_LEVEL=2 # CONFIG_BT_LOG_GATT_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_GATT_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_GATT_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_GATT_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_GATT_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_GATT_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_GATT_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_GATT_TRACE_LEVEL=2 # CONFIG_BT_LOG_SMP_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_SMP_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_SMP_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_SMP_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_SMP_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_SMP_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_SMP_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_SMP_TRACE_LEVEL=2 # CONFIG_BT_LOG_BTIF_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_BTIF_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_BTIF_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_BTIF_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_BTIF_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_BTIF_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_BTIF_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_BTIF_TRACE_LEVEL=2 # CONFIG_BT_LOG_BTC_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_BTC_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_BTC_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_BTC_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_BTC_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_BTC_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_BTC_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_BTC_TRACE_LEVEL=2 # CONFIG_BT_LOG_OSI_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_OSI_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_OSI_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_OSI_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_OSI_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_OSI_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_OSI_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_OSI_TRACE_LEVEL=2 # CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_NONE is not set # CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_ERROR is not set CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_WARNING=y # CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_API is not set # CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_EVENT is not set # CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_DEBUG is not set # CONFIG_BT_LOG_BLUFI_TRACE_LEVEL_VERBOSE is not set CONFIG_BT_LOG_BLUFI_TRACE_LEVEL=2 # end of BT DEBUG LOG LEVEL CONFIG_BT_ACL_CONNECTIONS=4 CONFIG_BT_MULTI_CONNECTION_ENBALE=y # CONFIG_BT_ALLOCATION_FROM_SPIRAM_FIRST is not set # CONFIG_BT_BLE_DYNAMIC_ENV_MEMORY is not set # CONFIG_BT_BLE_HOST_QUEUE_CONG_CHECK is not set CONFIG_BT_SMP_ENABLE=y # CONFIG_BT_BLE_ACT_SCAN_REP_ADV_SCAN is not set CONFIG_BT_BLE_ESTAB_LINK_CONN_TOUT=30 CONFIG_BT_MAX_DEVICE_NAME_LEN=32 # CONFIG_BT_BLE_RPA_SUPPORTED is not set # end of Bluedroid Options # # Controller Options # CONFIG_BTDM_CTRL_MODE_BLE_ONLY=y # CONFIG_BTDM_CTRL_MODE_BR_EDR_ONLY is not set # CONFIG_BTDM_CTRL_MODE_BTDM is not set CONFIG_BTDM_CTRL_BLE_MAX_CONN=3 CONFIG_BTDM_CTRL_BR_EDR_SCO_DATA_PATH_EFF=0 CONFIG_BTDM_CTRL_PCM_ROLE_EFF=0 CONFIG_BTDM_CTRL_PCM_POLAR_EFF=0 CONFIG_BTDM_CTRL_BLE_MAX_CONN_EFF=3 CONFIG_BTDM_CTRL_BR_EDR_MAX_ACL_CONN_EFF=0 CONFIG_BTDM_CTRL_BR_EDR_MAX_SYNC_CONN_EFF=0 CONFIG_BTDM_CTRL_PINNED_TO_CORE_0=y # CONFIG_BTDM_CTRL_PINNED_TO_CORE_1 is not set CONFIG_BTDM_CTRL_PINNED_TO_CORE=0 CONFIG_BTDM_CTRL_HCI_MODE_VHCI=y # CONFIG_BTDM_CTRL_HCI_MODE_UART_H4 is not set # # MODEM SLEEP Options # CONFIG_BTDM_CTRL_MODEM_SLEEP=y CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_ORIG=y # CONFIG_BTDM_CTRL_MODEM_SLEEP_MODE_EVED is not set CONFIG_BTDM_CTRL_LPCLK_SEL_MAIN_XTAL=y # end of MODEM SLEEP Options CONFIG_BTDM_BLE_DEFAULT_SCA_250PPM=y CONFIG_BTDM_BLE_SLEEP_CLOCK_ACCURACY_INDEX_EFF=1 CONFIG_BTDM_BLE_SCAN_DUPL=y CONFIG_BTDM_SCAN_DUPL_TYPE_DEVICE=y # CONFIG_BTDM_SCAN_DUPL_TYPE_DATA is not set # CONFIG_BTDM_SCAN_DUPL_TYPE_DATA_DEVICE is not set CONFIG_BTDM_SCAN_DUPL_TYPE=0 CONFIG_BTDM_SCAN_DUPL_CACHE_SIZE=100 # CONFIG_BTDM_BLE_MESH_SCAN_DUPL_EN is not set CONFIG_BTDM_CTRL_FULL_SCAN_SUPPORTED=y CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_SUPP=y CONFIG_BTDM_BLE_ADV_REPORT_FLOW_CTRL_NUM=100 CONFIG_BTDM_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 CONFIG_BTDM_RESERVE_DRAM=0xdb5c CONFIG_BTDM_CTRL_HLI=y # end of Controller Options # end of Bluetooth # CONFIG_BLE_MESH is not set # # Driver Configurations # # # Legacy ADC Configuration # CONFIG_ADC_DISABLE_DAC=y # CONFIG_ADC_SUPPRESS_DEPRECATE_WARN is not set # # Legacy ADC Calibration Configuration # CONFIG_ADC_CAL_EFUSE_TP_ENABLE=y CONFIG_ADC_CAL_EFUSE_VREF_ENABLE=y CONFIG_ADC_CAL_LUT_ENABLE=y # CONFIG_ADC_CALI_SUPPRESS_DEPRECATE_WARN is not set # end of Legacy ADC Calibration Configuration # end of Legacy ADC Configuration # # SPI Configuration # # CONFIG_SPI_MASTER_IN_IRAM is not set CONFIG_SPI_MASTER_ISR_IN_IRAM=y # CONFIG_SPI_SLAVE_IN_IRAM is not set CONFIG_SPI_SLAVE_ISR_IN_IRAM=y # end of SPI Configuration # # TWAI Configuration # # CONFIG_TWAI_ISR_IN_IRAM is not set # CONFIG_TWAI_ERRATA_FIX_BUS_OFF_REC is not set # CONFIG_TWAI_ERRATA_FIX_TX_INTR_LOST is not set # CONFIG_TWAI_ERRATA_FIX_RX_FRAME_INVALID is not set # CONFIG_TWAI_ERRATA_FIX_RX_FIFO_CORRUPT is not set # end of TWAI Configuration # # UART Configuration # CONFIG_UART_ISR_IN_IRAM=y # end of UART Configuration # # GPIO Configuration # # CONFIG_GPIO_ESP32_SUPPORT_SWITCH_SLP_PULL is not set # CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set # end of GPIO Configuration # # Sigma Delta Modulator Configuration # # CONFIG_SDM_CTRL_FUNC_IN_IRAM is not set # CONFIG_SDM_SUPPRESS_DEPRECATE_WARN is not set # CONFIG_SDM_ENABLE_DEBUG_LOG is not set # end of Sigma Delta Modulator Configuration # # GPTimer Configuration # # CONFIG_GPTIMER_CTRL_FUNC_IN_IRAM is not set # CONFIG_GPTIMER_ISR_IRAM_SAFE is not set # CONFIG_GPTIMER_SUPPRESS_DEPRECATE_WARN is not set # CONFIG_GPTIMER_ENABLE_DEBUG_LOG is not set # end of GPTimer Configuration # # PCNT Configuration # # CONFIG_PCNT_CTRL_FUNC_IN_IRAM is not set # CONFIG_PCNT_ISR_IRAM_SAFE is not set # CONFIG_PCNT_SUPPRESS_DEPRECATE_WARN is not set # CONFIG_PCNT_ENABLE_DEBUG_LOG is not set # end of PCNT Configuration # # RMT Configuration # # CONFIG_RMT_ISR_IRAM_SAFE is not set # CONFIG_RMT_SUPPRESS_DEPRECATE_WARN is not set # CONFIG_RMT_ENABLE_DEBUG_LOG is not set # end of RMT Configuration # # MCPWM Configuration # # CONFIG_MCPWM_ISR_IRAM_SAFE is not set # CONFIG_MCPWM_SUPPRESS_DEPRECATE_WARN is not set # CONFIG_MCPWM_ENABLE_DEBUG_LOG is not set # end of MCPWM Configuration # # I2S Configuration # # CONFIG_I2S_ISR_IRAM_SAFE is not set # CONFIG_I2S_SUPPRESS_DEPRECATE_WARN is not set # CONFIG_I2S_ENABLE_DEBUG_LOG is not set # end of I2S Configuration # end of Driver Configurations # # eFuse Bit Manager # # CONFIG_EFUSE_CUSTOM_TABLE is not set # CONFIG_EFUSE_VIRTUAL is not set # CONFIG_EFUSE_CODE_SCHEME_COMPAT_NONE is not set CONFIG_EFUSE_CODE_SCHEME_COMPAT_3_4=y # CONFIG_EFUSE_CODE_SCHEME_COMPAT_REPEAT is not set CONFIG_EFUSE_MAX_BLK_LEN=192 # end of eFuse Bit Manager # # ESP-TLS # CONFIG_ESP_TLS_USING_MBEDTLS=y # CONFIG_ESP_TLS_USE_SECURE_ELEMENT is not set # CONFIG_ESP_TLS_CLIENT_SESSION_TICKETS is not set # CONFIG_ESP_TLS_SERVER is not set # CONFIG_ESP_TLS_PSK_VERIFICATION is not set # CONFIG_ESP_TLS_INSECURE is not set # end of ESP-TLS # # ADC and ADC Calibration # # CONFIG_ADC_ONESHOT_CTRL_FUNC_IN_IRAM is not set # CONFIG_ADC_CONTINUOUS_ISR_IRAM_SAFE is not set # # ADC Calibration Configurations # CONFIG_ADC_CALI_EFUSE_TP_ENABLE=y CONFIG_ADC_CALI_EFUSE_VREF_ENABLE=y CONFIG_ADC_CALI_LUT_ENABLE=y # end of ADC Calibration Configurations # end of ADC and ADC Calibration # # Common ESP-related # CONFIG_ESP_ERR_TO_NAME_LOOKUP=y # end of Common ESP-related # # Ethernet # CONFIG_ETH_ENABLED=y CONFIG_ETH_USE_ESP32_EMAC=y CONFIG_ETH_PHY_INTERFACE_RMII=y # CONFIG_ETH_RMII_CLK_INPUT is not set CONFIG_ETH_RMII_CLK_OUTPUT=y # CONFIG_ETH_RMII_CLK_OUTPUT_GPIO0 is not set CONFIG_ETH_RMII_CLK_OUT_GPIO=17 CONFIG_ETH_DMA_BUFFER_SIZE=512 CONFIG_ETH_DMA_RX_BUFFER_NUM=10 CONFIG_ETH_DMA_TX_BUFFER_NUM=10 # CONFIG_ETH_USE_SPI_ETHERNET is not set # CONFIG_ETH_USE_OPENETH is not set # CONFIG_ETH_TRANSMIT_MUTEX is not set # end of Ethernet # # Event Loop Library # # CONFIG_ESP_EVENT_LOOP_PROFILING is not set CONFIG_ESP_EVENT_POST_FROM_ISR=y CONFIG_ESP_EVENT_POST_FROM_IRAM_ISR=y # end of Event Loop Library # # GDB Stub # # end of GDB Stub # # ESP HTTP client # CONFIG_ESP_HTTP_CLIENT_ENABLE_HTTPS=y # CONFIG_ESP_HTTP_CLIENT_ENABLE_BASIC_AUTH is not set CONFIG_ESP_HTTP_CLIENT_ENABLE_DIGEST_AUTH=y # end of ESP HTTP client # # HTTP Server # CONFIG_HTTPD_MAX_REQ_HDR_LEN=1024 CONFIG_HTTPD_MAX_URI_LEN=512 CONFIG_HTTPD_ERR_RESP_NO_DELAY=y CONFIG_HTTPD_PURGE_BUF_LEN=32 # CONFIG_HTTPD_LOG_PURGE_DATA is not set CONFIG_HTTPD_WS_SUPPORT=y # CONFIG_HTTPD_QUEUE_WORK_BLOCKING is not set # end of HTTP Server # # ESP HTTPS OTA # # CONFIG_ESP_HTTPS_OTA_DECRYPT_CB is not set # CONFIG_ESP_HTTPS_OTA_ALLOW_HTTP is not set # end of ESP HTTPS OTA # # ESP HTTPS server # # CONFIG_ESP_HTTPS_SERVER_ENABLE is not set # end of ESP HTTPS server # # Hardware Settings # # # MAC Config # CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y # CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_TWO is not set CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES_FOUR=y CONFIG_ESP32_UNIVERSAL_MAC_ADDRESSES=4 # end of MAC Config # # Sleep Config # CONFIG_ESP_SLEEP_POWER_DOWN_FLASH=y CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y # CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND is not set # CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND is not set CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 # end of Sleep Config # # RTC Clock Config # CONFIG_RTC_CLK_SRC_INT_RC=y # CONFIG_RTC_CLK_SRC_EXT_CRYS is not set # CONFIG_RTC_CLK_SRC_EXT_OSC is not set # CONFIG_RTC_CLK_SRC_INT_8MD256 is not set CONFIG_RTC_CLK_CAL_CYCLES=1024 # end of RTC Clock Config # # Peripheral Control # CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y # end of Peripheral Control # # MMU Config # CONFIG_MMU_PAGE_SIZE_64KB=y CONFIG_MMU_PAGE_MODE="64KB" CONFIG_MMU_PAGE_SIZE=0x10000 # end of MMU Config CONFIG_ESP32_REV_MIN_0=y # CONFIG_ESP32_REV_MIN_1 is not set # CONFIG_ESP32_REV_MIN_2 is not set # CONFIG_ESP32_REV_MIN_3 is not set CONFIG_ESP32_REV_MIN=0 CONFIG_ESP32_XTAL_FREQ_40=y # CONFIG_ESP32_XTAL_FREQ_26 is not set # CONFIG_ESP32_XTAL_FREQ_AUTO is not set CONFIG_ESP32_XTAL_FREQ=40 # end of Hardware Settings # # LCD and Touch Panel # # # LCD Peripheral Configuration # CONFIG_LCD_PANEL_IO_FORMAT_BUF_SIZE=32 # CONFIG_LCD_ENABLE_DEBUG_LOG is not set # end of LCD Peripheral Configuration # end of LCD and Touch Panel # # ESP NETIF Adapter # CONFIG_ESP_NETIF_IP_LOST_TIMER_INTERVAL=120 CONFIG_ESP_NETIF_TCPIP_LWIP=y # CONFIG_ESP_NETIF_LOOPBACK is not set # CONFIG_ESP_NETIF_L2_TAP is not set # CONFIG_ESP_NETIF_BRIDGE_EN is not set # end of ESP NETIF Adapter # # PHY # CONFIG_ESP_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION is not set CONFIG_ESP_PHY_MAX_WIFI_TX_POWER=18 CONFIG_ESP_PHY_MAX_TX_POWER=18 CONFIG_ESP_PHY_REDUCE_TX_POWER=y # end of PHY # # Power Management # # CONFIG_PM_ENABLE is not set # end of Power Management # # ESP PSRAM # # CONFIG_SPIRAM is not set # end of ESP PSRAM # # ESP Ringbuf # # CONFIG_RINGBUF_PLACE_FUNCTIONS_INTO_FLASH is not set # CONFIG_RINGBUF_PLACE_ISR_FUNCTIONS_INTO_FLASH is not set # end of ESP Ringbuf # # ESP System Settings # # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160=y # CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240 is not set CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=160 # # Memory # # CONFIG_ESP32_USE_FIXED_STATIC_RAM_SIZE is not set # end of Memory # # Trace memory # # CONFIG_ESP32_TRAX is not set CONFIG_ESP32_TRACEMEM_RESERVE_DRAM=0x0 # end of Trace memory # CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y # CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set # CONFIG_ESP_SYSTEM_PANIC_GDBSTUB is not set # CONFIG_ESP_SYSTEM_GDBSTUB_RUNTIME is not set # # Memory protection # # end of Memory protection CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y # CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set # CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 # CONFIG_ESP_CONSOLE_UART_DEFAULT is not set CONFIG_ESP_CONSOLE_UART_CUSTOM=y # CONFIG_ESP_CONSOLE_NONE is not set CONFIG_ESP_CONSOLE_UART=y CONFIG_ESP_CONSOLE_MULTIPLE_UART=y # CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_0 is not set CONFIG_ESP_CONSOLE_UART_CUSTOM_NUM_1=y CONFIG_ESP_CONSOLE_UART_NUM=1 CONFIG_ESP_CONSOLE_UART_TX_GPIO=4 CONFIG_ESP_CONSOLE_UART_RX_GPIO=35 CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 CONFIG_ESP_INT_WDT=y CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 CONFIG_ESP_INT_WDT_CHECK_CPU1=y CONFIG_ESP_TASK_WDT=y # CONFIG_ESP_TASK_WDT_PANIC is not set CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y # CONFIG_ESP_PANIC_HANDLER_IRAM is not set # CONFIG_ESP_DEBUG_STUBS_ENABLE is not set CONFIG_ESP_DEBUG_OCDAWARE=y CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_5=y # # Brownout Detector # CONFIG_ESP_BROWNOUT_DET=y CONFIG_ESP_BROWNOUT_DET_LVL_SEL_0=y # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 is not set # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set # CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7 is not set CONFIG_ESP_BROWNOUT_DET_LVL=0 # end of Brownout Detector # CONFIG_ESP32_DISABLE_BASIC_ROM_CONSOLE is not set CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y # end of ESP System Settings # # IPC (Inter-Processor Call) # CONFIG_ESP_IPC_TASK_STACK_SIZE=2048 CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y CONFIG_ESP_IPC_ISR_ENABLE=y # end of IPC (Inter-Processor Call) # # High resolution timer (esp_timer) # # CONFIG_ESP_TIMER_PROFILING is not set CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 # CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set CONFIG_ESP_TIMER_IMPL_TG0_LAC=y # end of High resolution timer (esp_timer) # # Wi-Fi # CONFIG_ESP32_WIFI_ENABLED=y CONFIG_ESP32_WIFI_SW_COEXIST_ENABLE=y CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM=10 CONFIG_ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM=32 # CONFIG_ESP32_WIFI_STATIC_TX_BUFFER is not set CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER=y CONFIG_ESP32_WIFI_TX_BUFFER_TYPE=1 CONFIG_ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM=32 # CONFIG_ESP32_WIFI_CSI_ENABLED is not set # CONFIG_ESP32_WIFI_AMPDU_TX_ENABLED is not set # CONFIG_ESP32_WIFI_AMPDU_RX_ENABLED is not set CONFIG_ESP32_WIFI_NVS_ENABLED=y CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_0=y # CONFIG_ESP32_WIFI_TASK_PINNED_TO_CORE_1 is not set CONFIG_ESP32_WIFI_SOFTAP_BEACON_MAX_LEN=752 CONFIG_ESP32_WIFI_MGMT_SBUF_NUM=32 # CONFIG_ESP32_WIFI_IRAM_OPT is not set # CONFIG_ESP32_WIFI_RX_IRAM_OPT is not set CONFIG_ESP32_WIFI_ENABLE_WPA3_SAE=y CONFIG_ESP32_WIFI_ENABLE_WPA3_OWE_STA=y # CONFIG_ESP_WIFI_SLP_IRAM_OPT is not set # CONFIG_ESP_WIFI_STA_DISCONNECTED_PM_ENABLE is not set # CONFIG_ESP_WIFI_GMAC_SUPPORT is not set CONFIG_ESP_WIFI_SOFTAP_SUPPORT=y # CONFIG_ESP_WIFI_SLP_BEACON_LOST_OPT is not set # end of Wi-Fi # # Core dump # # CONFIG_ESP_COREDUMP_ENABLE_TO_FLASH is not set # CONFIG_ESP_COREDUMP_ENABLE_TO_UART is not set CONFIG_ESP_COREDUMP_ENABLE_TO_NONE=y # end of Core dump # # FAT Filesystem support # CONFIG_FATFS_VOLUME_COUNT=2 # CONFIG_FATFS_SECTOR_512 is not set # CONFIG_FATFS_SECTOR_1024 is not set # CONFIG_FATFS_SECTOR_2048 is not set CONFIG_FATFS_SECTOR_4096=y CONFIG_FATFS_SECTORS_PER_CLUSTER_1=y # CONFIG_FATFS_SECTORS_PER_CLUSTER_2 is not set # CONFIG_FATFS_SECTORS_PER_CLUSTER_4 is not set # CONFIG_FATFS_SECTORS_PER_CLUSTER_8 is not set # CONFIG_FATFS_SECTORS_PER_CLUSTER_16 is not set # CONFIG_FATFS_SECTORS_PER_CLUSTER_32 is not set # CONFIG_FATFS_SECTORS_PER_CLUSTER_64 is not set # CONFIG_FATFS_SECTORS_PER_CLUSTER_128 is not set # CONFIG_FATFS_CODEPAGE_DYNAMIC is not set CONFIG_FATFS_CODEPAGE_437=y # CONFIG_FATFS_CODEPAGE_720 is not set # CONFIG_FATFS_CODEPAGE_737 is not set # CONFIG_FATFS_CODEPAGE_771 is not set # CONFIG_FATFS_CODEPAGE_775 is not set # CONFIG_FATFS_CODEPAGE_850 is not set # CONFIG_FATFS_CODEPAGE_852 is not set # CONFIG_FATFS_CODEPAGE_855 is not set # CONFIG_FATFS_CODEPAGE_857 is not set # CONFIG_FATFS_CODEPAGE_860 is not set # CONFIG_FATFS_CODEPAGE_861 is not set # CONFIG_FATFS_CODEPAGE_862 is not set # CONFIG_FATFS_CODEPAGE_863 is not set # CONFIG_FATFS_CODEPAGE_864 is not set # CONFIG_FATFS_CODEPAGE_865 is not set # CONFIG_FATFS_CODEPAGE_866 is not set # CONFIG_FATFS_CODEPAGE_869 is not set # CONFIG_FATFS_CODEPAGE_932 is not set # CONFIG_FATFS_CODEPAGE_936 is not set # CONFIG_FATFS_CODEPAGE_949 is not set # CONFIG_FATFS_CODEPAGE_950 is not set CONFIG_FATFS_AUTO_TYPE=y # CONFIG_FATFS_FAT12 is not set # CONFIG_FATFS_FAT16 is not set CONFIG_FATFS_CODEPAGE=437 # CONFIG_FATFS_LFN_NONE is not set CONFIG_FATFS_LFN_HEAP=y # CONFIG_FATFS_LFN_STACK is not set CONFIG_FATFS_MAX_LFN=255 CONFIG_FATFS_API_ENCODING_ANSI_OEM=y # CONFIG_FATFS_API_ENCODING_UTF_8 is not set CONFIG_FATFS_FS_LOCK=0 CONFIG_FATFS_TIMEOUT_MS=10000 CONFIG_FATFS_PER_FILE_CACHE=y # CONFIG_FATFS_USE_FASTSEEK is not set # end of FAT Filesystem support # # FreeRTOS # # # Kernel # # CONFIG_FREERTOS_SMP is not set # CONFIG_FREERTOS_UNICORE is not set CONFIG_FREERTOS_HZ=100 # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set # CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 # CONFIG_FREERTOS_USE_IDLE_HOOK is not set # CONFIG_FREERTOS_USE_TICK_HOOK is not set CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 # CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 # CONFIG_FREERTOS_USE_TRACE_FACILITY is not set # CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set # end of Kernel # # Port # CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y # CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set # CONFIG_FREERTOS_ENABLE_STATIC_TASK_CLEAN_UP is not set CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y CONFIG_FREERTOS_ISR_STACKSIZE=1536 CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y # CONFIG_FREERTOS_FPU_IN_ISR is not set CONFIG_FREERTOS_TICK_SUPPORT_CORETIMER=y CONFIG_FREERTOS_CORETIMER_0=y # CONFIG_FREERTOS_CORETIMER_1 is not set CONFIG_FREERTOS_SYSTICK_USES_CCOUNT=y # CONFIG_FREERTOS_PLACE_FUNCTIONS_INTO_FLASH is not set # CONFIG_FREERTOS_PLACE_SNAPSHOT_FUNS_INTO_FLASH is not set # CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set CONFIG_FREERTOS_ASSERT_ON_UNTESTED_FUNCTION=y CONFIG_FREERTOS_ENABLE_TASK_SNAPSHOT=y # end of Port CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y CONFIG_FREERTOS_DEBUG_OCDAWARE=y # end of FreeRTOS # # Hardware Abstraction Layer (HAL) and Low Level (LL) # CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y # CONFIG_HAL_ASSERTION_DISABLE is not set # CONFIG_HAL_ASSERTION_SILENT is not set # CONFIG_HAL_ASSERTION_ENABLE is not set CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 # end of Hardware Abstraction Layer (HAL) and Low Level (LL) # # Heap memory debugging # CONFIG_HEAP_POISONING_DISABLED=y # CONFIG_HEAP_POISONING_LIGHT is not set # CONFIG_HEAP_POISONING_COMPREHENSIVE is not set CONFIG_HEAP_TRACING_OFF=y # CONFIG_HEAP_TRACING_STANDALONE is not set # CONFIG_HEAP_TRACING_TOHOST is not set # CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set # end of Heap memory debugging # # Log output # # CONFIG_LOG_DEFAULT_LEVEL_NONE is not set # CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set # CONFIG_LOG_DEFAULT_LEVEL_WARN is not set CONFIG_LOG_DEFAULT_LEVEL_INFO=y # CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set # CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set CONFIG_LOG_DEFAULT_LEVEL=3 CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y # CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set # CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set CONFIG_LOG_MAXIMUM_LEVEL=3 CONFIG_LOG_COLORS=y CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y # CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set # end of Log output # # LWIP # CONFIG_LWIP_LOCAL_HOSTNAME="espressif" # CONFIG_LWIP_NETIF_API is not set # CONFIG_LWIP_TCPIP_CORE_LOCKING is not set CONFIG_LWIP_DNS_SUPPORT_MDNS_QUERIES=y # CONFIG_LWIP_L2_TO_L3_COPY is not set CONFIG_LWIP_IRAM_OPTIMIZATION=y CONFIG_LWIP_TIMERS_ONDEMAND=y CONFIG_LWIP_MAX_SOCKETS=10 # CONFIG_LWIP_USE_ONLY_LWIP_SELECT is not set # CONFIG_LWIP_SO_LINGER is not set CONFIG_LWIP_SO_REUSE=y CONFIG_LWIP_SO_REUSE_RXTOALL=y # CONFIG_LWIP_SO_RCVBUF is not set # CONFIG_LWIP_NETBUF_RECVINFO is not set CONFIG_LWIP_IP4_FRAG=y CONFIG_LWIP_IP6_FRAG=y # CONFIG_LWIP_IP4_REASSEMBLY is not set # CONFIG_LWIP_IP6_REASSEMBLY is not set # CONFIG_LWIP_IP_FORWARD is not set # CONFIG_LWIP_STATS is not set CONFIG_LWIP_ESP_GRATUITOUS_ARP=y CONFIG_LWIP_GARP_TMR_INTERVAL=60 CONFIG_LWIP_TCPIP_RECVMBOX_SIZE=32 CONFIG_LWIP_DHCP_DOES_ARP_CHECK=y # CONFIG_LWIP_DHCP_DISABLE_CLIENT_ID is not set CONFIG_LWIP_DHCP_DISABLE_VENDOR_CLASS_ID=y # CONFIG_LWIP_DHCP_RESTORE_LAST_IP is not set CONFIG_LWIP_DHCP_OPTIONS_LEN=68 CONFIG_LWIP_NUM_NETIF_CLIENT_DATA=0 # # DHCP server # CONFIG_LWIP_DHCPS=y CONFIG_LWIP_DHCPS_LEASE_UNIT=60 CONFIG_LWIP_DHCPS_MAX_STATION_NUM=8 # end of DHCP server CONFIG_LWIP_AUTOIP=y CONFIG_LWIP_AUTOIP_TRIES=2 CONFIG_LWIP_AUTOIP_MAX_CONFLICTS=9 CONFIG_LWIP_AUTOIP_RATE_LIMIT_INTERVAL=20 CONFIG_LWIP_IPV6=y # CONFIG_LWIP_IPV6_AUTOCONFIG is not set CONFIG_LWIP_IPV6_NUM_ADDRESSES=3 # CONFIG_LWIP_IPV6_FORWARD is not set # CONFIG_LWIP_NETIF_STATUS_CALLBACK is not set CONFIG_LWIP_NETIF_LOOPBACK=y CONFIG_LWIP_LOOPBACK_MAX_PBUFS=8 # # TCP # CONFIG_LWIP_MAX_ACTIVE_TCP=16 CONFIG_LWIP_MAX_LISTENING_TCP=16 CONFIG_LWIP_TCP_HIGH_SPEED_RETRANSMISSION=y CONFIG_LWIP_TCP_MAXRTX=12 CONFIG_LWIP_TCP_SYNMAXRTX=12 CONFIG_LWIP_TCP_MSS=1440 CONFIG_LWIP_TCP_TMR_INTERVAL=250 CONFIG_LWIP_TCP_MSL=60000 CONFIG_LWIP_TCP_SND_BUF_DEFAULT=5760 CONFIG_LWIP_TCP_WND_DEFAULT=5760 CONFIG_LWIP_TCP_RECVMBOX_SIZE=6 CONFIG_LWIP_TCP_QUEUE_OOSEQ=y # CONFIG_LWIP_TCP_SACK_OUT is not set CONFIG_LWIP_TCP_OVERSIZE_MSS=y # CONFIG_LWIP_TCP_OVERSIZE_QUARTER_MSS is not set # CONFIG_LWIP_TCP_OVERSIZE_DISABLE is not set CONFIG_LWIP_TCP_RTO_TIME=1500 # end of TCP # # UDP # CONFIG_LWIP_MAX_UDP_PCBS=16 CONFIG_LWIP_UDP_RECVMBOX_SIZE=6 # end of UDP # # Checksums # # CONFIG_LWIP_CHECKSUM_CHECK_IP is not set # CONFIG_LWIP_CHECKSUM_CHECK_UDP is not set CONFIG_LWIP_CHECKSUM_CHECK_ICMP=y # end of Checksums CONFIG_LWIP_TCPIP_TASK_STACK_SIZE=3072 CONFIG_LWIP_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU0 is not set # CONFIG_LWIP_TCPIP_TASK_AFFINITY_CPU1 is not set CONFIG_LWIP_TCPIP_TASK_AFFINITY=0x7FFFFFFF # CONFIG_LWIP_PPP_SUPPORT is not set CONFIG_LWIP_IPV6_MEMP_NUM_ND6_QUEUE=3 CONFIG_LWIP_IPV6_ND6_NUM_NEIGHBORS=5 # CONFIG_LWIP_SLIP_SUPPORT is not set # # ICMP # CONFIG_LWIP_ICMP=y # CONFIG_LWIP_MULTICAST_PING is not set # CONFIG_LWIP_BROADCAST_PING is not set # end of ICMP # # LWIP RAW API # CONFIG_LWIP_MAX_RAW_PCBS=16 # end of LWIP RAW API # # SNTP # CONFIG_LWIP_SNTP_MAX_SERVERS=1 # CONFIG_LWIP_DHCP_GET_NTP_SRV is not set CONFIG_LWIP_SNTP_UPDATE_DELAY=3600000 # end of SNTP CONFIG_LWIP_BRIDGEIF_MAX_PORTS=7 CONFIG_LWIP_ESP_LWIP_ASSERT=y # # Hooks # # CONFIG_LWIP_HOOK_TCP_ISN_NONE is not set CONFIG_LWIP_HOOK_TCP_ISN_DEFAULT=y # CONFIG_LWIP_HOOK_TCP_ISN_CUSTOM is not set CONFIG_LWIP_HOOK_IP6_ROUTE_NONE=y # CONFIG_LWIP_HOOK_IP6_ROUTE_DEFAULT is not set # CONFIG_LWIP_HOOK_IP6_ROUTE_CUSTOM is not set CONFIG_LWIP_HOOK_ND6_GET_GW_NONE=y # CONFIG_LWIP_HOOK_ND6_GET_GW_DEFAULT is not set # CONFIG_LWIP_HOOK_ND6_GET_GW_CUSTOM is not set CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_NONE=y # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_DEFAULT is not set # CONFIG_LWIP_HOOK_NETCONN_EXT_RESOLVE_CUSTOM is not set CONFIG_LWIP_HOOK_IP6_INPUT_NONE=y # CONFIG_LWIP_HOOK_IP6_INPUT_DEFAULT is not set # CONFIG_LWIP_HOOK_IP6_INPUT_CUSTOM is not set # end of Hooks # CONFIG_LWIP_DEBUG is not set # end of LWIP # # mbedTLS # CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y # CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set # CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 # CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set # CONFIG_MBEDTLS_DEBUG is not set # # mbedTLS v3.x related # # CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set # CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set # CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set # CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE is not set # end of mbedTLS v3.x related # # Certificate Bundle # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set # CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set # CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 # end of Certificate Bundle # CONFIG_MBEDTLS_ECP_RESTARTABLE is not set # CONFIG_MBEDTLS_CMAC_C is not set CONFIG_MBEDTLS_HARDWARE_AES=y CONFIG_MBEDTLS_HARDWARE_MPI=y CONFIG_MBEDTLS_HARDWARE_SHA=y CONFIG_MBEDTLS_ROM_MD5=y # CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set # CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set CONFIG_MBEDTLS_HAVE_TIME=y # CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set # CONFIG_MBEDTLS_HAVE_TIME_DATE is not set CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y CONFIG_MBEDTLS_SHA512_C=y CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y # CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set # CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set # CONFIG_MBEDTLS_TLS_DISABLED is not set CONFIG_MBEDTLS_TLS_SERVER=y CONFIG_MBEDTLS_TLS_CLIENT=y CONFIG_MBEDTLS_TLS_ENABLED=y # # TLS Key Exchange Methods # # CONFIG_MBEDTLS_PSK_MODES is not set CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_ECDSA=y CONFIG_MBEDTLS_KEY_EXCHANGE_ECDH_RSA=y # end of TLS Key Exchange Methods CONFIG_MBEDTLS_SSL_RENEGOTIATION=y CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y # CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set # CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set CONFIG_MBEDTLS_SSL_ALPN=y CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y # # Symmetric Ciphers # CONFIG_MBEDTLS_AES_C=y # CONFIG_MBEDTLS_CAMELLIA_C is not set # CONFIG_MBEDTLS_DES_C is not set # CONFIG_MBEDTLS_BLOWFISH_C is not set # CONFIG_MBEDTLS_XTEA_C is not set CONFIG_MBEDTLS_CCM_C=y CONFIG_MBEDTLS_GCM_C=y # CONFIG_MBEDTLS_NIST_KW_C is not set # end of Symmetric Ciphers # CONFIG_MBEDTLS_RIPEMD160_C is not set # # Certificates # CONFIG_MBEDTLS_PEM_PARSE_C=y CONFIG_MBEDTLS_PEM_WRITE_C=y CONFIG_MBEDTLS_X509_CRL_PARSE_C=y CONFIG_MBEDTLS_X509_CSR_PARSE_C=y # end of Certificates CONFIG_MBEDTLS_ECP_C=y # CONFIG_MBEDTLS_DHM_C is not set CONFIG_MBEDTLS_ECDH_C=y CONFIG_MBEDTLS_ECDSA_C=y # CONFIG_MBEDTLS_ECJPAKE_C is not set CONFIG_MBEDTLS_ECP_DP_SECP192R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP224R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP192K1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP224K1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y CONFIG_MBEDTLS_ECP_NIST_OPTIM=y # CONFIG_MBEDTLS_POLY1305_C is not set # CONFIG_MBEDTLS_CHACHA20_C is not set # CONFIG_MBEDTLS_HKDF_C is not set # CONFIG_MBEDTLS_THREADING_C is not set # CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI is not set # CONFIG_MBEDTLS_SECURITY_RISKS is not set # end of mbedTLS # # ESP-MQTT Configurations # CONFIG_MQTT_PROTOCOL_311=y # CONFIG_MQTT_PROTOCOL_5 is not set CONFIG_MQTT_TRANSPORT_SSL=y CONFIG_MQTT_TRANSPORT_WEBSOCKET=y CONFIG_MQTT_TRANSPORT_WEBSOCKET_SECURE=y # CONFIG_MQTT_MSG_ID_INCREMENTAL is not set # CONFIG_MQTT_SKIP_PUBLISH_IF_DISCONNECTED is not set # CONFIG_MQTT_REPORT_DELETED_MESSAGES is not set # CONFIG_MQTT_USE_CUSTOM_CONFIG is not set # CONFIG_MQTT_TASK_CORE_SELECTION_ENABLED is not set # CONFIG_MQTT_CUSTOM_OUTBOX is not set # end of ESP-MQTT Configurations # # Newlib # CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y # CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set # CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set # CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set # CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y # CONFIG_NEWLIB_NANO_FORMAT is not set CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y # CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set # CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set # CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set # end of Newlib # # NVS # # CONFIG_NVS_ASSERT_ERROR_CHECK is not set # end of NVS # # OpenThread # # CONFIG_OPENTHREAD_ENABLED is not set # end of OpenThread # # Protocomm # CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_0=y CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_1=y # CONFIG_ESP_PROTOCOMM_SUPPORT_SECURITY_VERSION_2 is not set # end of Protocomm # # PThreads # CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 CONFIG_PTHREAD_STACK_MIN=768 CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y # CONFIG_PTHREAD_DEFAULT_CORE_0 is not set # CONFIG_PTHREAD_DEFAULT_CORE_1 is not set CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" # end of PThreads # # SPI Flash driver # # CONFIG_SPI_FLASH_VERIFY_WRITE is not set # CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set CONFIG_SPI_FLASH_ROM_DRIVER_PATCH=y CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y # CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set # CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set # CONFIG_SPI_FLASH_SHARE_SPI1_BUS is not set # CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 # CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set # CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set # CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set # # SPI Flash behavior when brownout # CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y CONFIG_SPI_FLASH_BROWNOUT_RESET=y # end of SPI Flash behavior when brownout # # Auto-detect flash chips # CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y # CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP is not set # CONFIG_SPI_FLASH_SUPPORT_TH_CHIP is not set # end of Auto-detect flash chips CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y # end of SPI Flash driver # # SPIFFS Configuration # CONFIG_SPIFFS_MAX_PARTITIONS=3 # # SPIFFS Cache Configuration # CONFIG_SPIFFS_CACHE=y CONFIG_SPIFFS_CACHE_WR=y # CONFIG_SPIFFS_CACHE_STATS is not set # end of SPIFFS Cache Configuration CONFIG_SPIFFS_PAGE_CHECK=y CONFIG_SPIFFS_GC_MAX_RUNS=10 # CONFIG_SPIFFS_GC_STATS is not set CONFIG_SPIFFS_PAGE_SIZE=256 CONFIG_SPIFFS_OBJ_NAME_LEN=128 # CONFIG_SPIFFS_FOLLOW_SYMLINKS is not set CONFIG_SPIFFS_USE_MAGIC=y CONFIG_SPIFFS_USE_MAGIC_LENGTH=y CONFIG_SPIFFS_META_LENGTH=4 CONFIG_SPIFFS_USE_MTIME=y # # Debug Configuration # # CONFIG_SPIFFS_DBG is not set # CONFIG_SPIFFS_API_DBG is not set # CONFIG_SPIFFS_GC_DBG is not set # CONFIG_SPIFFS_CACHE_DBG is not set # CONFIG_SPIFFS_CHECK_DBG is not set # CONFIG_SPIFFS_TEST_VISUALISATION is not set # end of Debug Configuration # end of SPIFFS Configuration # # TCP Transport # # # Websocket # CONFIG_WS_TRANSPORT=y CONFIG_WS_BUFFER_SIZE=1024 # CONFIG_WS_DYNAMIC_BUFFER is not set # end of Websocket # end of TCP Transport # # Ultra Low Power (ULP) Co-processor # # CONFIG_ULP_COPROC_ENABLED is not set # end of Ultra Low Power (ULP) Co-processor # # Unity unit testing library # CONFIG_UNITY_ENABLE_FLOAT=y CONFIG_UNITY_ENABLE_DOUBLE=y # CONFIG_UNITY_ENABLE_64BIT is not set # CONFIG_UNITY_ENABLE_COLOR is not set CONFIG_UNITY_ENABLE_IDF_TEST_RUNNER=y # CONFIG_UNITY_ENABLE_FIXTURE is not set # CONFIG_UNITY_ENABLE_BACKTRACE_ON_FAIL is not set # end of Unity unit testing library # # Virtual file system # CONFIG_VFS_SUPPORT_IO=y CONFIG_VFS_SUPPORT_DIR=y CONFIG_VFS_SUPPORT_SELECT=y CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y CONFIG_VFS_SUPPORT_TERMIOS=y # # Host File System I/O (Semihosting) # CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 # end of Host File System I/O (Semihosting) # end of Virtual file system # # Wear Levelling # # CONFIG_WL_SECTOR_SIZE_512 is not set CONFIG_WL_SECTOR_SIZE_4096=y CONFIG_WL_SECTOR_SIZE=4096 # end of Wear Levelling # # Wi-Fi Provisioning Manager # CONFIG_WIFI_PROV_SCAN_MAX_ENTRIES=16 CONFIG_WIFI_PROV_AUTOSTOP_TIMEOUT=30 CONFIG_WIFI_PROV_BLE_BONDING=y CONFIG_WIFI_PROV_BLE_FORCE_ENCRYPTION=y # CONFIG_WIFI_PROV_KEEP_BLE_ON_AFTER_PROV is not set # end of Wi-Fi Provisioning Manager # # Supplicant # CONFIG_WPA_MBEDTLS_CRYPTO=y CONFIG_WPA_MBEDTLS_TLS_CLIENT=y # CONFIG_WPA_WAPI_PSK is not set # CONFIG_WPA_SUITE_B_192 is not set # CONFIG_WPA_DEBUG_PRINT is not set # CONFIG_WPA_TESTING_OPTIONS is not set # CONFIG_WPA_WPS_STRICT is not set # CONFIG_WPA_11KV_SUPPORT is not set # CONFIG_WPA_MBO_SUPPORT is not set # CONFIG_WPA_DPP_SUPPORT is not set # CONFIG_WPA_11R_SUPPORT is not set # CONFIG_WPA_WPS_SOFTAP_REGISTRAR is not set # end of Supplicant # # mDNS # CONFIG_MDNS_MAX_INTERFACES=3 CONFIG_MDNS_MAX_SERVICES=10 CONFIG_MDNS_TASK_PRIORITY=1 CONFIG_MDNS_TASK_STACK_SIZE=4096 # CONFIG_MDNS_TASK_AFFINITY_NO_AFFINITY is not set CONFIG_MDNS_TASK_AFFINITY_CPU0=y # CONFIG_MDNS_TASK_AFFINITY_CPU1 is not set CONFIG_MDNS_TASK_AFFINITY=0x0 CONFIG_MDNS_SERVICE_ADD_TIMEOUT_MS=2000 # CONFIG_MDNS_STRICT_MODE is not set CONFIG_MDNS_TIMER_PERIOD_MS=100 # CONFIG_MDNS_NETWORKING_SOCKET is not set CONFIG_MDNS_MULTIPLE_INSTANCE=y # # MDNS Predefined interfaces # CONFIG_MDNS_PREDEF_NETIF_STA=y CONFIG_MDNS_PREDEF_NETIF_AP=y CONFIG_MDNS_PREDEF_NETIF_ETH=y # end of MDNS Predefined interfaces # end of mDNS # end of Component config # Deprecated options for backward compatibility # CONFIG_NO_BLOBS is not set # CONFIG_ESP32_NO_BLOBS is not set # CONFIG_ESP32_COMPATIBLE_PRE_V2_1_BOOTLOADERS is not set # CONFIG_ESP32_COMPATIBLE_PRE_V3_1_BOOTLOADERS is not set # CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set # CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set # CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y # CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set # CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set CONFIG_LOG_BOOTLOADER_LEVEL=3 # CONFIG_APP_ROLLBACK_ENABLE is not set # CONFIG_FLASH_ENCRYPTION_ENABLED is not set # CONFIG_FLASHMODE_QIO is not set # CONFIG_FLASHMODE_QOUT is not set CONFIG_FLASHMODE_DIO=y # CONFIG_FLASHMODE_DOUT is not set CONFIG_MONITOR_BAUD=115200 CONFIG_OPTIMIZATION_LEVEL_DEBUG=y CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y # CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set # CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y # CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set # CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 # CONFIG_CXX_EXCEPTIONS is not set CONFIG_STACK_CHECK_NONE=y # CONFIG_STACK_CHECK_NORM is not set # CONFIG_STACK_CHECK_STRONG is not set # CONFIG_STACK_CHECK_ALL is not set # CONFIG_WARN_WRITE_STRINGS is not set # CONFIG_ESP32_APPTRACE_DEST_TRAX is not set CONFIG_ESP32_APPTRACE_DEST_NONE=y CONFIG_ESP32_APPTRACE_LOCK_ENABLE=y CONFIG_BLUEDROID_ENABLED=y # CONFIG_NIMBLE_ENABLED is not set CONFIG_BTC_TASK_STACK_SIZE=3072 CONFIG_BLUEDROID_PINNED_TO_CORE_0=y # CONFIG_BLUEDROID_PINNED_TO_CORE_1 is not set CONFIG_BLUEDROID_PINNED_TO_CORE=0 CONFIG_BTU_TASK_STACK_SIZE=4096 # CONFIG_BLUEDROID_MEM_DEBUG is not set # CONFIG_CLASSIC_BT_ENABLED is not set CONFIG_GATTS_ENABLE=y # CONFIG_GATTS_SEND_SERVICE_CHANGE_MANUAL is not set CONFIG_GATTS_SEND_SERVICE_CHANGE_AUTO=y CONFIG_GATTS_SEND_SERVICE_CHANGE_MODE=0 CONFIG_GATTC_ENABLE=y # CONFIG_GATTC_CACHE_NVS_FLASH is not set CONFIG_BLE_SMP_ENABLE=y # CONFIG_SMP_SLAVE_CON_PARAMS_UPD_ENABLE is not set # CONFIG_HCI_TRACE_LEVEL_NONE is not set # CONFIG_HCI_TRACE_LEVEL_ERROR is not set CONFIG_HCI_TRACE_LEVEL_WARNING=y # CONFIG_HCI_TRACE_LEVEL_API is not set # CONFIG_HCI_TRACE_LEVEL_EVENT is not set # CONFIG_HCI_TRACE_LEVEL_DEBUG is not set # CONFIG_HCI_TRACE_LEVEL_VERBOSE is not set CONFIG_HCI_INITIAL_TRACE_LEVEL=2 # CONFIG_BTM_TRACE_LEVEL_NONE is not set # CONFIG_BTM_TRACE_LEVEL_ERROR is not set CONFIG_BTM_TRACE_LEVEL_WARNING=y # CONFIG_BTM_TRACE_LEVEL_API is not set # CONFIG_BTM_TRACE_LEVEL_EVENT is not set # CONFIG_BTM_TRACE_LEVEL_DEBUG is not set # CONFIG_BTM_TRACE_LEVEL_VERBOSE is not set CONFIG_BTM_INITIAL_TRACE_LEVEL=2 # CONFIG_L2CAP_TRACE_LEVEL_NONE is not set # CONFIG_L2CAP_TRACE_LEVEL_ERROR is not set CONFIG_L2CAP_TRACE_LEVEL_WARNING=y # CONFIG_L2CAP_TRACE_LEVEL_API is not set # CONFIG_L2CAP_TRACE_LEVEL_EVENT is not set # CONFIG_L2CAP_TRACE_LEVEL_DEBUG is not set # CONFIG_L2CAP_TRACE_LEVEL_VERBOSE is not set CONFIG_L2CAP_INITIAL_TRACE_LEVEL=2 # CONFIG_RFCOMM_TRACE_LEVEL_NONE is not set # CONFIG_RFCOMM_TRACE_LEVEL_ERROR is not set CONFIG_RFCOMM_TRACE_LEVEL_WARNING=y # CONFIG_RFCOMM_TRACE_LEVEL_API is not set # CONFIG_RFCOMM_TRACE_LEVEL_EVENT is not set # CONFIG_RFCOMM_TRACE_LEVEL_DEBUG is not set # CONFIG_RFCOMM_TRACE_LEVEL_VERBOSE is not set CONFIG_RFCOMM_INITIAL_TRACE_LEVEL=2 # CONFIG_SDP_TRACE_LEVEL_NONE is not set # CONFIG_SDP_TRACE_LEVEL_ERROR is not set CONFIG_SDP_TRACE_LEVEL_WARNING=y # CONFIG_SDP_TRACE_LEVEL_API is not set # CONFIG_SDP_TRACE_LEVEL_EVENT is not set # CONFIG_SDP_TRACE_LEVEL_DEBUG is not set # CONFIG_SDP_TRACE_LEVEL_VERBOSE is not set CONFIG_BTH_LOG_SDP_INITIAL_TRACE_LEVEL=2 # CONFIG_GAP_TRACE_LEVEL_NONE is not set # CONFIG_GAP_TRACE_LEVEL_ERROR is not set CONFIG_GAP_TRACE_LEVEL_WARNING=y # CONFIG_GAP_TRACE_LEVEL_API is not set # CONFIG_GAP_TRACE_LEVEL_EVENT is not set # CONFIG_GAP_TRACE_LEVEL_DEBUG is not set # CONFIG_GAP_TRACE_LEVEL_VERBOSE is not set CONFIG_GAP_INITIAL_TRACE_LEVEL=2 CONFIG_BNEP_INITIAL_TRACE_LEVEL=2 # CONFIG_PAN_TRACE_LEVEL_NONE is not set # CONFIG_PAN_TRACE_LEVEL_ERROR is not set CONFIG_PAN_TRACE_LEVEL_WARNING=y # CONFIG_PAN_TRACE_LEVEL_API is not set # CONFIG_PAN_TRACE_LEVEL_EVENT is not set # CONFIG_PAN_TRACE_LEVEL_DEBUG is not set # CONFIG_PAN_TRACE_LEVEL_VERBOSE is not set CONFIG_PAN_INITIAL_TRACE_LEVEL=2 # CONFIG_A2D_TRACE_LEVEL_NONE is not set # CONFIG_A2D_TRACE_LEVEL_ERROR is not set CONFIG_A2D_TRACE_LEVEL_WARNING=y # CONFIG_A2D_TRACE_LEVEL_API is not set # CONFIG_A2D_TRACE_LEVEL_EVENT is not set # CONFIG_A2D_TRACE_LEVEL_DEBUG is not set # CONFIG_A2D_TRACE_LEVEL_VERBOSE is not set CONFIG_A2D_INITIAL_TRACE_LEVEL=2 # CONFIG_AVDT_TRACE_LEVEL_NONE is not set # CONFIG_AVDT_TRACE_LEVEL_ERROR is not set CONFIG_AVDT_TRACE_LEVEL_WARNING=y # CONFIG_AVDT_TRACE_LEVEL_API is not set # CONFIG_AVDT_TRACE_LEVEL_EVENT is not set # CONFIG_AVDT_TRACE_LEVEL_DEBUG is not set # CONFIG_AVDT_TRACE_LEVEL_VERBOSE is not set CONFIG_AVDT_INITIAL_TRACE_LEVEL=2 # CONFIG_AVCT_TRACE_LEVEL_NONE is not set # CONFIG_AVCT_TRACE_LEVEL_ERROR is not set CONFIG_AVCT_TRACE_LEVEL_WARNING=y # CONFIG_AVCT_TRACE_LEVEL_API is not set # CONFIG_AVCT_TRACE_LEVEL_EVENT is not set # CONFIG_AVCT_TRACE_LEVEL_DEBUG is not set # CONFIG_AVCT_TRACE_LEVEL_VERBOSE is not set CONFIG_AVCT_INITIAL_TRACE_LEVEL=2 # CONFIG_AVRC_TRACE_LEVEL_NONE is not set # CONFIG_AVRC_TRACE_LEVEL_ERROR is not set CONFIG_AVRC_TRACE_LEVEL_WARNING=y # CONFIG_AVRC_TRACE_LEVEL_API is not set # CONFIG_AVRC_TRACE_LEVEL_EVENT is not set # CONFIG_AVRC_TRACE_LEVEL_DEBUG is not set # CONFIG_AVRC_TRACE_LEVEL_VERBOSE is not set CONFIG_AVRC_INITIAL_TRACE_LEVEL=2 # CONFIG_MCA_TRACE_LEVEL_NONE is not set # CONFIG_MCA_TRACE_LEVEL_ERROR is not set CONFIG_MCA_TRACE_LEVEL_WARNING=y # CONFIG_MCA_TRACE_LEVEL_API is not set # CONFIG_MCA_TRACE_LEVEL_EVENT is not set # CONFIG_MCA_TRACE_LEVEL_DEBUG is not set # CONFIG_MCA_TRACE_LEVEL_VERBOSE is not set CONFIG_MCA_INITIAL_TRACE_LEVEL=2 # CONFIG_HID_TRACE_LEVEL_NONE is not set # CONFIG_HID_TRACE_LEVEL_ERROR is not set CONFIG_HID_TRACE_LEVEL_WARNING=y # CONFIG_HID_TRACE_LEVEL_API is not set # CONFIG_HID_TRACE_LEVEL_EVENT is not set # CONFIG_HID_TRACE_LEVEL_DEBUG is not set # CONFIG_HID_TRACE_LEVEL_VERBOSE is not set CONFIG_HID_INITIAL_TRACE_LEVEL=2 # CONFIG_APPL_TRACE_LEVEL_NONE is not set # CONFIG_APPL_TRACE_LEVEL_ERROR is not set CONFIG_APPL_TRACE_LEVEL_WARNING=y # CONFIG_APPL_TRACE_LEVEL_API is not set # CONFIG_APPL_TRACE_LEVEL_EVENT is not set # CONFIG_APPL_TRACE_LEVEL_DEBUG is not set # CONFIG_APPL_TRACE_LEVEL_VERBOSE is not set CONFIG_APPL_INITIAL_TRACE_LEVEL=2 # CONFIG_GATT_TRACE_LEVEL_NONE is not set # CONFIG_GATT_TRACE_LEVEL_ERROR is not set CONFIG_GATT_TRACE_LEVEL_WARNING=y # CONFIG_GATT_TRACE_LEVEL_API is not set # CONFIG_GATT_TRACE_LEVEL_EVENT is not set # CONFIG_GATT_TRACE_LEVEL_DEBUG is not set # CONFIG_GATT_TRACE_LEVEL_VERBOSE is not set CONFIG_GATT_INITIAL_TRACE_LEVEL=2 # CONFIG_SMP_TRACE_LEVEL_NONE is not set # CONFIG_SMP_TRACE_LEVEL_ERROR is not set CONFIG_SMP_TRACE_LEVEL_WARNING=y # CONFIG_SMP_TRACE_LEVEL_API is not set # CONFIG_SMP_TRACE_LEVEL_EVENT is not set # CONFIG_SMP_TRACE_LEVEL_DEBUG is not set # CONFIG_SMP_TRACE_LEVEL_VERBOSE is not set CONFIG_SMP_INITIAL_TRACE_LEVEL=2 # CONFIG_BTIF_TRACE_LEVEL_NONE is not set # CONFIG_BTIF_TRACE_LEVEL_ERROR is not set CONFIG_BTIF_TRACE_LEVEL_WARNING=y # CONFIG_BTIF_TRACE_LEVEL_API is not set # CONFIG_BTIF_TRACE_LEVEL_EVENT is not set # CONFIG_BTIF_TRACE_LEVEL_DEBUG is not set # CONFIG_BTIF_TRACE_LEVEL_VERBOSE is not set CONFIG_BTIF_INITIAL_TRACE_LEVEL=2 # CONFIG_BTC_TRACE_LEVEL_NONE is not set # CONFIG_BTC_TRACE_LEVEL_ERROR is not set CONFIG_BTC_TRACE_LEVEL_WARNING=y # CONFIG_BTC_TRACE_LEVEL_API is not set # CONFIG_BTC_TRACE_LEVEL_EVENT is not set # CONFIG_BTC_TRACE_LEVEL_DEBUG is not set # CONFIG_BTC_TRACE_LEVEL_VERBOSE is not set CONFIG_BTC_INITIAL_TRACE_LEVEL=2 # CONFIG_OSI_TRACE_LEVEL_NONE is not set # CONFIG_OSI_TRACE_LEVEL_ERROR is not set CONFIG_OSI_TRACE_LEVEL_WARNING=y # CONFIG_OSI_TRACE_LEVEL_API is not set # CONFIG_OSI_TRACE_LEVEL_EVENT is not set # CONFIG_OSI_TRACE_LEVEL_DEBUG is not set # CONFIG_OSI_TRACE_LEVEL_VERBOSE is not set CONFIG_OSI_INITIAL_TRACE_LEVEL=2 # CONFIG_BLUFI_TRACE_LEVEL_NONE is not set # CONFIG_BLUFI_TRACE_LEVEL_ERROR is not set CONFIG_BLUFI_TRACE_LEVEL_WARNING=y # CONFIG_BLUFI_TRACE_LEVEL_API is not set # CONFIG_BLUFI_TRACE_LEVEL_EVENT is not set # CONFIG_BLUFI_TRACE_LEVEL_DEBUG is not set # CONFIG_BLUFI_TRACE_LEVEL_VERBOSE is not set CONFIG_BLUFI_INITIAL_TRACE_LEVEL=2 # CONFIG_BLE_HOST_QUEUE_CONGESTION_CHECK is not set CONFIG_SMP_ENABLE=y # CONFIG_BLE_ACTIVE_SCAN_REPORT_ADV_SCAN_RSP_INDIVIDUALLY is not set CONFIG_BLE_ESTABLISH_LINK_CONNECTION_TIMEOUT=30 CONFIG_BTDM_CONTROLLER_MODE_BLE_ONLY=y # CONFIG_BTDM_CONTROLLER_MODE_BR_EDR_ONLY is not set # CONFIG_BTDM_CONTROLLER_MODE_BTDM is not set CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN=3 CONFIG_BTDM_CONTROLLER_BLE_MAX_CONN_EFF=3 CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_ACL_CONN_EFF=0 CONFIG_BTDM_CONTROLLER_BR_EDR_MAX_SYNC_CONN_EFF=0 CONFIG_BTDM_CONTROLLER_PINNED_TO_CORE=0 CONFIG_BTDM_CONTROLLER_HCI_MODE_VHCI=y # CONFIG_BTDM_CONTROLLER_HCI_MODE_UART_H4 is not set CONFIG_BTDM_CONTROLLER_MODEM_SLEEP=y CONFIG_BLE_SCAN_DUPLICATE=y CONFIG_SCAN_DUPLICATE_BY_DEVICE_ADDR=y # CONFIG_SCAN_DUPLICATE_BY_ADV_DATA is not set # CONFIG_SCAN_DUPLICATE_BY_ADV_DATA_AND_DEVICE_ADDR is not set CONFIG_SCAN_DUPLICATE_TYPE=0 CONFIG_DUPLICATE_SCAN_CACHE_SIZE=100 # CONFIG_BLE_MESH_SCAN_DUPLICATE_EN is not set CONFIG_BTDM_CONTROLLER_FULL_SCAN_SUPPORTED=y CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_SUPPORTED=y CONFIG_BLE_ADV_REPORT_FLOW_CONTROL_NUM=100 CONFIG_BLE_ADV_REPORT_DISCARD_THRSHOLD=20 CONFIG_ADC2_DISABLE_DAC=y # CONFIG_MCPWM_ISR_IN_IRAM is not set # CONFIG_EVENT_LOOP_PROFILING is not set CONFIG_POST_EVENTS_FROM_ISR=y CONFIG_POST_EVENTS_FROM_IRAM_ISR=y # CONFIG_OTA_ALLOW_HTTP is not set # CONFIG_TWO_UNIVERSAL_MAC_ADDRESS is not set CONFIG_FOUR_UNIVERSAL_MAC_ADDRESS=y CONFIG_NUMBER_OF_UNIVERSAL_MAC_ADDRESS=4 CONFIG_ESP_SYSTEM_PD_FLASH=y CONFIG_ESP32_DEEP_SLEEP_WAKEUP_DELAY=2000 CONFIG_ESP32_RTC_CLK_SRC_INT_RC=y CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC=y # CONFIG_ESP32_RTC_CLK_SRC_EXT_CRYS is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL is not set # CONFIG_ESP32_RTC_CLK_SRC_EXT_OSC is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC is not set # CONFIG_ESP32_RTC_CLK_SRC_INT_8MD256 is not set # CONFIG_ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256 is not set CONFIG_ESP32_RTC_CLK_CAL_CYCLES=1024 CONFIG_ESP32_PHY_CALIBRATION_AND_DATA_STORAGE=y # CONFIG_ESP32_PHY_INIT_DATA_IN_PARTITION is not set CONFIG_ESP32_PHY_MAX_WIFI_TX_POWER=18 CONFIG_ESP32_PHY_MAX_TX_POWER=18 CONFIG_REDUCE_PHY_TX_POWER=y CONFIG_ESP32_REDUCE_PHY_TX_POWER=y # CONFIG_SPIRAM_SUPPORT is not set # CONFIG_ESP32_SPIRAM_SUPPORT is not set # CONFIG_ESP32_DEFAULT_CPU_FREQ_80 is not set CONFIG_ESP32_DEFAULT_CPU_FREQ_160=y # CONFIG_ESP32_DEFAULT_CPU_FREQ_240 is not set CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ=160 CONFIG_TRACEMEM_RESERVE_DRAM=0x0 # CONFIG_ESP32_PANIC_PRINT_HALT is not set CONFIG_ESP32_PANIC_PRINT_REBOOT=y # CONFIG_ESP32_PANIC_SILENT_REBOOT is not set # CONFIG_ESP32_PANIC_GDBSTUB is not set CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 CONFIG_MAIN_TASK_STACK_SIZE=3584 # CONFIG_CONSOLE_UART_DEFAULT is not set CONFIG_CONSOLE_UART_CUSTOM=y # CONFIG_CONSOLE_UART_NONE is not set # CONFIG_ESP_CONSOLE_UART_NONE is not set CONFIG_CONSOLE_UART=y # CONFIG_CONSOLE_UART_CUSTOM_NUM_0 is not set CONFIG_CONSOLE_UART_CUSTOM_NUM_1=y CONFIG_CONSOLE_UART_NUM=1 CONFIG_CONSOLE_UART_TX_GPIO=4 CONFIG_CONSOLE_UART_RX_GPIO=35 CONFIG_CONSOLE_UART_BAUDRATE=115200 CONFIG_INT_WDT=y CONFIG_INT_WDT_TIMEOUT_MS=300 CONFIG_INT_WDT_CHECK_CPU1=y CONFIG_TASK_WDT=y # CONFIG_TASK_WDT_PANIC is not set CONFIG_TASK_WDT_TIMEOUT_S=5 CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y # CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set CONFIG_ESP32_DEBUG_OCDAWARE=y CONFIG_BROWNOUT_DET=y CONFIG_ESP32_BROWNOUT_DET=y CONFIG_BROWNOUT_DET_LVL_SEL_0=y CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_0=y # CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_1 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_2 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_3 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_4 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_5 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_6 is not set # CONFIG_BROWNOUT_DET_LVL_SEL_7 is not set # CONFIG_ESP32_BROWNOUT_DET_LVL_SEL_7 is not set CONFIG_BROWNOUT_DET_LVL=0 CONFIG_ESP32_BROWNOUT_DET_LVL=0 # CONFIG_DISABLE_BASIC_ROM_CONSOLE is not set CONFIG_IPC_TASK_STACK_SIZE=2048 CONFIG_TIMER_TASK_STACK_SIZE=3584 CONFIG_SW_COEXIST_ENABLE=y # CONFIG_ESP32_ENABLE_COREDUMP_TO_FLASH is not set # CONFIG_ESP32_ENABLE_COREDUMP_TO_UART is not set CONFIG_ESP32_ENABLE_COREDUMP_TO_NONE=y CONFIG_TIMER_TASK_PRIORITY=1 CONFIG_TIMER_TASK_STACK_DEPTH=2048 CONFIG_TIMER_QUEUE_LENGTH=10 # CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set # CONFIG_HAL_ASSERTION_SILIENT is not set # CONFIG_L2_TO_L3_COPY is not set CONFIG_ESP_GRATUITOUS_ARP=y CONFIG_GARP_TMR_INTERVAL=60 CONFIG_TCPIP_RECVMBOX_SIZE=32 CONFIG_TCP_MAXRTX=12 CONFIG_TCP_SYNMAXRTX=12 CONFIG_TCP_MSS=1440 CONFIG_TCP_MSL=60000 CONFIG_TCP_SND_BUF_DEFAULT=5760 CONFIG_TCP_WND_DEFAULT=5760 CONFIG_TCP_RECVMBOX_SIZE=6 CONFIG_TCP_QUEUE_OOSEQ=y CONFIG_TCP_OVERSIZE_MSS=y # CONFIG_TCP_OVERSIZE_QUARTER_MSS is not set # CONFIG_TCP_OVERSIZE_DISABLE is not set CONFIG_UDP_RECVMBOX_SIZE=6 CONFIG_TCPIP_TASK_STACK_SIZE=3072 CONFIG_TCPIP_TASK_AFFINITY_NO_AFFINITY=y # CONFIG_TCPIP_TASK_AFFINITY_CPU0 is not set # CONFIG_TCPIP_TASK_AFFINITY_CPU1 is not set CONFIG_TCPIP_TASK_AFFINITY=0x7FFFFFFF # CONFIG_PPP_SUPPORT is not set CONFIG_ESP32_TIME_SYSCALL_USE_RTC_HRT=y CONFIG_ESP32_TIME_SYSCALL_USE_RTC_FRC1=y # CONFIG_ESP32_TIME_SYSCALL_USE_RTC is not set # CONFIG_ESP32_TIME_SYSCALL_USE_HRT is not set # CONFIG_ESP32_TIME_SYSCALL_USE_FRC1 is not set # CONFIG_ESP32_TIME_SYSCALL_USE_NONE is not set CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 CONFIG_ESP32_PTHREAD_STACK_MIN=768 CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set # CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set # CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set # CONFIG_ESP32_ULP_COPROC_ENABLED is not set CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y CONFIG_SUPPORT_TERMIOS=y CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 # End of deprecated options ```

chipweinberger commented 2 years ago

there is a good debugging doc in the esp-idf vscode extension repo, if you haven't found it.

isthereafreeusername commented 2 years ago

Hi there, i think i got the same problem

I already posted at the ESP32.com forum: https://www.esp32.com/viewtopic.php?f=14&t=30217

vdm97 commented 2 years ago

Hi there, i think i got the same problem

I already posted at the ESP32.com forum: https://www.esp32.com/viewtopic.php?f=14&t=30217

Hi, the specific error code is different (yours is esp_algorithm.c:225 algorithm_run(): Failed to wait algorithm (-302)!, mine is esp_algorithm.c:203 algorithm_run(): Failed to start algorithm (-4)!) but the general error image is very similar indeed. The error appears when we add extra code and the error breaks JTAG.

there is a good debugging doc in the esp-idf vscode extension repo, if you haven't found it.

I investigated the error with more detailed debug output, but i lack the neccessary JTAG/OpenOCD knowledge to find a solution. I added the debug output of ESP-IDFv5.0-beta1 for someone who has the neccessary knowledge.

ESP-IDFv5.0-beta1 OpenOCD log

``` [OpenOCD] Open On-Chip Debugger v0.11.0-esp32-20220706 (2022-07-06-15:48) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html [OpenOCD] User : 3 6 opt[OpenOCD] ions.c:63 configuration_output_handler(): debug_level: 3 User : 4 6 options.c:63 configuration_output_handler(): Debug: 5 6 options.c:244 add_default_dirs(): bindir=/builds/idf/openocd-esp32/_build/../openocd-esp32/bin Debug: 6 7 options.c:245 add_default_dirs(): pkgdatadir=/builds/idf/openocd-esp32/_build/../op[OpenOCD] enocd-esp32/share/openocd Debug: 7 7 options.c:246 add_default_dirs(): exepath=c:/Users/xxx/esp/esp-idf-tools/tools/openocd-esp32/v0.11.0-esp32-20220706/openocd-esp32/bin Debug: 8 7 options.c:247 add_default_dirs(): bin2data=../share/openocd Debug: 9 7 configuration.c:44 add_script_search_dir(): adding c:\Users\xxx\esp\esp-idf-tools\tools\openocd-esp32\v0.11.0-esp32-20220706/openocd-esp32/share/openocd/scripts Debug: 10 8 configuration.c:44 add_script_search_dir():[OpenOCD] adding C:/Users/xxx/AppData/Roaming/OpenOCD Debug: 11 8 configuration.c:44 add_script_search_dir(): adding C:\Users\xxx/.config/openocd Debug: 12 8 configuration.c:44 add_script_search_dir(): adding C:\Users\xxx/.openocd Debug: 13 8 configuration.c:44 add_script_search_dir(): adding c:/Users/xxx/esp/es[OpenOCD] p-idf-tools/tools/openocd-esp32/v0.11.0-esp32-20220706/openocd-esp32/bin/../share/openocd/site Debug: 14 9 configuration.c:44 add_script_search_dir(): adding c:/Users/vde[OpenOCD] derer/esp/esp-idf-tools/tools/openocd-esp32/v0.11.0-esp32-20220706/openocd-esp32/bin/../share/openocd/scripts Debu[OpenOCD] g: 15 9 command.c:166 script_debug(): command - ocd_find interface/ftdi/esp32_devkitj_v1.cfg [OpenOCD] Debug: 16 10 configuration.c:99 find_file(): found c:\Users\xxx\esp\esp-idf-tools\tools\openocd-esp32\v0.11.0-e[OpenOCD] sp32-20220706/openocd-esp32/share/openocd/scripts/interface/ftdi/esp32_devkitj_v1.cfg [OpenOCD] Debug: 17[OpenOCD] 12 command.c:166 script_debug(): command - adapter driver ftdi Debug: 18 13 command.c:166 script_debug(): command - ftdi vid_pid 0x0403 0x6010 [OpenOCD] 0x0403 0x6014 Debug: 19 13 command.c:166 script_debug(): command - ftdi channel 0 Debug: 20 13 command.c:166 script_debug(): command - ftdi layout[OpenOCD] _init 0x0008 0xf00b Debug: 21 14 command.c:166 script_debug(): command - ftdi layout_signal LED -data 0x1000 Debug: 22 14 command.c:166 script_debug(): command - ftdi layout_signal LED2 -data 0x2000 Debug: 23 14 c[OpenOCD] ommand.c:166 script_debug(): command - ftdi layout_signal LED3 -data 0x4000 Debug: 24 14 command.c:166 script_debug(): command - ftdi layout_signal LED4 -data 0x8000 Debug: 25 14 command.c:166 script_debug(): comman[OpenOCD] d - adapter speed 20000 Debug: 26 15 adapter.c:180 adapter_config_khz(): han[OpenOCD] dle adapter khz Debug: 27 15 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific spee[OpenOCD] d value Debug: 28 15 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value User : 29 15 options.c:63 configuration_output_handler(): adapter [OpenOCD] speed: 20000 kHz User : 30 15 options.c:63 configuration_output_handler(): Debug: 31 15 command.c:166 script_debug(): command - ocd_find target/esp32.cfg Debug: 32 15 configuration.c:99[OpenOCD] find_file(): found c:\Users\xxx\esp\esp-idf-tools\tools\openocd-esp32\v0.11.0-esp32-20220706/openocd-esp32/share/openocd/scripts/target/esp32.cfg [OpenOCD] Debug: 33 16 command.c:166 script_debug(): command - transport selec[OpenOCD] t jtag Debug: 34 16 command.c:166 script_debug(): command - ocd_find tar[OpenOCD] get/esp_common.cfg Debug: 35 17 configuration.c:99 find[OpenOCD] _file(): found c:\Users\xxx\esp\esp-idf-tools\tools\openocd-esp32\v0.11.0-esp32-20220706/openocd-esp32/share/openocd/scripts/t[OpenOCD] arget/esp_common.cfg [OpenOCD] Debug: 36 17 command.c:166 script_debug(): command - add_help_text program_esp write an image[OpenOCD] to flash, address is only required for binary images. verify, reset, exit, compress, restore_clock are optional Debug: 37 18 command.c:166 script_debug(): command - add_usage_text program_esp [address] [verify] [reset] [exit] [compress] [no_clock_boost] [restore_clock] Debug: 38 18 command.c:166 script_debug(): command - add_help_text program_esp_bins write all the images at address specified in flasher_args.json generated while building idf project Debug: 39 18 command.c:166 script_debu[OpenOCD] g(): command - add_usage_text program_esp_bins flasher_args.json [verify] [reset] [exit] [compress] [no_clock_boost] [restore_clock] Debug: 40 19 command.c:166 script[OpenOCD] _debug(): command - add_help_text esp_get_mac Print MAC address of the chip. Use a `format` argument to return formatted MAC value Debug: 41 19 com[OpenOCD] mand.c:166 script_debug(): command - add_usage_text esp_get_mac [format] Debug: 42 19 command.c:166 script_[OpenOCD] debug(): command - jtag newtap esp32 cpu0 -irlen 5 -expected-id 0x120034e5 Debug: 43 19 tcl.c:569 jim_newtap_cmd(): Creating New Tap, Chip: esp32, Tap: cpu0, Dotted: esp32.cpu0, 4 params Debug: 44 20 tcl[OpenOCD] .c:593 jim_newtap_cmd(): Processing option: -irlen Debug: 45 20 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id Debug: 46 20 core.c:1472 jtag_tap_init(): Created Tap: esp32.cpu0 @ abs position 0, irlen 5, capture: 0x1[OpenOCD] mask: 0x3 Debug: 47 20 command.c:166 script_debug(): command - jtag newtap esp32 cpu1 -irlen 5 -expected-id 0x120034e5 Debug: 48 20 tcl.c:569 jim_newtap_cmd(): Creating New Tap, Chip: esp32, Tap: cpu1, Dotte[OpenOCD] d: esp32.cpu1, 4 params Debug: 49 21 tcl.c:593 jim_newtap_cmd(): Processing option: -irlen Debug: 50 21 tcl.c:593 jim_newtap_cmd(): Processing option: -expected-id Debug: 51 21 core.c:1472 jtag_tap_init(): Created Tap[OpenOCD] : esp32.cpu1 @ abs position 1, irlen 5, capture: 0x1 mask: 0x3 Debug: 52 21 command.c:166 script_debug(): command - target create esp32.cpu0 esp32 -endian little -chain-position esp32.cpu0 -coreid 0 -[OpenOCD] rtos FreeRTOS Debug: 53 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 54 22 target.c:2239 target_free_all_working_areas_restore(): freeing all working ar[OpenOCD] eas Debug: 55 22 FreeRTOS.c:1387 freertos_create(): freertos_create Debug: 56 22 command.c:300 register_command(): command 'esp' is already registered Debug: 57 22 command.c:300 [OpenOCD] register_command(): command 'esp32' is already registered Debug: 58 23 command.c:300 register_command(): command 'esp32' is already registered Debug: 59 23 command.c:300 re[OpenOCD] gister_command(): command 'esp32' is already registered Debug: 60 23 command.c:300 register_command(): command 'esp32' is already registered Debug: 61 23 command.c:300 register_command(): command 'esp32' is alre[OpenOCD] ady registered Debug: 62 23 command.c:300 register_command(): command 'esp32 flashbootstrap' is already registered Debug: 63 24[OpenOCD] command.c:300 register_command(): command 'esp32.cpu0 esp' is already registered Debug: 64 24 command.c:300 register_command(): command 'esp32.cpu0 esp32' is already registered Debug: [OpenOCD] 65 24 command.c:300 register_command(): command 'esp32.cpu0 esp32' is already registered Debug: 66 24 command.c:300 register_command(): command 'esp32.cpu0 esp32' is already registered Debug: 67 25 command.c[OpenOCD] :300 register_command(): command 'esp32.cpu0 esp32' is already registered Debug: 68 25 command.c:300 register_command(): command 'esp32.cpu0 esp32' is already registered Debug: 69 25 command.c:300 register_command(): comman[OpenOCD] d 'esp32.cpu0 esp32 flashbootstrap' is already registered Debug: 70 26 command.c:166 script_debug(): command - esp32.cpu0 configure -work-area-phys 0x40090000 -work-area-virt 0x40090000 -work-area-size 0x4000 -work-are[OpenOCD] a-backup 1 Debug: 71 26 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 72 26 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 73 26 tar[OpenOCD] get.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 74 26 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 75 26 command.c:166 script_debug(): command [OpenOCD] - esp32.cpu0 configure -alt-work-area-phys 0x3FFC0000 -alt-work-area-virt 0x3FFC0000 -alt-work-area-size 0x18000 -alt-work-area-backup 1 Debug: 76 27 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 77 27 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 78 27 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 79 27 target.c:2239 target_free_a[OpenOCD] ll_working_areas_restore(): freeing all working areas Debug: 80 28 command.c:166 script_debug(): command - flash bank esp32.cpu0.flash esp32 0x0 0 0 0 esp32.cpu0 Debug: 81 28 command.c:300 regi[OpenOCD] ster_command(): command 'esp' is already registered Debug: 82 28 command.c:300 register_command(): command 'esp32' is already registered Debug: 83 28 tcl.c:1316 handle_flash_bank_command[OpenOCD] (): 'esp32' driver usage field missing Debug: 84 29 command.c:166 script_debug(): command - flash bank esp32.cpu0.irom esp32 0x0 0 0 0 esp32.cpu0 Debug: 85 29 command.c:300 register_command(): command 'esp'[OpenOCD] is already registered Debug: 86 29 command.c:300 register_command(): command 'esp appimage_offset' is already registered Debug: 87 29 command.c:300 register_command(): command 'esp compression' is already registered Debug: 88[OpenOCD] 29 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered Debug: 89 30 command.c:300 register_command(): command 'esp flash_stub_clock[OpenOCD] _boost' is already registered Debug: 90 30 command.c:300 register_command(): command 'esp32' is already registered Debug: 91 30 command.c:300 regis[OpenOCD] ter_command(): command 'esp32 appimage_offset' is already registered Debug: 92 30 command.c:300 register_command(): command 'esp32 compression' is alread[OpenOCD] y registered Debug: 93 30 command.c:300 register_command(): command 'esp32 verify_bank_hash' is already registered Debug: 94 31 command.c:30[OpenOCD] 0 register_command(): command 'esp32 flash_stub_clock_boost' is already registered Debug: 95 31 tcl.c:1316 handle_flash_bank_command(): 'esp32' driver[OpenOCD] usage field missing Debug: 96 31 command.c:166 script_debug(): command - flash bank esp32.cpu0.drom esp32 0x0 0 0 0 esp32.cpu0 Debug:[OpenOCD] 97 31 command.c:300 register_command(): command 'esp' is already registered Debug: 98 31 command.c:300 register_command(): command 'esp appim[OpenOCD] age_offset' is already registered Debug: 99 31 command.c:300 register_command(): command 'esp compression' is already registered Debug: 100 [OpenOCD] 32 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered Debug: 101 32 command.c:300 register_command(): co[OpenOCD] mmand 'esp flash_stub_clock_boost' is already registered Debug: 102 32 command.c:300 register_command(): command 'esp32' is already re[OpenOCD] gistered Debug: 103 33 command.c:300 register_command(): command 'esp32 appimage_offset' is already registered Debug: 104 33 command.c:300[OpenOCD] register_command(): command 'esp32 compression' is already registered Debug: 105 33 command.c:300 register_command(): command 'esp32 ve[OpenOCD] rify_bank_hash' is already registered Debug: 106 33 command.c:300 register_command(): command 'esp32 flash_stub_clock_boost' is alread[OpenOCD] y registered Debug: 107 33 tcl.c:1316 handle_flash_bank_command(): 'esp32' driver usage field missing Deb[OpenOCD] ug: 108 33 command.c:166 script_debug(): command - target create esp32.cpu1 esp32 -endian little -chain-position esp32.cpu1 -coreid 1 -rto[OpenOCD] s FreeRTOS Debug: 109 34 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 110 34 target.c:2[OpenOCD] 239 target_free_all_working_areas_restore(): freeing all working areas Debug: 111 34 FreeRTOS.c:1387 freertos_create(): freertos_create [OpenOCD] Debug: 112 34 command.c:300 register_command(): command 'xtensa' is already registered Debug: 113 34 command.c:300 register_c[OpenOCD] ommand(): command 'xtensa set_permissive' is already registered Debug: 114 35 command.c:300 register_comman[OpenOCD] d(): command 'xtensa maskisr' is already registered Debug: 115 35 command.c:300 register_command(): command 'xtensa smpbreak' is already registered Debug: 116 35 command.c:300 register_command(): comman[OpenOCD] d 'xtensa perfmon_enable' is already registered Debug: 117 35 command.c:300 register_command(): command 'xtensa perfmon_dump' is already registered Debug: 118 35 command.c:300 register_command(): command 'xtensa tracestart' is already registered Debug: 119 36 command.c:300 register_command(): command 'xtensa tracestop' is already registered Debug: 120 36 command.c:300 register_command(): command 'xtensa tracedump' is already registered Debug: 121 36 command.c:300 [OpenOCD] register_command(): command 'esp' is already registered Debug: 122 36 command.c:300 register_command(): command 'esp semihost_basedir' is already registered Debug: 123 36 command.c:300 register_command(): command 'esp' is already registered Debug: 124 37 com[OpenOCD] mand.c:300 register_command(): command 'esp apptrace' is already registered Debug: 125 37 command.c:300 register_command(): command 'esp sysview' is already registered De[OpenOCD] bug: 126 37 command.c:300 register_command(): command 'esp sysview_mcore' is already registered Debug: 127 37 command.c:300 register_command(): com[OpenOCD] mand 'esp gcov' is already registered Debug: 128 38 command.c:300 register_command(): command 'esp32' is already registered Debug: 129 38 command.[OpenOCD] c:300 register_command(): command 'esp32 smp' is already registered Debug: 130 38 command.c:300 register_command(): command 'esp32 smp_gdb' is already registered Debug: 131 38 command[OpenOCD] .c:300 register_command(): command 'esp32' is already registered Debug: 132 39 command.c:300 register_command(): command 'esp32 flashbootstrap[OpenOCD] ' is already registered Debug: 133 39 command.c:300 register_command(): command 'arm' is already registered Debug: 134 39 command.c:300 regi[OpenOCD] ster_command(): command 'arm semihosting' is already registered Debug: 135 39 command.c:300 register_command(): command 'arm semihosting_redi[OpenOCD] rect' is already registered Debug: 136 40 command.c:300 register_command(): command 'arm semihosting_cmdline' is already regis[OpenOCD] tered Debug: 137 40 command.c:300 register_command(): command 'arm semihosting_fileio' is already registered Debug: 138 40 command.c:[OpenOCD] 300 register_command(): command 'arm semihosting_resexit' is already registered Debug: 139 40 command.c:300 register_command(): command 'arm [OpenOCD] semihosting_read_user_param' is already registered Debug: 140 41 command.c:300 register_command(): command 'arm semihosting_basedir' i[OpenOCD] s already registered Debug: 141 41 command.c:300 register_command(): command 'esp32' is already registered Debug: 142 41 command.c:[OpenOCD] 300 register_command(): command 'esp32 set_permissive' is already registered Debug: 143 41 command.c:300 regi[OpenOCD] ster_command(): command 'esp32 maskisr' is already registered Debug: 144 41 command.c:300 register_command(): command 'esp32 smpbreak' is[OpenOCD] already registered Debug: 145 42 command.c:300 register_command(): command 'esp32 perfmon_enable' is already registered Debug: 146 42 co[OpenOCD] mmand.c:300 register_command(): command 'esp32 perfmon_dump' is already registered Debug: 147 42 command.c:300 register_command(): command 'es[OpenOCD] p32 tracestart' is already registered Debug: 148 43 command.c:300 register_command(): comman[OpenOCD] d 'esp32 tracestop' is already registered Debug: 149 43 command.c:300 register_command(): command 'esp32 tracedump' is already regis[OpenOCD] tered Debug: 150 43 command.c:300 register_command(): command 'esp32' is already registered Debug: 151 43 command.c:300 register_comm[OpenOCD] and(): command 'esp32 semihost_basedir' is already registered Debug: 152 44 command.c:300 register_command(): command 'esp32' is already re[OpenOCD] gistered Debug: 153 44 command.c:300 register_command(): command 'esp32 apptrace' is already registered Debug: 154 44 command.c:300 register_command(): command 'esp32 s[OpenOCD] ysview' is already registered Debug: 155 45 command.c:300 register_command(): command 'esp32 sysview_mcore' is already registered Debug: 156 [OpenOCD] 45 command.c:300 register_command(): command 'esp32 gcov' is already registered Debug: 157 45 command.c:300 register_command(): command 'esp32' is already registered Debug: 158 45 command.c:300 register_command(): command 'esp32 flashbootstrap' is already registered Debug: 159 46 command.c:[OpenOCD] 300 register_command(): command 'esp32.cpu1 esp' is already registered Debug: 160 46 command.c:300 register_command(): command 'esp32.cpu1 esp32'[OpenOCD] is already registered Debug: 161 47 command.c:300 register_command(): com[OpenOCD] mand 'esp32.cpu1 esp32' is already registered Debug: 162 47 command.c:300 register_command(): comman[OpenOCD] d 'esp32.cpu1 esp32' is already registered Debug: 163 47 command.c:300 register_command(): command 'esp32.cpu1 esp32' i[OpenOCD] s already registered Debug: 164 48 command.c:300 register_command(): command 'esp32.cpu1 esp32' is already registered Debug: 165[OpenOCD] 48 command.c:300 register_command(): command 'esp32.cpu1 esp32 flashbootstrap' is already registered Debug: 166 48[OpenOCD] command.c:166 script_debug(): command - flash bank esp32.cpu1.flash esp32 0x0 0 0 0 esp32.cpu1 Debug: 167 49 command.c:300 regist[OpenOCD] er_command(): command 'esp' is already registered Debug: 168 49 command.c:300 register_command(): command 'esp appimage_offset' is already registered [OpenOCD] Debug: 169 49 command.c:300 register_command(): command 'esp compression' is already registered Debug: 170 50 command.c:300 register_command([OpenOCD] ): command 'esp verify_bank_hash' is already registered Debug: 171 50 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is alrea[OpenOCD] dy registered Debug: 172 50 command.c:300 register_command(): command 'esp32' is already registered Debug: 173 51 command.c:300 registe[OpenOCD] r_command(): command 'esp32 appimage_offset' is already registered Debug: 174 51 command.c:300 register_command(): command 'esp32 compression' i[OpenOCD] s already registered Debug: 175 51 command.c:300 register_command(): command 'esp32 verify_bank_hash' is already registered Debug[OpenOCD] : 176 51 command.c:300 register_command(): command 'esp32 flash_stub_clock_boost' is already registered Debug: 177 52 tcl.c:1316 handle_flash_bank_command(): 'esp32' driver usage fie[OpenOCD] ld missing Debug: 178 52 command.c:166 script_debug(): command - flash bank esp32.cpu1.irom esp32 0x0 0 0 0 esp32.cpu1 Debug: 179 52 [OpenOCD] command.c:300 register_command(): command 'esp' is already registered Debug: 180 53 command.c:300 register_command(): command 'esp appim[OpenOCD] age_offset' is already registered Debug: 181 53 command.c:300 register_command(): command 'esp compression' is already registered Debug: 182 53 command.c:300 register_co[OpenOCD] mmand(): command 'esp verify_bank_hash' is already registered Debug: 183 54 command.c:300 register_command(): command 'esp flash_stub_clock_boost' is already registered Debug: 184 54 command.c:300 register_command()[OpenOCD] : command 'esp32' is already registered Debug: 185 54 command.c:300 register_command(): command 'esp32 appimage_offset' is already registered Debug: 186 54 command.c:300 register_command(): command 'esp32 compression' is already r[OpenOCD] egistered Debug: 187 55 command.c:300 register_command(): command 'esp32 verify_bank_hash' is already registered Debug: 188 55 command.c:300 register_command(): command 'esp32 flash_stub_clock_boost' is already registe[OpenOCD] red Debug: 189 55 tcl.c:1316 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 190 55 command.c:166 script_debug(): command - flash bank esp32.cpu1.drom esp32 0x0 0 0 0 esp32.cpu1 [OpenOCD] Debug: 191 56 command.c:300 register_command(): command 'esp' is already registered Debug: 192 56 command.c:300 register_command(): command 'esp appimage_offset' is already registered Debug: 193 56 command.c:300[OpenOCD] register_command(): command 'esp compression' is already registered Debug: 194 56 command.c:300 register_command(): command 'esp verify_bank_hash' is already registered Debug: 195 56 command.c:300 register_command(): command 'es[OpenOCD] p flash_stub_clock_boost' is already registered Debug: 196 57 command.c:300 register_command(): command 'esp32' is already registered Debug: 197 57 command.c:300 register_command(): command 'esp32 appimage_offset' is already registered Debug: 198 57 command.c:300 register_command(): command 'esp32 compression' is already registered Debug: 199 57 command.c:300 register_command(): command 'esp32 verify_bank_hash' is already registere[OpenOCD] d Debug: 200 57 command.c:300 register_command(): command 'esp32 flash_stub_clock_boost' is already registered Debug: 201 58 tcl.c:1316 handle_flash_bank_command(): 'esp32' driver usage field missing Debug: 202 58 command.c:166 script_[OpenOCD] debug(): command - target smp esp32.cpu0 esp32.cpu1 Debug: 203 58 target.c:6562 jim_target_smp(): 3 Debug: 204 58 target.c:6579 jim_target_smp(): esp32.cpu0 Debug: 205 58 target.c:6579 jim_target_smp(): esp32.cpu1 Debug: 206 58 c[OpenOCD] ommand.c:166 script_debug(): command - esp32.cpu0 esp32 flashbootstrap 3.3 Debug: 207 59 command.c:166 script_debug(): command - esp32.cpu0 xtensa maskisr on Debug: 208 59 command.c:166 script_debug(): command - es[OpenOCD] p32.cpu0 xtensa smpbreak BreakIn BreakOut Debug: 209 59 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=1 Debug: 210 59 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu1] set smpbreak=30000, state=1 Debug: 21[OpenOCD] 1 59 command.c:166 script_debug(): command - esp32.cpu0 configure -event reset-assert-post soft_reset_halt Debug: 212 60 command.c:166 script_debug(): command - esp32.cpu0 configure -event gdb-attach $_TARGETNAME_0 xtensa s[OpenOCD] mpbreak BreakIn BreakOut # necessary to auto-probe flash bank when GDB is connected halt 1000 Debug: 213 60 command.c:166 script_debu[OpenOCD] g(): command - esp32.cpu1 configure -event gdb-attach $_TARGETNAME_1 xtensa smpbreak BreakIn BreakOut # necessary t[OpenOCD] o auto-probe flash bank when GDB is connected halt 1000 Debug: 214 61 command.c:166 scr[OpenOCD] ipt_debug(): command - esp32.cpu1 configure -event reset-assert-post soft_reset_halt [OpenOCD] Debug: 215 61 command.c:166 script_debug(): command - esp32.cpu0 configure -event examine-end # Need to enable to set 'semihosting_basedir' arm semihosting[OpenOCD] enable arm semihosting_resexit enable if { [info exists _SEMIHOST_BASEDIR] } { if { $_SEMIHOST_BASEDIR != "" } { arm semihosting_based[OpenOCD] ir $_SEMIHOST_BASEDIR } } Debug: 216 62 command.c:166 script_debug(): command - esp32.cpu1 configure -event examine-e[OpenOCD] nd # Need to enable to set 'semihosting_basedir' arm semihosting enable arm semihosting_resexit enable if { [info exists _SEMIHOST_BASE[OpenOCD] DIR] } { if { $_SEMIHOST_BASEDIR != "" } { arm semihosting_basedir $_SEMIHOST_BASEDIR } } Debug: 217 63 command.c[OpenOCD] :166 script_debug(): command - add_help_text program_esp32 write an image to flash, address is only required for binary images. verify, res[OpenOCD] et, exit are optional Debug: 218 63 command.c:166 script_debug(): command - add_usage_text program_esp32 [address] [[OpenOCD] verify] [reset] [exit] [OpenOCD] Info : 219[OpenOCD] 65 server.c:303 add_service(): Listening on port 6666 for tcl connections Info[OpenOCD] : 220 65 server.c:303 add_service(): Listening on port 4444 for telnet connections Debug: 221 65 comman[OpenOCD] d.c:166 script_debug(): command - init Debug: 222 65 command.c:166 script_debug(): command - targe[OpenOCD] t init Debug: 223 66 command.c:166 script_debug(): command - target names [OpenOCD] Debug: 224 66 command.c:166 script_debug(): command - esp32.cpu0 cget -event gdb-flash-erase-start Debug: 225 66 command.c:16[OpenOCD] 6 script_debug(): command - esp32.cpu0 configure -event gdb-flash-erase-start reset init Debug: 226 67 command.c:166 script_debug(): command - esp32.cpu0 cget -event gdb-flash-write-end Debug: 227 67 command.c:166 script_debug(): command - esp32.cpu0 configure -event gdb-flash-write-end reset halt Debug: 228 67 command.c:166 script_debug(): command - esp32.cpu0 cget -ev[OpenOCD] ent gdb-attach Debug: 229 67 command.c:166 script_debug(): command - esp32.cpu1 cget -event gdb-flash-erase-start Debug: 230 68 command.c:166 script_debug(): command - esp32.cpu1 configure -event gd[OpenOCD] b-flash-erase-start reset init Debug: 231 68 command.c:166 script_debug(): command - esp32.cpu1 cget -event gdb-flash-write-end Debug: 232 68 com[OpenOCD] mand.c:166 script_debug(): command - esp32.cpu1 configure -event gdb-flash-write-end reset halt Debug: 233 69 command.c:166 script_debug(): command - esp32.cpu1 cget -event gdb-att[OpenOCD] ach Debug: 234 69 target.c:1672 handle_target_init_command(): Initializing targets... Debug: 235 69 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'litbase' (152) does not exist Debug: 236 69 xtensa.c:2292 xtensa_[OpenOCD] build_reg_cache(): Special reg 'ptevaddr' (153) does not exist Debug: 237 70 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'rasid' (154) does not exist Debug: [OpenOCD] 238 70 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'itlbcfg' (155) does not exist Debug: 239 70 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'dt[OpenOCD] lbcfg' (156) does not exist Debug: 240 70 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mepc' (157) does not exist Debug: 241 70 xtensa.c:2292 [OpenOCD] xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist Debug: 242 71 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesave' (159) do[OpenOCD] es not exist Debug: 243 71 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesr' (160) does not exist Debug: 244 71 xtensa.c:2292 xtensa[OpenOCD] _build_reg_cache(): Special reg 'mecr' (161) does not exist Debug: 245 71 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mevaddr' (162[OpenOCD] ) does not exist Debug: 246 71 semihosting_common.c:118 semihosting_common_init(): Debug: 247 71 semihosting_commo[OpenOCD] n.c:118 semihosting_common_init(): Debug: 248 72 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'litbase' (152) [OpenOCD] does not exist Debug: 249 72 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'ptevaddr' (153) does not exist Debug: 250 72 xtensa.c:2292 x[OpenOCD] tensa_build_reg_cache(): Special reg 'rasid' (154) does not exist Debug: 251 72 xtensa.c:2292 xtensa_b[OpenOCD] uild_reg_cache(): Special reg 'itlbcfg' (155) does not exist Debug: 252 73 xtensa.c:2292 xtensa_b[OpenOCD] uild_reg_cache(): Special reg 'dtlbcfg' (156) does not exist Debug: 253 73 xtensa.c:2292 xtensa_build_reg_cache([OpenOCD] ): Special reg 'mepc' (157) does not exist Debug: 254 73 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'meps' (158) does not exist De[OpenOCD] bug: 255 74 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mesave' (159) does not exist Debug: 256 74 xtensa.c:2292 xtensa_build_reg_cache():[OpenOCD] Special reg 'mesr' (160) does not exist Debug: 257 74 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mecr' (161) does not exist Debug: [OpenOCD] 258 74 xtensa.c:2292 xtensa_build_reg_cache(): Special reg 'mevaddr' (162) does not exist Debug: 259 74 semiho[OpenOCD] sting_common.c:118 semihosting_common_init(): Debug: 260 74 semihosting_common.c:118 semihosting_common_init(): [OpenOCD] Debug: 261 74 ftdi.c:665 ftdi_initialize(): ftdi interface using shortest path jtag state transitions [OpenOCD] Debug: 262 114 m[OpenOCD] psse.c:423 mpsse_purge(): - [OpenOCD] Debug: 2[OpenOCD] 63 116 mpsse.c:704 mpsse_loopback_config(): off Debug: 264 116 mpsse.c:749 mpsse_set_frequency(): target 20000000 Hz Debug: 265 116 mpsse.c:741 mpsse_rtck_config(): off Debug: 266[OpenOCD] 116 mpsse.c:730 mpsse_divide_by_5_config(): off Debug: 267 116 mpsse.c:710 mpsse_set_divisor(): 1 Debug: 268 116 mpsse.c:773 mpsse_set_frequency(): actually 15000000 Hz [OpenOCD] Debug: [OpenOCD] 269 117 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 270 117 adapter.c:148 adapter_khz_to_speed(): have adapter set up Debug: 271 118 mpsse.c:749 mpsse_set_frequency(): target 20000000 Hz Debug: 272 118 mpsse.c:[OpenOCD] 741 mpsse_rtck_config(): off Debug: 273 118 mpsse.c:730 mpsse_divide_by_5_config(): off Debug: 274 118 mpsse.c:710 mpsse_set_divisor(): 1 Debug: 275 118 mpsse.c:773 mpsse_set_frequency[OpenOCD] (): actually 15000000 Hz Info : 276 119 ftdi.c:291 ftdi_speed(): ftdi: if you experience problems at higher adapter clocks, try the command "ftdi tdo_sample_e[OpenOCD] dge falling" Debug: 277 119 adapter.c:144 adapter_khz_to_speed(): convert khz to adapter specific speed value Debug: 278 119 adapter.c:148 adapter_khz_to_speed(): have adap[OpenOCD] ter set up Info : 279 120 adapter.c:108 adapter_init(): clock speed 20000 kHz Debug: 280 120 openocd.c:143 handle_init_command(): Debug Ad[OpenOCD] apter init complete Debug: 281 120 command.c:166 script_debug(): command - transport init Debug: 282 120 transport.c:230 handle_transport_init([OpenOCD] ): handle_transport_init [OpenOCD] Debug:[OpenOCD] 283 121 core.c:824 jtag_add_reset(): SRST line released Debug: 284 121 core.c:849 jtag_add_reset(): TRST[OpenOCD] line released Debug: 285 121 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset [OpenOCD] Debug: 286[OpenOCD] 122 command.c:166 script_debug(): command - jtag arp_init Debug: 287 122 core.c:1503 jtag_init_inner(): Init JTAG chain Debug: 288 123 core.c:322 jtag_c[OpenOCD] all_event_callbacks(): jtag event: TAP reset Debug: 289 123 core.c:1228 jtag_examine_chain(): [OpenOCD] DR scan interrogation for IDCODE/BYPASS Debug: 290 123 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset [OpenOCD] Info : 291 124 core.c:1127 jtag_examine_chain_display(): JTAG tap: esp32.cpu0 tap/device found: 0x1[OpenOCD] 20034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : 292 124 core.c:1127 jtag_examine_chain_display(): JTAG tap: esp32.cpu1 tap/device found: 0x120[OpenOCD] 034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Debug: 293 125 core.c:1358 jtag_validate_ircapture(): IR capture validation scan Debug: 294 125 core.c:1416 jtag_validate_ircapture(): esp32.cpu0[OpenOCD] : IR capture 0x01 Debug: 295 126 core.c:1416 jtag_validate_ircapture(): esp32.cpu1: IR capture 0x01 Debug: 296 126 command.c:166 script_debug(): command - dap init [OpenOCD] Debug: 297 126 arm_dap.c:109 dap_init_all(): Initializing all DAPs ... Debug: 298 126 openocd.c:160 handle_init_command(): Examining targets... [OpenOCD] Debug: 299 127 target.c:1860 target_call_event_callbacks(): target event 19 (examine-start) for core esp32.cpu0 Debug: 300 127 esp32.c:508 esp32_handle_targe[OpenOCD] t_event(): 19 Debug: 301 127 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 19 Debug: 302 127 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 19 Debug: 303 127 xtensa.c:2392 xtensa_handle_target_event(): 19 Debug: 304 128 xtensa.c:737 xtensa_examine(): coreid = 0 [OpenOCD] Debug: 305[OpenOCD] 128 xtensa.c:749 xtensa_examine(): OCD_ID = 0733bff2 Debug: 306 128 target.c:1860 target_call_event_callbacks(): target event 21 (examine-end) for core esp32.cpu0 [OpenOCD] Debug: 307 129 target.c:5153 target_handle_event(): target(0): esp32.cpu0 (esp32) event: 21 (examine-end) action: # Need to enable to set 'semihosting_bas[OpenOCD] edir' arm semihosting enable arm semihosting_resexit enable if { [info exists _SEMIHOST_BASEDIR] } { if { $_SEMIHOST_BASEDIR != "[OpenOCD] " } { arm semihosting_basedir $_SEMIHOST_BASEDIR } } Debug: 308 130 command.c:166 script_debug(): comman[OpenOCD] d - arm semihosting enable [OpenOCD] Info :[OpenOCD] 309 131 xtensa.c:1754 xtensa_poll(): [esp32.cpu0] Debug controller was reset. Debug: 310 131 xtensa.c:776 xtensa_smpbreak[OpenOCD] _write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Info :[OpenOCD] 311 132 xtensa.c:1760 xtensa_poll(): [esp32.cpu0] Core was reset. [OpenOCD] Debug:[OpenOCD] 312 133 esp_xtensa.c:161 esp_xtensa_poll(): esp32.cpu0: Clear debug stubs info [OpenOCD] Debug[OpenOCD] : 313 134 esp_xtensa_smp.c:176 esp_xtensa_smp_poll(): [esp32.cpu0] Check for unexamined cores after reset Debug:[OpenOCD] 314 134 target.c:1860 target_call_event_callbacks(): target event 19 (examine-start) for core esp32.cpu1 Debug: 315 134 esp32.c:508 esp32_handle_target_event(): 19 Debug: 316 135 esp_xtensa_smp.c:608 esp_xtensa_s[OpenOCD] mp_handle_target_event(): 19 Debug: 317 135 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 19 Debug: 318 135 xtensa.c:2392 xtensa_handle_target_event(): 19 Debug: 31[OpenOCD] 9 135 xtensa.c:737 xtensa_examine(): coreid = 1 [OpenOCD] Debug: 3[OpenOCD] 20 136 xtensa.c:749 xtensa_examine(): OCD_ID = 0733bff2 Debug: 321 137 target.c:1860 target_call_event_callbacks(): target event 21 (examine-end) for core esp32.cpu1 Debug[OpenOCD] : 322 137 target.c:5153 target_handle_event(): target(1): esp32.cpu1 (esp32) event: 21 (examine-end) action: # Need to enable to set 'semihosting_basedir' [OpenOCD] arm semihosting enable arm semihosting_resexit enable if { [info exists _SEMIHOST_BASEDIR] } { if { $_SEMIHOST_BASEDIR != "" } { arm semihosting[OpenOCD] _basedir $_SEMIHOST_BASEDIR } } Debug: 323 138 command.c:166 script_debug(): command - arm semihosting[OpenOCD] enable Debug: 324 138 esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32.cpu1] semihosting enable=1 Debug: 325 138 command.c:166 script_debug(): command - arm [OpenOCD] semihosting_resexit enable Debug: 326 139 command.c:166 script_debug(): command - arm semihosting_basedir . Debug: 327 139 esp32.c:5[OpenOCD] 08 esp32_handle_target_event(): 21 Debug: 328 139 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 21 Debug: 329 139 esp_xtensa.c:80 esp_xt[OpenOCD] ensa_handle_target_event(): 21 Debug: 330 139 xtensa.c:2392 xtensa_handle_target_event(): 21 Debug: 331 139 xtensa.c:776 xtensa_smpbreak_write(): [es[OpenOCD] p32.cpu1] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Info : 332 140 xtensa.c:1754 xtensa_poll(): [esp32.cpu1] [OpenOCD] Debug controller was reset. Debug: 333 140 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu1] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Info : 334 141 xtensa.c:1760 xtensa_poll(): [esp32.cpu1] Core was reset. [OpenOCD] Debug: 335 141 esp_xtensa.c:161 esp_xtensa_poll(): esp32.cpu1[OpenOCD] : Clear debug stubs info [OpenOCD] Debug: 3[OpenOCD] 36 143 esp_xtensa_smp.c:176 esp_xtensa_smp_poll(): [esp32.cpu1] Check for unexamined cores after reset Debug: 337 143 esp_xtensa_[OpenOCD] semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32.cpu0] semihosting enable=1 Debug: 338 143 command.c:166 script_debug(): command - arm semihostin[OpenOCD] g_resexit enable [OpenOCD] Debug: 339[OpenOCD] 145 command.c:166 script_debug(): command - arm semihosting_basedir . [OpenOCD] Debug: 34[OpenOCD] 0 147 esp32.c:508 esp32_handle_target_event(): 21 Debug: 341 147 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 21 Debug: 342 147 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 21 Debug: 343 147 xtens[OpenOCD] a.c:2392 xtensa_handle_target_event(): 21 Debug: 344 148 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Debug: [OpenOCD] 345 149 target.c:1860 target_call_event_callbacks(): target event 19 (examine-start) for core esp32.cpu1 Debug: 346 149 esp32.c:508 esp32_handle_[OpenOCD] target_event(): 19 Debug: 347 149 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 19 Debug: 348 149 esp_xtensa.c:80 es[OpenOCD] p_xtensa_handle_target_event(): 19 Debug: 349 149 xtensa.c:2392 xtensa_handle_target_event(): 19 Debug: 350 150 xtensa.c:737 xtensa_examine(): coreid = 1 [OpenOCD] Debug: 351 [OpenOCD] 151 xtensa.c:749 xtensa_examine(): OCD_ID = 0733bff2 Debug: 352 151 target.c:1860 target_call_event_callbacks(): target event 21 (examine-end) for core esp32.cpu1 Debug: 353 151 target.c:5153 target_handle[OpenOCD] _event(): target(1): esp32.cpu1 (esp32) event: 21 (examine-end) action: # Need to enable to set 'semihosting_basedir' arm semihosting enable arm semihosting_resexit enable if { [info exist[OpenOCD] s _SEMIHOST_BASEDIR] } { if { $_SEMIHOST_BASEDIR != "" } { arm semihosting_basedir $_SEMIHOST_BASEDIR } } Debug: 354 152 command.c:166 script_debug([OpenOCD] ): command - arm semihosting enable [OpenOCD] Debug: 355 155[OpenOCD] esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32.cpu1] semihosting enable=1 Debug: 356 156 command.c:166 script_debug(): command - arm semihosting_resexit enable [OpenOCD] Debug: 357 1[OpenOCD] 59 command.c:166 script_debug(): command - arm semihosting_basedir . [OpenOCD] Debug: 358 [OpenOCD] 162 esp32.c:508 esp32_handle_target_event(): 21 Debug: 359 162 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 21 Debug: 360 162 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 21 Debug: 361 162 xte[OpenOCD] nsa.c:2392 xtensa_handle_target_event(): 21 Debug: 362 162 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu1] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Debug: 3[OpenOCD] 63 164 command.c:166 script_debug(): command - flash init [OpenOCD] Debug: [OpenOCD] 364 166 tcl.c:1386 handle_flash_init_command(): Initializing flash devices... Debug[OpenOCD] : 365 166 command.c:166 script_debug(): command - nand init [OpenOCD] Debug: 36[OpenOCD] 6 170 tcl.c:498 handle_nand_init_command(): Initializing NAND [OpenOCD] devi[OpenOCD] ces... Debug: 367 172 command.c:166 script_debug(): command - pld init [OpenOCD] D[OpenOCD] ebug: 368 175 pld.c:205 handle_pld_init_command(): Initi[OpenOCD] alizing PLDs... Debug: 369 176 command.c:166 script_debug(): command - tpiu init [OpenOCD] Info : 370 179 gdb_server.c:3796 gdb_target_s[OpenOCD] tart(): starting gdb server for esp32.cpu0 on 3333 Info : 371 179 server.c:303 add_service(): Listening on port 3333 for gdb connections [OpenOCD] Info : 372 980 server.c:95 add_connection(): accepting 'tcl' connection on tcp/6666 Info : 373 981 server.c:577 server_loop(): dropped 'tcl' connection [OpenOCD] Info : 374[OpenOCD] 989 server.c:95 add_connection(): accepting 'tcl' connection on tcp/6666 [OpenOCD] Debug: 375 990 command.c:166 script_debug(): command - echo Flashing c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin at 0x1000 [OpenOCD] User : 376 1000 comma[OpenOCD] nd.c:696 handle_echo(): Flashing c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin at 0x1000 Debug: 377 1001 command.c:166 script_debug(): command - flash list [OpenOCD] Debug: 378 1010 [OpenOCD] command.c:166 script_debug(): command - init [OpenOCD] Debug: 379 [OpenOCD] 1016 command.c:166 script_debug(): command - reset init [OpenOCD] Debug: 380 10[OpenOCD] 25 target.c:1878 target_call_reset_callbacks(): target reset 3 (init) Debug: 381 1025 target.c:1878 target_call_reset_callbacks(): target reset 3 (init) Debug: 382 1026 command.c:166 script_debug(): command - expr [catch {ocd_process_reset_inner $MODE} result] == 0 [OpenOCD] Debug: 383 1027 command.c:166 script_debug(): command - target names Debug: 384 1027 command.c:166 script_debug(): command - esp32.cpu0 invoke-event reset-start Debug: 385 1028 command.c:166 script_debug(): command - esp32.cpu1 invoke-event reset-start Debug: 386 1028 com[OpenOCD] mand.c:166 script_debug(): command - transport select Debug: 387 1029 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 388 1029 command.c:166 script_debug(): command - jtag arp_init-reset Debug: 389 1029 core.c:1600 jtag_init_reset(): Initializing with hard TRST+SRST reset Debug: 390 1029 core.c:837 jtag_add_reset(): JTAG reset with TLR instead of TRST Debug: 391 1030 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 392 1031 [OpenOCD] core.c:1503 jtag_init_inner(): Init JTAG chain Debug: 393 1031 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset Debug: 394 1032 core.c:1228 jtag_examine_chain(): DR scan interrogati[OpenOCD] on for IDCODE/BYPASS Debug: 395 1033 core.c:322 jtag_call_event_callbacks(): jtag event: TAP reset [OpenOCD] Info : 396 1033 core.c:1127 jtag_examine_chain_display(): JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : 397 1034 core.c:1127 jtag_examine_chain_display(): JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 [OpenOCD] (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Debug: 398 1035 core.c:1358 jtag_validate_ircapture(): IR capture validation scan [OpenOCD] Debug: 399 1036 core.c:1416 jtag_validate_ircapture(): esp32.cpu0: IR capture 0x01 Debug: 400 1036 core.c:1416 jtag_validate_ircapture(): esp32.cpu1: IR capture 0x01 Debug: 401 1036 command.c:166 script_debug(): command - transport select[OpenOCD] Debug: 402 1036 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 403 1037 command.c:166 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 404 1037 command.c:166 script_debug(): command - jtag tapisenabled esp32.cpu[OpenOCD] 0 Debug: 405 1037 command.c:166 script_debug(): command - esp32.cpu0 invoke-event examine-start Debug: 406 1038 command.c:166 script_debug(): command - esp32.cpu0 arp_examine allow-defer Debug: 407 1038 xtensa.c:737 xtensa_examine(): coreid = 0 [OpenOCD] Debug: 408 1039 xtensa.c:749 xtensa_examine(): OCD_ID = 0733bff2 Debug: 409 1039 command.c:166 script_deb[OpenOCD] ug(): command - esp32.cpu0 invoke-event examine-end Debug: 410 1040 target.c:5153 target_handle_event(): target(0): esp32.cpu0 (esp32) event: 21 (examine-end) action: # Need to enable to set 'semihosting_basedir' arm semihosting enable arm semiho[OpenOCD] sting_resexit enable if { [info exists _SEMIHOST_BASEDIR] } { if { $_SEMIHOST_BASEDIR != "" } { arm semihosting_basedir $_SEMIHOST_BASEDIR } } Debug: 411 1041 command.c:166 script_debug(): command - arm semihosting enable Debug: 412 1041[OpenOCD] esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32.cpu0] semihosting enable=1 Debug: 413 1041 command.c:166 script_debug(): command - arm semihosting_resexit enable Debug: 414 1042 command.c:166 script_debug(): command - tran[OpenOCD] sport select Debug: 415 1042 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 416 1042 command.c:166 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 417 1042 command.c:166 script_deb[OpenOCD] ug(): command - jtag tapisenabled esp32.cpu1 Debug: 418 1043 command.c:166 script_debug(): command - esp32.cpu1 invoke-event examine-start Debug: 419 1043 command.c:166 script_debug(): command - esp32.cpu1 arp_examine allow-[OpenOCD] defer Debug: 420 1043 xtensa.c:737 xtensa_examine(): coreid = 1 Debug: 421 1044 xtensa.c:749 xtensa_examine(): OCD_ID = 0733bff2 Debug: 422 1045 command.c:166 script_debug(): command - esp32.cpu1 invoke-event examine-end Debug: 423 1045 target.c:5153 target_handle_event(): target(1): esp32.cpu1 (esp32) event: 21 (examine-end) action: # Need to enable to set 'semihosting_basedir' arm semihosting enable arm semihosting_resexit enable if { [info exists _SEMIHOST_BASEDIR] } { if { $_SEMIHOST_BASEDIR != "" } { arm semihosting_basedir $_SEMIHOST_BASEDIR } } Debug: 424 1046 command.c:166 script_debug(): command - arm semihosting enable Debug: 425 1046 esp_xtensa_semihosting.c:49 esp_xtensa_semihosting_setup(): [esp32.cpu1] semihosting enable=1 Debug: 426 1046 command.c:166 script_debug(): command - arm semihosting_resexit enable Debug: 427 1047 command.c:166 script_debug(): command - esp32.cpu0 invoke-event reset-assert-pre Debug: 428 1047 command.c:166 script_debug(): command - esp32.cpu1 invoke-event reset-assert-pre Debug: 429 1047 command.c:166 script_debug(): command - transport select Debug: 430 1047 command.c:166 script_debug(): command - expr [ string first "[OpenOCD] jtag" $_TRANSPORT ] != -1 Debug: 431 1048 command.c:166 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 432 1049 command.c:166 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 433 1049 command.c:166 script_debug(): command - esp32.cpu0 arp_reset assert 1 Debug: 434 1049 target[OpenOCD] .c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 435 1049 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 436 1050 command.c:166 script_debug(): command - transport select Debug: 437 1050 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 438 1050 command.c:166 script_debug(): command [OpenOCD] - esp32.cpu1 cget -chain-position Debug: 439 1050 command.c:166 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 440 1051 command.c:166 script_debug(): command - esp32.cpu1 arp_reset assert 1[OpenOCD] Debug: 441 1051 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 442 1051 target.c:2239 target_free_all_working_areas_restore(): freeing al[OpenOCD] l working areas Debug: 443 1051 command.c:166 script_debug(): command - esp32.cpu0 invoke-event reset-assert-post Debug: 444 1052 target.c:5153 target_handle_eve[OpenOCD] nt(): target(0): esp32.cpu0 (esp32) event: 12 (reset-assert-post) action: soft_reset_halt Debug: 445 1052 command.c:166 script_debug(): command[OpenOCD] - soft_reset_halt Info : 446 1052 target.c:3391 handle_soft_reset_halt_command(): [esp32.cpu0] requesting target halt and executing a soft reset Debug: 4[OpenOCD] 47 1052 esp_xtensa_smp.c:105 esp_xtensa_smp_soft_reset_halt(): [esp32.cpu0] begin Debug: 448 1053 esp32.c:327 esp32_soc_reset(): start Debug: 449 1053[OpenOCD] esp32.c:330 esp32_soc_reset(): Target not halted before SoC reset, trying to halt it first Debug: 450 1053 xtensa.c:1163 xtensa_halt():[OpenOCD] [esp32.cpu0] start Debug: 451 1054 xtensa.c:1174 xte[OpenOCD] nsa_halt(): [esp32.cpu0] Core status 0x80000000 [OpenOCD] Debug: 452 1055 xtensa.c:934 xtensa_f[OpenOCD] etch_all_regs(): [esp32.cpu0] start [OpenOCD] Debug: 453 1058 xtensa.c:8[OpenOCD] 33 xtensa_core_status_check(): [esp32.cpu0] DSR (80318411) [OpenOCD] Debug: 454 1061 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu[OpenOCD] 0] DSR (80318411) [OpenOCD] Debug: 455 1062 xtensa.c:833 xtensa_cor[OpenOCD] e_status_check(): [esp32.cpu0] DSR (80318411) Debug: 456 1063 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x4019B342, debug_reason=00000000, oldstate=00000001 Debug: 457 1063 xtensa.c:1812 xtensa_poll(): [esp32.[OpenOCD] cpu0] Halt reason=0x00000020, exc_cause=4, dsr=0x80318411 Info : 458 1063 xtensa.c:1814 xtensa_poll(): [esp32.cpu0] Target halted, PC=0x4019B342, debug_reason=00000000 [OpenOCD] Debug: 45[OpenOCD] 9 1065 esp_xtensa_smp.c:258 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Info : 460 1065 esp_xtensa_smp.c:263 esp_xtensa_smp_update_halt_gdb(): Set GDB target to 'esp32.cpu0' Debug: 461 1065 esp_xtensa_smp.c:272 esp_xt[OpenOCD] ensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 462 1065 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 463 1065 esp_xtensa_smp.c:286 es[OpenOCD] p_xtensa_smp_update_halt_gdb(): Poll target 'esp32.cpu1' [OpenOCD] Debug: 464 1066 xtensa.c:934 xtensa[OpenOCD] _fetch_all_regs(): [esp32.cpu1] start [OpenOCD] Debug: 465[OpenOCD] 1069 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (80108411) [OpenOCD] Debug: 466 1072 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (80108411) Debug: 467 1073 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (80108411) Debug: 468 1073 xtensa.c:1808 xtensa_poll(): [esp32.cpu1] Target halted, pc=0x40090B8E, debug_reason=00000000, oldstate=00000001 Debug: 469 1073 xtensa.c:1812 xtensa_poll(): [esp32.cpu1] Halt reason=0x00000020, exc_cause=4, dsr=0x80108411 Info : 470 1074 xtensa.c:1814 xtensa_poll(): [esp32.cpu1] Target halted, PC=0x40090B8E, debug_reason=00000000 Debug: 471 1075 target.c:1860 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu1 Debug: 472 1075 esp32.c:508 esp32_handle_target_event(): 0 Debug: 473 1075 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 0 Debug: 474 1075 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 0 Debug: 475 1075 xtensa.c:2392 xtensa_handle_target_event(): 0 Debug: 476 1075 target.c:1860 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu1 Debug: 477 1075 esp32.c:508 esp32_handle_target_event(): 1 Debug: 478 1075 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 1 Debug: 479 1076 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 1 Debug: 480 1076 xtensa.c:2392 xtensa_handle_target_event(): 1 Debug: 481 1076 targ[OpenOCD] et.c:2778 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 482 1078 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8000CC11) Debug: 483 1078 target.c:2778 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 484 1078 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8000CC11) Debug: 485 1078 target.c:2778 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 [OpenOCD] Debug: 486 1079 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8000CC11) Debug: 487 1079 target.c:2778 target_write_u32(): address: 0x3ff60048, value: 0x00000000 [OpenOCD] Debug: 488 1080 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8000CC11) Debug: 489 1080 target.c:2778 targe[OpenOCD] t_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 [OpenOCD] Debug: 490 1081 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8000CC11) Debug: 491 1081 target.c:2778 target_write_u32(): address[OpenOCD] : 0x3ff4808c, value: 0x00000000 Debug:[OpenOCD] 492 1082 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8000CC11) Debug: 493 1082 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Debug: 494 1082 target.c:1860 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu0 Debug: 49[OpenOCD] 5 1082 esp32.c:508 esp32_handle_target_event(): 0 Debug: 496 1083 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 0 Debug: 497 1083 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 0 Debug: 498 1083 xtensa.c:2392 xtensa_handle_target_event(): 0 Debug: 499 1083 target.c:1860 targe[OpenOCD] t_call_event_callbacks(): target event 1 (halted) for core esp32.cpu0 Debug: 500 1083 esp32.c:508 esp32_handle_target_event(): 1 Debug: 501 1083 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 1 Debug: 502 1083 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 1 Debug[OpenOCD] : 503 1083 xtensa.c:2392 xtensa_handle_target_event(): 1 Debug: 504 1084 target.c:2778 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 [OpenOCD] Debug: 505 1084 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 506 1084 target.c:2778 target_write_u32(): ad[OpenOCD] dress: 0x3ff5f048, value: 0x00000000 Deb[OpenOCD] ug: 507 1085 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 508 1085 target.c:2778 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 [OpenOCD] Debug: 509 1085 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 510 1086 target.c:2778 target_write_u32(): address: 0x3ff60048, value[OpenOCD] : 0x00000000 Debug: 5[OpenOCD] 11 1086 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 512 1086 target.c:2778 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 [OpenOCD] Debug: 513 1087 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 514 1087[OpenOCD] target.c:2778 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 [OpenOCD] Debug: 515 1088 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 516 1088 esp32.c:383[OpenOCD] esp32_soc_reset(): Loading stub code into RTC RAM Debug: 517 1088 target.c:2536 target_read_buffer(): reading buffer of 210 byte at 0x50000000 [OpenOCD] Debug: 518 1096 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 519 10[OpenOCD] 96 target.c:2471 target_write_buffer(): writing buffer of 210 byte at 0x50000000 [OpenOCD] Debug: 520 1097 xtensa.c:833 xt[OpenOCD] ensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) [OpenOCD] Debug: 521 1099 xtensa.c:833 xtensa_core_status_check(): [e[OpenOCD] sp32.cpu0] DSR (8000CC11) Debug: 522 1099 esp32.c:400 esp32_soc_reset(): Resuming the target Debug: 523 1099 xtensa.c:1267 xtensa_resume(): [esp32.cpu0] start Debug: 524 1099 xtensa.c:1200 xtensa_prepare_resume(): [esp32.cpu0] current=0 address=0x50000004, handle_breakpoints=0[OpenOCD] , debug_execution=0) Debug: 525 1100 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 526 1100 xtensa.c:585 xtensa_write_di[OpenOCD] rty_registers(): [esp32.cpu0] Writing back reg pc val 50000004 Debug: 527 1100 xtensa.c:701 xtensa_queue_write_dirty_user_regs_[OpenOCD] u32(): [esp32.cpu0] start Debug: 528 1101 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value 3FFFD384, n[OpenOCD] um =4 [OpenOCD] Debug: 529 1102 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 530 1102 xtensa.c:1249 xtensa_do_resume(): [esp[OpenOCD] 32.cpu0] start [OpenOCD] Debug: 531 1103 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (80000000) Debug: 532 1103 target.c:1860 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 533 1103 esp32.c:508 esp32_handle_target_event(): 2 Debug: 534 1105 esp_xtensa_smp.[OpenOCD] c:608 esp_xtensa_smp_handle_target_event(): 2 Debug: 535 1105 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 2 Debug: 536 1105 xtensa.c:2392 xtensa_handle_target_event(): 2 Debug: 537 1105 esp32.c:409 esp32_soc_reset(): resume done, waiting for the target to come alive [OpenOCD] Debug: 538 1259 esp[OpenOCD] 32.c:428 esp32_soc_reset(): halting the target Debug: 539 1259 xtensa.c:1163 xtensa_halt(): [esp32.cpu0] start [OpenOCD] Debug: 540 1259 xtensa.c:1174 xtensa_halt(): [esp32.cpu0] Core status 0x80000000 [OpenOCD] Info : 541 1260 xtensa.c:1754 xtensa_poll(): [esp32.[OpenOCD] cpu0] Debug controller was reset. Debug: 542 1260 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Info : 543 1260 xtensa.c:1760 xtensa_poll(): [esp32.cpu0] Core was reset. [OpenOCD] Debug: 544 1261 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu0] s[OpenOCD] tart [OpenOCD] Debug: 545 1264[OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (80208411) [OpenOCD] Debug: 546 1268 xtensa.c:833 xtensa[OpenOCD] _core_status_check(): [esp32.cpu0] DSR (80208411) [OpenOCD] Debug: 547 1270 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8020841[OpenOCD] 1) Debug: 548 1270 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x500000CF, debug_reason=00000000, oldstate=00000001 Debug: 549 1270 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Halt reason=0x00000020, exc_cause=0, dsr=0x80208411 Info : 550 1270 xtensa.c:1814 xtensa_poll(): [esp32.[OpenOCD] cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [OpenOCD] Debug: 551 1271 esp_xtensa.[OpenOCD] c:161 esp_xtensa_poll(): esp32.cpu0: Clear debug stubs info [OpenOCD] Debug: 552 1272 esp_xtensa_smp.c:258 esp_xtensa_sm[OpenOCD] p_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 553 1272 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 554 1272 esp_xtensa_smp.c:272[OpenOCD] esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 555 1273 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Debug: 556 [OpenOCD] 1273 target.c:1860 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu0 Debug: 557 1273 esp32.c:508 esp32_hand[OpenOCD] le_target_event(): 0 Debug: 558 1273 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 0 Debug: 559 1274 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 0 Debug: 560 1274 xte[OpenOCD] nsa.c:2392 xtensa_handle_target_event(): 0 Debug: 561 1274 target.c:1860 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu0 Debug: 562 1274 esp32.c:508 esp32_handle_target_event(): 1 Debug: 563 1274 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 1 Debug: 564 1274 esp_xtensa.c:80 esp_xtensa_[OpenOCD] handle_target_event(): 1 Debug: 565 1275 xtensa.c:2392 xtensa_handle_target_event(): 1 Debug: 566 1275 target.c:2778 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 [OpenOCD] Debug: 56[OpenOCD] 7 1276 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 568 1276 target.c:2778 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 [OpenOCD] Debug: 569 1277 xtensa.c:833 xtensa_core_sta[OpenOCD] tus_check(): [esp32.cpu0] DSR (8000CC11) Debug: 570 1277 target.c:2778 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 [OpenOCD] Debug: 571 1279 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] [OpenOCD] DSR (8000CC11) Debug: 572 1279 target.c:2778 target_write_u32(): address: 0x3ff60048, value: 0x00000000 [OpenOCD] Debug: 5[OpenOCD] 73 1280 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 574 1280 target.c:2778 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 [OpenOCD] Debug: 575 1280 xtensa.c[OpenOCD] :833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 576 1281 target.c:2778 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 [OpenOCD] Debug: 577 12[OpenOCD] 84 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8000CC11) Debug: 578 1284 esp32.c:432 esp32_soc_reset(): restoring RTC_SLOW_MEM Debug: 579 1285 target.c:2471 target_write_buffer(): writing buffer of 210 byte at 0x50000000 [OpenOCD] Debug: 580 1286 xtensa.c:833 xtensa_core_status_chec[OpenOCD] k(): [esp32.cpu0] DSR (8000CC11) [OpenOCD] Debug: 581 1288 xtensa.c:833 xtensa_core_status_check(): [esp3[OpenOCD] 2.cpu0] DSR (8000CC11) Debug: 582 1288 FreeRTOS.c:1300 freertos_post_reset_cleanup(): freertos_post_reset_cleanup Debug: 583 1288 xtensa.c:887 xtensa_assert_reset(): [esp32.cpu0] target_number=0, begin Debug: 584 1291 xtensa.c:887 xtensa_assert_reset(): [esp32.cpu1] target_number=1, begin Debug: 585 1292 command.c:166 script_debug(): command - esp32.cpu1 invoke-event reset-assert-post Debug: 586 1292 target.c:5153 target_handle_event(): target(1): esp32.cp[OpenOCD] u1 (esp32) event: 12 (reset-assert-post) action: soft_reset_halt Debug: 587 1292 command.c:166 script_debug(): command - soft_reset_halt Info : 588 1293 target.c:3391 handle_soft_reset_halt_command(): [esp32.cpu1] requesting target halt and executing a soft reset Debug: 589 1293 esp_xtensa_smp.c:105 esp_xtensa_smp_soft_reset_halt(): [esp32.cpu1] begin Debug: 590 1293 command.c:166 script_debug(): command - esp32.cpu0 invoke-event reset-deassert-pre Debug: 591 1293 command.c:166 script_debug(): command - esp32.cpu1 invoke-event reset-deassert-pre Debug: 592 1294 command.c:166 script_debug(): command - transport select Debug: 593 [OpenOCD] 1294 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 594 1295 command.c:166 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 595 1295 command.c:166 script[OpenOCD] _debug(): command - jtag tapisenabled esp32.cpu0 Debug: 596 1295 command.c:166 script_debug(): command - esp32.cpu0 arp_reset deassert 1 Debug: 597 1295 target.c:2239 target_free_all_working_areas_restore(): fr[OpenOCD] eeing all working areas Debug: 598 1296 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 599 1296 esp_xtensa_smp.c:86 esp_xtensa_smp_deassert_reset(): [OpenOCD] [esp32.cpu0] begin Debug: 600 1296 xtensa.c:907 xtensa_deassert_reset(): [esp32.cpu0] halt=1 Debug: 60[OpenOCD] 1 1297 command.c:166 script_debug(): command - transport select Debug: 602 1297 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] ![OpenOCD] = -1 Debug: 603 1297 command.c:166 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 604 1297 comman[OpenOCD] d.c:166 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 605 1298 command.c:166 script_debug()[OpenOCD] : command - esp32.cpu1 arp_reset deassert 1 Debug: 606 1298 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 607 1298 target.c:2239 targe[OpenOCD] t_free_all_working_areas_restore(): freeing all working areas Debug: 608 1299 esp_xtensa_smp.c:86 esp_xtensa_smp_deassert_reset(): [esp32.cpu1] begin Debug: 609 1299 xtensa.c:907 xtensa[OpenOCD] _deassert_reset(): [esp32.cpu1] halt=1 Debug: 610 1299 command.c:[OpenOCD] 166 script_debug(): command - esp32.cpu0 invoke-event reset-deassert-post Debug: 611 1300 command.c:166 script_debug(): command - esp32.cpu1 invoke-event r[OpenOCD] eset-deassert-post Debug: 612 1300 command.c:166 script_debug(): command - transport select Debug: 613 1300 command.c:166 script_debug(): comman[OpenOCD] d - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 614 1300 command.c:166 script_debug(): command - esp32.cpu0 cget -chain-position De[OpenOCD] bug: 615 1300 command.c:166 script_debug(): command - jtag tapisenabled esp32.cpu0 Debug: 616 1301 command.c:166 script_debug(): command - esp32.cpu0 was_examined Debug: 617 1301 command.c:166 script_debug(): command - esp32.cpu0 arp_waitstate halted 1000 [OpenOCD] Info : 618 1301 xtensa.c:1760 xtensa_poll(): [esp32.cpu0] Core was reset. [OpenOCD] Debug: 619 1302 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu0] start [OpenOCD] Debug: 620 [OpenOCD] 1306 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (81A0CC11) [OpenOCD] Debug: 621 131[OpenOCD] 1 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (81A0CC11) [OpenOCD] Debug: 622 1312 xtensa.c:833 xtensa_core_status_check():[OpenOCD] [esp32.cpu0] DSR (81A0CC11) Debug: 623 1312 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x40000400, debug_reason=00000000, oldstate=00000001 Debug: 624 1313 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Halt reason=0x00000020, exc_cause=0, dsr=0x81a0cc11 Info : 625 1313 xtensa.c:1814 xtensa_poll(): [esp32.cpu0][OpenOCD] Target halted, PC=0x40000400, debug_reason=00000000 [OpenOCD] Debug: 6[OpenOCD] 26 1319 esp_xtensa.c:161 esp_xtensa_poll(): esp32.cpu0: Clear debug stubs info Debug: 627 1320 esp_xtensa_smp.c:258 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 628 1[OpenOCD] 320 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 629 1320 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 630 1321 esp_xtensa_smp.c:286 esp_xtensa_smp_update_halt_gdb(): Poll target 'esp32.cpu1' [OpenOCD] Info : 631 1322 xtensa.c:1754 xtensa_poll(): [esp32.cpu1] Debug controller was reset. Debug: 632 1323 xtensa.c:77[OpenOCD] 6 xtensa_smpbreak_write(): [esp32.cpu1] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Info : 633 1323 xtensa.c:1760 xtensa_poll(): [esp32.cpu1] Core was reset. [OpenOCD] Debug: 634 1324 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu1] start [OpenOCD] Debug: 635 1326 xtensa.c:833 xtensa_core_st[OpenOCD] atus_check(): [esp32.cpu1] DSR (80A08411) [OpenOCD] Debug: 636 1331[OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (80A08411) [OpenOCD] Debug: 637 1332 xtensa.c:833 xtensa_core_status_check():[OpenOCD] [esp32.cpu1] DSR (80A08411) Debug: 638 1333 xtensa.c:1808 xtensa_poll(): [esp32.cpu1] Target halted, pc=0x40000400, debug_reason=00000000, oldstate=00000001 Debug: 639 1333 xtensa.c:1812 xtensa_poll(): [esp32.cpu1] Halt reason=0x00000020, exc_cause=0, ds[OpenOCD] r=0x80a08411 Info : 640 1333 xtensa.c:1814 xtensa_poll(): [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [OpenOCD] Debug: 641 1334 esp_xtensa.c:161 esp_xtensa_poll(): esp32.[OpenOCD] cpu1: Clear debug stubs info [OpenOCD] Debug: 642 1335 target.c:18[OpenOCD] 60 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu1 Debug: 643 1336 esp32.c:508 esp32_handle_target_event(): 0 Debug: 644 1336 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 0 [OpenOCD] Debug: 645 1336 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 0 Debug: 646 1336 xtensa.c:2392 xtensa_handle_target_event(): 0 Debug: 647 1337 target.c:1860 target_call_event_callbacks(): target event 1 (halted) for core esp32.cpu1[OpenOCD] Debug: 648 1337 esp32.c:508 esp32_handle_target_event(): 1 Debug: 649 1337 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 1 Debug: 650 1337 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 1 Debug: 651 1337 xtensa.c:2392 xtensa_handle_target_event(): 1 Debug: 652 1[OpenOCD] 337 target.c:2778 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 [OpenOCD] Debug: 653 1338 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8080CC11) Debug: 654 1338 target.c:2778 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 [OpenOCD] Debug: 655 1339 xtensa.c:833 xtensa_core_status_check(): [e[OpenOCD] sp32.cpu1] DSR (8080CC11) Debug: 656 1339 target.c:2778 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 [OpenOCD] Debug: 657 1341 xtensa.c:833 xtensa_core_[OpenOCD] status_check(): [esp32.cpu1] DSR (8080CC11) Debug: 658 1341 target.c:2778 target_write_u32(): address: 0x3ff60048, value: 0x00000000 [OpenOCD] Debug: 659 1342 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8080CC11) Debug: 660[OpenOCD] 1342 target.c:2778 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 [OpenOCD] Debug: 661 1343 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8080CC11[OpenOCD] ) Debug: 662 1343 target.c:2778 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 [OpenOCD] Debug: 663 1344 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu1] DSR (8080CC11) Debug: 664 1344 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Deb[OpenOCD] ug: 665 1344 target.c:1860 target_call_event_callbacks(): target event 0 (gdb-halt) for core esp32.cpu0 Debug: 666 1344 esp32.c:508 esp32_handle_target_event(): 0 Debug: 667 1344 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 0 Debug: 668 [OpenOCD] 1345 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 0 Debug: 669 1345 xtensa.c:2392 xtensa_handle_target_event(): 0 Debug: 670 1345 target.c:1860 target_call_event_callbacks(): target event 1 (halted)[OpenOCD] for core esp32.cpu0 Debug: 671 1345 esp32.c:508 esp32_handle_target_event(): 1 Debug: 672 1345 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 1 Debug: 673 1345 esp_xtensa.c:[OpenOCD] 80 esp_xtensa_handle_target_event(): 1 Debug: 674 1346 xtensa.c:2392 xtensa_handle_target_event(): 1 Debug: 675 1346 target.c:2778 target_write_u32(): address: 0x3ff5f064, value: 0x50d83aa1 Debug: 676 1347 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 677 1347 target.c:2778 target_write_u32(): address: 0x3ff5f048, value: 0x00000000 Debug: 678 1348 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 679 1348 target.c:2778 target_write_u32(): address: 0x3ff60064, value: 0x50d83aa1 Debug: 680 1348 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 681 1349 target.c:2778 target_write_u32(): address: 0x3ff60048, value: 0x00000000 Debug: 682 1349 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 683 1350 target.c:2778 target_write_u32(): address: 0x3ff480a4, value: 0x50d83aa1 [OpenOCD] Debug: 684 1350 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 685 1350 target.c:2778 target_write_u32(): address: 0x3ff4808c, value: 0x00000000 Debug: 686 1351 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 687 135[OpenOCD] 1 command.c:166 script_debug(): command - esp32.cpu0 curstate Debug: 688 1352 command.c:166 script_debug(): command - transport select Debug: 689 1352 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 690 13[OpenOCD] 52 command.c:166 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 691 1352 command.c:166 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 692 1353 command.c:166 script_debug(): command - esp32.cpu1 [OpenOCD] was_examined Debug: 693 1353 command.c:166 script_debug(): command - esp32.cpu1 arp_waitstate halted 1000 [OpenOCD] Debug: 694 1355 command.c:166 script_debug(): command - esp32.[OpenOCD] cpu1 curstate Debug: 695 1356 command.c:166 script_debug(): command - transport select Debug: 696 1356 command.c:166 script_debug(): command - expr [ string first "jtag" $_[OpenOCD] TRANSPORT ] != -1 Debug: 697 1356 command.c:166 script_debug(): command - esp32.cpu0 cget -chain-position Debug: 698 1356 command.c:166 script_debug()[OpenOCD] : command - jtag tapisenabled esp32.cpu0 Debug: 699 1357 command.c:166 script_debug(): command - esp32.cpu0 was_examined D[OpenOCD] ebug: 700 1357 command.c:166 script_debug(): command - esp32.cpu0 arp_waitstate halted 5000 [OpenOCD] Debug: 701 1359 command.c:166 script_debug(): command - esp32.cpu0 invoke-event reset-init Debug: 702 1359 command.c:166 script_debug(): command - transport select Debug: 703 1359 command.c:166 script_debug(): command - expr [ string first "jtag" $_TRANSPORT ] != -1 Debug: 704 1360 command.c:166 script_debug(): command - esp32.cpu1 cget -chain-position Debug: 705 1360 command.c:166 script_debug(): command - jtag tapisenabled esp32.cpu1 Debug: 706 1360 command.c:166 script_debug(): command - esp32.cpu1 was_examined Debug: 707 1360 command.c:166 script_debug(): command - esp32.cpu1 arp_waitstate halted 5000 Debug: 708 1362 command.c:166 script_debug(): command - esp32.cpu1 invoke-event reset-init Debug: 709 1362 command.c:166 script_debug(): command - esp32.cpu0 invoke-event reset-end Debug: 710 1362 command.c:166 script_debug(): command - esp32.cpu1 invoke-event reset-end [OpenOCD] Debug: 711 1364 command.c:166 script_debug(): command - target names [OpenOCD] Debug: 712 1367 comman[OpenOCD] d.c:166 script_debug(): command - esp32.cpu0 cget -work-area-backup [OpenOCD] Debug: 713 1370 co[OpenOCD] mmand.c:166 script_debug(): command - esp32.cpu0 configure -work-area-backup 0 [OpenOCD] Debug: 714 1372 target.c:2239 target_free_all_working_a[OpenOCD] reas_restore(): freeing all working areas Debug: 715 1373 command.c:166 script_debug(): command - esp32.cpu0 cget -alt-work-area-backup [OpenOCD] Debug: 716 1378 command.c:166 script_debug(): command - esp32.cpu0 configure -alt-work-area-backup 0 [OpenOCD] Debug: 717 1384 ta[OpenOCD] rget.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 718 1384 command.c:166 script_debug(): command - esp32.cpu1 cget -work-area-backup [OpenOCD] Debug: 719 1388 command.c:166 script_debug(): command - esp32.cpu1 configure -work-area-backup 0 [OpenOCD] Debug: 720 [OpenOCD] 1391 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 721 1391 command.c:166 script_debug(): command - esp32.cpu1 cget -alt-work-area-backup [OpenOCD] Debug: 722 1393 command.c:166 script_debu[OpenOCD] g(): command - esp32.cpu1 configure -alt-work-area-backup 0 [OpenOCD] Debug: 723 1394 target.c:2239 tar[OpenOCD] get_free_all_working_areas_restore(): freeing all working areas Debug: 724 1395 command.c:166 script_debug(): command - esp compression off [OpenOCD] Debug: 725 1396 esp_flash.c:1407[OpenOCD] esp_flash_cmd_set_compression(): Flash compressed upload is off Debug: 726 1396 esp_flash.c:948 esp_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32.cpu0' - 'halted' Debug: 727 1397 esp_flash.c:239 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 728 1398 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 729 1398 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 Debug: 730 1399 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 731 1399 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections Debug: 732 1399 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 733 1399 target.c:2065 alloc_working_area_try_do(): MMU disabled, using physical address for working memory 0x40090000 Debug: 734 1400 target.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 bytes at address 0x40090000 Debug: 735 1400 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 736 1400 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 737 1400 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 738 1403 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 739 1403 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 Debug: 740 1406 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 741 1406 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 742 1408 xtensa.c:833 xtensa_core_[OpenOCD] status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 743 1409 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 [OpenOCD] Debug: 7[OpenOCD] 44 1411 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 745 1411 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 [OpenOCD] Debug: 746 141[OpenOCD] 4 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 747 1414 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 748 1417 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0][OpenOCD] DSR (8080CC11) Debug: 749 1417 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 750 1420 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 751 1420 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 752 1423 xtens[OpenOCD] a.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 753 1423 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 754 1425 xtensa.c:833 xtensa_core_status_check(): [esp[OpenOCD] 32.cpu0] DSR (8080CC11) Debug: 755 1425 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 756 1428 xtensa.c:833 xtensa_core_status_check(): [e[OpenOCD] sp32.cpu0] DSR (8080CC11) Debug: 757 1428 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 758 14[OpenOCD] 31 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 759 1431 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] Debug: 760 1434 xtensa.c:833 xtensa_[OpenOCD] core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 761 1434 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debug: 762 1438 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 763 1439 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 764 1441 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0][OpenOCD] DSR (8080CC11) Debug: 765 1441 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 766 1444 xtensa.c:833 xtensa_core_status_check([OpenOCD] ): [esp32.cpu0] DSR (8080CC11) Debug: 767 1444 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 768 1447 xtensa.c:833 xtensa_core_status_check(): [esp32[OpenOCD] .cpu0] DSR (8080CC11) Debug: 769 1447 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 770 1450 xtensa.c:833[OpenOCD] xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 771 1450 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] D[OpenOCD] e[OpenOCD] b[OpenOCD] u[OpenOCD] g[OpenOCD] :[OpenOCD] [OpenOCD] 7[OpenOCD] 7[OpenOCD] 2[OpenOCD] [OpenOCD] 1[OpenOCD] 4[OpenOCD] 6[OpenOCD] 2[OpenOCD] xtens[OpenOCD] a.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 773 1469 target.c:2471 target_write_buffer(): writing buffe[OpenOCD] r of[OpenOCD] [OpenOCD] 5[OpenOCD] 0[OpenOCD] 7[OpenOCD] [OpenOCD] b[OpenOCD] y[OpenOCD] t[OpenOCD] e[OpenOCD] [OpenOCD] a[OpenOCD] t[OpenOCD] 0x40092400 [OpenOCD] Debug: 7[OpenOCD] 74 1480 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 775 1483 xtensa.c:833 xtensa_core_sta[OpenOCD] tus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 776 1483 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 777 1483 esp_algorithm.c:351 algorithm_loa[OpenOCD] d_func_image(): DATA sec size 1060 -> 1060 Debug: 778 1484 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 779 1484 t[OpenOCD] arget.c:2065 alloc_working_area_try_do(): MMU[OpenOCD] disabled, using physical address for working memory 0x3ffc0000 Debug: 780 1485 target.c:2119 alloc[OpenOCD] _working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: 781 1486 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 782 14[OpenOCD] 86 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 783 1486 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 784 1490 xtensa.c:833 xtensa_core_status_check(): [[OpenOCD] esp32.cpu0] DSR (8080CC11) Debug: 785 1490 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug: 78[OpenOCD] 6 1493 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 787 1493 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 [OpenOCD] Debug: 788 1494 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 789 1494 t[OpenOCD] arget.c:2119 alloc_working_area_try_do(): allocated new working area of 1300 bytes at address 0x3ffc045c Debug: 790 1494 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 79[OpenOCD] 1 1494 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc096f (1300 bytes) Debug: 792 1495 target.c:1986 print_wa_layout(): 0x3ffc0970-0x3ffd7fff (95888 bytes) Debug: 793 1495 target.c:2119[OpenOCD] alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x400925fc Debug: 794 1495 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 795 1496 [OpenOCD] target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 796 1496 target.c:1986 print_wa_layout(): 0x40092618-0x40093fff (6632 bytes) Debug: 797 1496 target.c:2471 target_wr[OpenOCD] ite_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 798 1497 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 799 1497 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 98.148 ms Debug: 800 1497 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 9 (6/[OpenOCD] 3). Debug: 801 1498 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc0970 Debug: 802 1498 xtensa_algorithm.c:129 xtensa_algo_init(): Se[OpenOCD] t arg[0] = 5 (a2) Debug: 803 1498 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[1] = -1 (a3) Debug: 804 1498 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[2] = 0 (a4) Debug: 805 1499 target.c:2119 alloc_working_ar[OpenOCD] ea_try_do(): allocated new working area of 28 bytes at address 0x3ffc0970 Debug: 806 1499 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 807 1499 target.c:1986 pri[OpenOCD] nt_wa_layout(): * 0x3ffc045c-0x3ffc096f (1300 bytes) Debug: 808 1499 target.c:1986 print_wa_layout(): * 0x3ffc0970-0x3ffc098b (28 bytes) Debug: 809 1500 target.c:1986 pri[OpenOCD] nt_wa_layout(): 0x3ffc098c-0x3ffd7fff (95860 bytes) Debug: 810 1500 esp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, stack 1300 bytes @ 0x3ffc0970 Debug: 811 1500 xtensa.c:1267 xtensa_[OpenOCD] resume(): [esp32.cpu0] start Debug: 812 1500 xtensa.c:1200 xtensa_prepare_resume(): [esp32.cpu0] current=0 address=0x400925fc, handle_breakpoints=1, debug_execution=1) Debug: 813 1501 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 814 1501 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 400925FC Debug: 815 1501 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowbase val 00000000 Debug: 816 1502 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowstart val 00000001 Debug: 817 1502 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 00060025 Debug: 818 1502 [OpenOCD] xtensa.c:701 xtensa_queue_write_dirty_user_regs_u32(): [esp32.cpu0] start Debug: 819 1503 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a0 value 00000000, num =1 Debug: 820 1503 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 3FFC0960, num =2 Debug: 821 1503 xtensa.c:650 xte[OpenOCD] nsa_write_dirty_registers(): [esp32.cpu0] Writing back reg a2 value 00000005, num =3 Debug: 822 1504 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value FFFFFFFF, num =4 Debug: 823 1504 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a4 value 3FFC0970, num =5 Debug: 824 1504 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 40091994, num =9 [OpenOCD] Debug: 825 1506 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 826 1506 xtensa.c:1249 xtensa_do_resume(): [esp32.cpu0] start D[OpenOCD] ebug: 827 1506 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC01) Debug: 828 1507 target.c:1860 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 829[OpenOCD] 1507 esp32.c:508 esp32_handle_target_event(): 2 Debug: 830 1507 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 2 Debug: 831 1507 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 2 Debug: 832 1[OpenOCD] 507 xtensa.c:2392 xtensa_handle_target_event(): 2 Debug: 833 1507 esp_algorithm.c:218 algorithm_run(): Wait algorithm completion [OpenOCD] Debug: 83[OpenOCD] 4 1508 target.c:3347 target_wait_state(): waiting for target halted... [OpenOCD] Debug: 835 1512 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.c[OpenOCD] pu0] start [OpenOCD] Debug: 836 1516 xtensa.c:833 xtensa_co[OpenOCD] re_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 837 1520 xtensa.c:833 xtensa_[OpenOCD] core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 83[OpenOCD] 8 152[OpenOCD] 2 xte[OpenOCD] nsa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 839 1524 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x40092612, debug_reason=00000001, oldst[OpenOCD] a[OpenOCD] te=00000004 Debug: 840 1525 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc1[OpenOCD] 1 [OpenOCD] Info : 841 1525 xtensa.c:1814 xtensa_poll(): [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [OpenOCD] Debug: 842 1527 esp_xtensa_smp.c:258 esp_x[OpenOCD] tensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 843 1527 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 844 1527 esp_xtensa_smp[OpenOCD] .c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 845 1527 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Debug: 846 1527 target.c:1860 target_call_event_callbac[OpenOCD] ks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 847 1528 esp32.c:508 esp32_handle_target_event(): 17 Debug: 848 1528 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event():[OpenOCD] 17 Debug: 849 1528 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 17 Debug: 850 1528 xtensa.c:2392 xtensa_handle_target_event(): 17 Debug: 851 1528 xtensa.c:2170 xtensa_w[OpenOCD] ait_algorithm(): Read mem params Debug: 852 1528 xtensa.c:2172 xtensa_wait_algorithm(): Check mem param @ 0x3ffc0970 Debug: 853 1528 xtensa.c:2174 xtensa_wait_algorithm(): Read mem param @ 0x3ff[OpenOCD] c0970 Debug: 854 1529 target.c:2536 target_read_buffer(): reading buffer of 28 byte at 0x3ffc0970 [OpenOCD] Debug: 855 1529 xtensa.c:833 xtensa_c[OpenOCD] ore_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 856 1529 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a15: 0x000050aa -> 0x00000000 Debug: 857 1530 xtensa.c:2204 [OpenOCD] xtensa_wait_algorithm(): restoring register a14: 0x00000020 -> 0x00000000 Debug: 858 1530 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a13: 0x01000000 -> 0x00000[OpenOCD] 000 Debug: 859 1530 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a12: 0x00000001 -> 0x00000000 Debug: 860 1530 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a9: 0x3[OpenOCD] ffc0870 -> 0x00000000 Debug: 861 1530 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a8: 0x80092610 -> 0x00000000 Debug: 862 1531 xtensa.c:2204 xtensa_wait_algorithm(): re[OpenOCD] storing register a4: 0x3ffc0970 -> 0x00000000 Debug: 863 1531 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x00000000 Debug: 864 1531 xtensa.c:220[OpenOCD] 4 xtensa_wait_algorithm(): restoring register a1: 0x3ffc0960 -> 0x00000000 Debug: 865 1531 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ccount: 0x00033cfc -> 0x00000004 Debug: 8[OpenOCD] 66 1531 xtensa.c:2194 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 867 1532 xtensa.c:2204 xtensa_wait_algorithm(): restoring register e[OpenOCD] ps6: 0x00060025 -> 0x0000001f Debug: 868 1532 xtensa.c:2204 xtensa_wait_algorithm(): restoring register epc6: 0x40092612 -> 0x40000400 Debug: 869 1532 xtensa.c:2204 x[OpenOCD] tensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 870 1532 xtensa.c:2204 xtensa_wait_algorithm(): restoring register configid0: 0x40092612 -> 0x40000400 Debug: 871 1532 xtensa.c:2204 xtensa_wait_algorithm(): restoring register sar: 0x00000019 -> 0x00000000 Debug: 872 1533 xtensa.c:2204 xtensa_wait_algorithm(): restoring register lcoun[OpenOCD] t: 0xffffffff -> 0x00000000 Debug: 873 1533 xtensa.c:2204 xtensa_wait_algorithm(): restoring register lend: 0x4000c2f6 -> 0x00000000 Debug: 874 1533 xtensa.c:2204 xtensa_wait_algorithm(): restoring register lbeg: 0x4000c2e0 -> 0x00000000 Debug: 875 1533 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar45: 0x08000000 -> 0x00000000 Debug: 876 1534 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar43: 0xfffffff7 -> 0x00000000 Debug: 877 1534 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar42: 0x3ff00044 -> 0x00000000 Debug: 878 1534 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar41: 0x000008ef -> 0x00000000 Debug: 879 1534 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar40: 0xffffffc0 -> 0x00000000 Debug: 880 1535 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar39: 0x00000010 -> 0x00000000 Debug: 881 1535 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar38: 0x50000000 -> 0x00000000 Debug: 882 1535 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar37: 0x3ffc0850 -> 0x00000000 Debug: 883 1535 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar36: 0x00000008 -> 0x00000000 Debug: 884 1536 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar35: 0x0000002f -> 0x00000000 Debug: 885 1536 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar33: 0x3ffc07d0 -> 0x00000000 Debug: 886 1536 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar32: 0x800906bd -> 0x00000000 Debug: 887 1536 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar31: 0x3ff10000 -> 0x00000000 Debug: 888 1537 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar29: 0x00000006 -> 0x00000000 Debug: 889 1537 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar28: 0x3ff10014 -> 0x00000000 Debug: 890 1537 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar27: 0x00000006 -> 0x00000000 Debug: 891 1537 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar26: 0x003fffff -> 0x00000000 Debug: 892 1537 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar25: 0x50000000 -> 0x00000000 Debug: 893 1538 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar24: 0x00000006 -> 0x00000000 Debug: 894 1538 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar23: 0x3ff10000 -> 0x00000000 Debug: 895 1538 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar22: 0x00000006 -> 0x00000000 Debug: 896 1538 xtensa.c:2204 xte[OpenOCD] nsa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000 Debug: 897 1540 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar19: 0x3ffc0970 -> 0x00000000 Debug: 898 1540 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc0830 -> 0x00000000 Debug: 899 1540 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar16: 0x80091d83 -> 0x00000000 Debug: 900 1540 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar15: 0x000050aa -> 0x00000000 Debug: 901 1541 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar14: 0x00000020 -> 0x00000000 Debug: 902 1541 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar13: 0x01000000 -> 0x00000000 Debug: 903 1541 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar12: 0x00000001 -> 0x00000000 Debug: 904 1541 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0870 -> 0x00000000 Debug: 905 154[OpenOCD] 2 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar8: 0x80092610 -> 0x00000000 Debug: 906 1542 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar4: 0x3ffc0970 -> 0x00000000 Debug: 907 1542 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x00000000 Debug: 908 1543 xtensa.c:[OpenOCD] 2204 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc0960 -> 0x00000000 Debug: 909 1543 xtensa.c:2204 xtensa_wait_algorithm(): restoring register pc: 0x40092612 -> 0x40000400 Debug: 910 1543 xtensa.c:572 xtensa_write_dirty_registers(): [e[OpenOCD] sp32.cpu0] start Debug: 911 1544 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 40000400 Debug: 912 1544 xtensa.c:585 xtensa_write_dirty_regist[OpenOCD] ers(): [esp32.cpu0] Writing back reg lbeg val 00000000 Debug: 913 1544 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg lend val 00000000 Debug: 914 1545 xtensa.c:585 xtensa_w[OpenOCD] rite_dirty_registers(): [esp32.cpu0] Writing back reg lcount val 00000000 Debug: 915 1545 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg sar val 00000000 Debug: 916 154[OpenOCD] 5 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg configid0 val 40000400 Debug: 917 1546 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 0000001F De[OpenOCD] bug: 918 1546 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg epc6 val 40000400 Debug: 919 1546 xtensa.c:585 xtensa_write[OpenOCD] _dirty_registers(): [esp32.cpu0] Writing back reg eps6 val 0000001F Debug: 920 1547 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ccount val 00000004 Debug: 921 1547 xtensa.c:701 xten[OpenOCD] sa_queue_write_dirty_user_regs_u32(): [esp32.cpu0] start Debug: 922 1547 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 00000000, num =2 Debug: 923 1547 xtensa.c:65[OpenOCD] 0 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value 00000000, num =4 Debug: 924 1548 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a4 value 00000000, num =5 Debug: 925 1548 xtensa.c:650[OpenOCD] xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 00000000, num =9 Debug: 926 1548 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a9 value 00000000, num =10 [OpenOCD] Debug: 927 1549 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a12 value 00000000, num =13 Debug: 928 1549 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Wri[OpenOCD] ting back reg a13 value 00000000, num =14 Debug: 929 1549 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a14 value 00000000, num =15 Debug: 930 1550 xtensa.c:650 [OpenOCD] xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a15 value 00000000, num =16 Debug: 931 1550 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar[OpenOCD] 1 value 00000000, num =1 Debug: 932 1550 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar3 value 00000000, num =3 Debug: 933 1550 xtensa.c:674 xtensa_write_dirty_registers(): [esp32[OpenOCD] .cpu0] Writing back reg ar4 value 00000000, num =4 Debug: 934 1551 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar8 value 00000000, num =8 Debug: 935 1551 xtensa.c:674 xtens[OpenOCD] a_write_dirty_registers(): [esp32.cpu0] Writing back reg ar9 value 00000000, num =9 Debug: 936 1551 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar12 value 00000000, num =12 Debug: 937 1551 xtensa[OpenOCD] .c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar13 value 00000000, num =13 Debug: 938 1552 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar14 valu[OpenOCD] e 00000000, num =14 Debug: 939 1552 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar15 value 00000000, num =15 Debug: 940 1552 xtensa.c:674 xtensa_write_dirty_regis[OpenOCD] ters(): [esp32.cpu0] Writing back reg ar16 value 00000000, num =16 Debug: 941 1552 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar17 value 00000000, num =17 Debug: 942 1552 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Wr[OpenOCD] iting back reg ar19 value 00000000, num =19 Debug: 943 1553 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar20 value 00000000, num =20 Debug: 944 1553 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar22 value 00000000, num =22 Debug: 945 1554 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar23 value 00000000, num =23 Debug: 946 1554 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar24 value 00000000, num =24 Debug: 947 1554 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar25 value 00000000, num =25 Debug: 948 1555 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar26 value 00000000, num =26 Debug: 949 1555 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar27 value 00000000, num =27 Debug: 950 1556 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar28 value 00000000, num =28 Debug: 951 1556 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar29 value 00000000, num =29 Debug: 952 1556 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar31 value 00000000, num =31 Debug: 953 1557 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar32 value 00000000, num =32 Debug: 954 1557 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar33 value 00000000, num =33 Debug: 955 1557 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar35 value 00000000, num =35 Debug: 956 1558 xtensa.c:674 xtensa_write_dirty_registers(): [esp32[OpenOCD] .cpu0] Writing back reg ar36 value 00000000, num =36 Debug: 957 1559 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar37 value 00000000, num =37 Debug: 958 1559 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar38 value 00000000, num =38 Debug: 959 1559 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar39 value 00000000, num =39 Debug: 960 1559 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar40 value 00000000, num =40 Debug: 961 1560 xtensa.c:674 xtensa_write_dirty_r[OpenOCD] egisters(): [esp32.cpu0] Writing back reg ar41 value 00000000, num =41 Debug: 962 1560 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar42 value 00000000, num =42 Debug: 963 1561 xtensa.c:674 xtensa_write_dirty_registe[OpenOCD] rs(): [esp32.cpu0] Writing back reg ar43 value 00000000, num =43 Debug: 964 1561 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar45 value 00000000, num =45 [OpenOCD] Debug: 965 1563 xtensa.c:833 xtensa_cor[OpenOCD] e_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 966 1563 esp_algorithm.c:246 algorithm_run(): Got algorithm RC 0x0 Debug: 967 1563 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3ffc0970 Debug: 968 1563 target.[OpenOCD] c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 969 1564 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc096f (1300 bytes) Debug: 970 1564 target.c:1986 print_wa_layout(): 0x3ffc0970-0x3[OpenOCD] ffd7fff (95888 bytes) Debug: 971 1564 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x400925fc Debug: 972 1564 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 973 1564 target.c:198[OpenOCD] 6 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 974 1564 target.c:2206 target_free_working_area_restore(): freed 1300 bytes of working area at address 0x3ffc045c Debug: 975 1564 target.[OpenOCD] c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 976 1565 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 977 1565 target.c:2206 target_free_working_area_restore(): freed 9[OpenOCD] 724 bytes of working area at address 0x40090000 Debug: 978 1565 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 979 1565 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3ffc0000 Debug: 980 1565 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 981 1566 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Debug: 982 1567 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Info : 983 1567 esp_flash.c:402 esp_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3f400020, 266 KB Inf[OpenOCD] o : 984 1567 esp_flash.c:402 esp_flash_get_mappings(): Flash mapping 1: 0x60020 -> 0x400d0020, 1105 KB Debug: 985 1567 esp_flas[OpenOCD] h.c:239 esp_flasher_algorithm_init(): base=00000000 set=0 [OpenOCD] Debug: 986 1568 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 987 1568 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 [OpenOCD] Debug: 988 1568 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 989 1569 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 s[OpenOCD] ections Debug: 990 1569 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 991 1569 target.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 b[OpenOCD] ytes at address 0x40090000 Debug: 992 1570 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 993 1570 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 994 157[OpenOCD] 0 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 995 1573 xtensa.c:833 xtensa_core_status_check[OpenOCD] (): [esp32.cpu0] DSR (8080CC11) Debug: 996 1574 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 99[OpenOCD] 7 1576 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 998 1576 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 999 1580 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1000 1580 target.c:2471 target_w[OpenOCD] rite_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 1001 1583 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1002 1583 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 [OpenOCD] Debug: 1003 1586 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1004 1586 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 1005[OpenOCD] 1589 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1006 1589 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 [OpenOCD] Debug: 1007 1592 xte[OpenOCD] nsa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1008 1592 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 1009 1596 xtensa.c:833 xtensa_core_status_check(): [esp32.[OpenOCD] cpu0] DSR (8080CC11) Debug: 1010 1596 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 10[OpenOCD] 11 1599 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1012 1599 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 1013 1602 xtensa.c:833 xtensa_core_status_c[OpenOCD] heck(): [esp32.cpu0] DSR (8080CC11) Debug: 1014 1602 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 1015 1608 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1016 1609 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] Debug: 101[OpenOCD] 7 1612 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1018 1612 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debug: 1019 1614 xtensa.c:833 xtensa_core_status_ch[OpenOCD] eck(): [esp32.cpu0] DSR (8080CC11) Debug: 1020 1615 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 Debug: 1021 1617 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1022 1617 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 1023 1620 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1024 1620 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 1025 1623 xtensa.c:833 xtensa_core_s[OpenOCD] tatus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1026 1623 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 10[OpenOCD] 27 1626 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1028 1626 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] Debug: 102[OpenOCD] 9 1629 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1030 1629 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 [OpenOCD] Debug: 1031 1630 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1032 [OpenOCD] 1632 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1033 1633 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 1034 1633 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> 1060 Debug: 1035[OpenOCD] 1633 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1036 1633 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: 1037 1634 target.c:1[OpenOCD] 986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1038 1634 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1039 1634 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 1040 1638 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] [OpenOCD] DSR (8080CC11) Debug: 1041 1638 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug: 104[OpenOCD] 2 1641 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1043 1641 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 [OpenOCD] Debug: 1044 1[OpenOCD] 643 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1045 1643 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc045c Debug: 1046 1643 tar[OpenOCD] get.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1047 1644 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc085b (1024 bytes) Debug: 1048 1644 target.c:1986 print_w[OpenOCD] a_layout(): 0x3ffc085c-0x3ffd7fff (96164 bytes) Debug: 1049 1644 target.c:2119 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x400925fc Debug: 1050 1644 target.c:1986 print_wa_[OpenOCD] layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1051 1645 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 1052 1645 target.c:1986 print_wa_layout(): 0x40092618-0[OpenOCD] x40093fff (6632 bytes) Debug: 1053 1645 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 1054 1646 xtensa.c:833 xtensa_core_status_check(): [esp3[OpenOCD] 2.cpu0] DSR (8080CC11) Debug: 1055 1646 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 76.458 ms [OpenOCD] Debug: 1056 1647 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 7 (6/1). Debug: 1057 1647 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc085c Debug: 1058 1647 x[OpenOCD] tensa_algorithm.c:64 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc0850 Debug: 1059 1648 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 4 (a2) Debug: 1060 1648 e[OpenOCD] sp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, stack 1024 bytes @ 0x3ffc085c Debug: 1061 1648 xtensa.c:1267 xtensa_resume(): [esp32.cpu0] start[OpenOCD] Debug: 1062 1648 xtensa.c:1200 xtensa_prepare_resume(): [esp32.cpu0] current=0 address=0x400925fc, handle_breakpoints=1, debug_execution=1) Debug[OpenOCD] : 1063 1649 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 1064 1649 xtensa.c:585 xtensa_write_dirty_registers(): [[OpenOCD] esp32.cpu0] Writing back reg pc val 400925FC Debug: 1065 1650 xte[OpenOCD] nsa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowbase val 00000000 Debug: 1066 1651 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowstart val 00000001 Debug: 1067 1651 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 00060025 Debug: 1068 1651 xtensa.c:701 xtensa_queue_write_dirty_user_regs_u32(): [esp32.cpu0] start Debug: 1069 1652 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a0 value 00000000, num =1 Debug: 1070 1652 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 3FFC0840, num =2 Debug: 1071 1652 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a2 value 00000004, num =3 Debug: 1072 1652 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value 00000000, num =4 Debug: 1073 1653 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 40091994, num =9 Debug: 1074 1654 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1075 1655 xtensa.c:1249 xtensa_do_resume(): [esp32.cpu0] start Debug: 1076 1656 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1077 1656 target.c:1860 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1078 1657 esp32.c:508 esp32_handle_target_event(): 2 Debug: 1079 1657 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 2 Debug: 1080 1657 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 2 Debug: 1081 1657 xtensa.c:2392 xtensa_handle_t[OpenOCD] arget_event(): 2 Debug: 1082 1658 esp_algorithm.c:218 algorithm_run(): Wait algorithm completion Debug: 1083 1659 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu0] start [OpenOCD] Debug: 1084[OpenOCD] 1662 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1085 1666 xtensa.c:833 xtensa_core_status_check(): [es[OpenOCD] p32.cpu0] DSR (8080CC11) Debug: 1086 1667 xtensa.c:833 x[OpenOCD] tensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1087 1667 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x40092612, debug_reason=00000001, oldstate=00000004 Debug: 1088 1667 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Hal[OpenOCD] t reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1089 1668 xtensa.c:1814 xtensa_poll(): [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [OpenOCD] Debug: 1090 1668 esp_xtensa_smp.c:258 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug[OpenOCD] : 1091 1669 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1092 1669 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1093 1669 e[OpenOCD] sp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1094 1669 target.c:1860 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1095 1670 esp32.c:508 esp32_[OpenOCD] handle_target_event(): 17 Debug: 1096 1670 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 17 Debug: 1097 1670 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 17 Debug: 1098 1670 xtensa.c:2392 xtensa_handle_ta[OpenOCD] rget_event(): 17 Debug: 1099 1671 xtensa.c:2170 xtensa_wait_algorithm(): Read mem params Debug: 1100 1671 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a14: 0x3ffc0304 -> 0x00000000 Debug: 1101 1671 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a12: 0x00000001 -> 0x00000000 Debug: 1102 1672 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a10: 0x01000000 -> 0x00000000 Debug: [OpenOCD] 1103 16[OpenOCD] 72 xtensa.c:2204 xtensa_wait_algorithm(): restoring [OpenOCD] register a9: 0x3ffc0750 -> 0x00000000 Debug: 1104 1674 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a8: 0x80092610 -> 0x00000000 Debug: 1105 1674 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a2: 0x01000000 -> 0x00000000 Debug: 1106 1675 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a1: 0x3ffc0840 -> 0x000[OpenOCD] 00000 Debug: 1107 1676 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ccount: 0x00000865 -> 0x00000004 Debug: 1108 1676 xtensa.c:2194 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1109 1676 xtensa.c:2204 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1110 1677 xtensa.c:2204 xtensa_wait_algorithm(): restoring register epc6: 0x40092612 -> 0x40000400 Debug: 1111 1677 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1112 1677 xtensa.c:2204 xtensa_wait_algorithm(): restoring register configid0: 0x40092612 -> 0x40000400 Debug: 1113 1677 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar31: 0x00040000 -> 0x00000000 Debug: 1114 1678 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar30: 0x80000040 -> 0x00000000 Debug: 1115 1678 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar29: 0x70000000 -> 0x00000000 Debug: 1116 1678 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar28: 0x3ff42000 -> 0x00000000 Debug: 1117 1679 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar27: 0x3ff42010 -> 0x00000000 Debug: 1118 1679 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar26: 0x3ffae270 -> 0x00000000 Debug: 1119 1679 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar24: 0x3ff42024 -> 0x00000000 Debug: 1120 1679 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar22: 0x80000040 -> 0x00000000 Debug: 1121 1680 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar21: 0x5c000007 -> 0x00000000 Debug: 1122 1680 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar20: 0x70000000 -> 0x00000000 Debug: 1123 1680 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar19: 0x01000000 -> 0x00000000 Debug: 1124 1680 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc0730 -> 0x00000000 Debug: 1125 1681 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar16: 0x80091b40 -> 0x00000000 Debug: 1126 1681 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar14: 0x3ffc0304 -> 0x00000000 Debug: 1127 1681 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar12: 0x[OpenOCD] 00000001 -> 0x00000000 Debug: 1128 1682 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar10: 0x01000000 -> 0x00000000 Debug: 1129 1682 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0750 -> 0x00000000 Debug: 1130 1682 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar8: 0x80092610 -> 0x00000000 Debug: 1131 1683 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar2: 0x01000000 -> 0x00000000 Debug: 1132 1683 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc0840 -> 0x00000000 Debug: 1133 1683 xtensa.c:2204 xtensa_wait_algorithm(): restoring register pc: 0x40092612 -> 0x40000400 Debug: 1134 1683 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 1135 1683 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 40000400 Debug: 1136 1684 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg configid0 val 40000400 Debug: 1137 168[OpenOCD] 4 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 0000001F Debug: 1138 1685 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg epc6 val 40000400 Debug: 1139 1685 xtensa.c:585 xtensa_write_dirty_r[OpenOCD] egisters(): [esp32.cpu0] Writing back reg eps6 val 0000001F Debug: 1140 1685 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ccount val 00000004 Debug: 1141 1686 xtensa.c:701 xtensa_queue_write_dirty_user_regs_u32(): [esp32.cpu0] start Debug: 1142 1686 xtensa[OpenOCD] .c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 00000000, num =2 Debug: 1143 1686 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cp[OpenOCD] u0] Writing back reg a2 value 00000000, num =3 Debug: 1144 1687 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value 00000000, num =4 Debug: 1145 1687 xtensa.c:650 xtensa_write_dirty_registers([OpenOCD] ): [esp32.cpu0] Writing back reg a8 value 00000000, num =9 Debug: 1146 1687 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a9 value 00000000, num =10 Debug: 1147 1688 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a10 value 00000000, num =11 Debug: 1148 1688 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a12 value 00000000, num =13 Debug: 1149 1689 xtensa.c:[OpenOCD] 650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a14 value 00000000, num =15 Debug: 1150 1689 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back[OpenOCD] reg ar1 value 00000000, num =1 Debug: 1151 1689 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar2 value 00000000, num =2 Debug: 1152 1690 xte[OpenOCD] nsa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar8 value 00000000, num =8 Debug: 1153 1690 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar9 value 00000000, num =9 Debug: 1154 1690 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar10 value 00000000, num =10 Debug: 1155 1691 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar12 value 00000000, num =12 Debug: 1156 1691 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar14 value 00000000, num =14 Debug: 1157 1691 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar16 value 00000000, num =16 Debug: 1158 1692 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar17 value 00000000, num =17 Debug: 1159 1692 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar19 value 00000000, num =19 Debug: 1160 1692 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar20 value 00000000, num =20 Debug: 1161 1692 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar21 value 00000000, num =21 Debug: 1162 1693 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar22 value 00000000, num =22 Debug: 1163 1693 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar24 value 00000000, num =24 Debug: 1164 1693 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar26 value 00000000, num =26 Debug: 1165 1693 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar27 value 00000000, num =27 Debug: 1166 1693 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar28 value 00000000, num =28 Debug: 1167 1694 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar29 [OpenOCD] value 00000000, num =29 Debug: 1168 1695 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar30 value 00000000, num =30 Debug: 1169 1695 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar31 value 00000000, num =31 [OpenOCD] Debug: 1170 1696 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1171 1696 esp_algorithm.c:246 algorithm_run(): Got algorithm RC 0x1000000 Debug: 1172 1697 target.c:2206 target_free_working_area_restore(): [OpenOCD] freed 28 bytes of working area at address 0x400925fc Debug: 1173 1697 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1174 1[OpenOCD] 697 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1175 1698 target.c:2206 target_free_[OpenOCD] working_area_restore(): freed 1024 bytes of working area at address 0x3ffc045c Debug: 1176 1698 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc04[OpenOCD] 5b (1116 bytes) Debug: 1177 1698 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1178 1698 target.c:2206 target_free_working_area_restore(): freed 9724 by[OpenOCD] tes of working area at address 0x40090000 Debug: 1179 1699 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1180 1699 target.c:2206 target_free_working_area_restore(): freed 1116 bytes [OpenOCD] of working area at address 0x3ffc0000 Debug: 1181 1699 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1182 1700 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cp[OpenOCD] u0] write smpbreak set=0x30000 clear=0x600000 Debug: 1183 1[OpenOCD] 700 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Debug: 1184 1700 esp_flash.c:344 esp_flash_get_size(): esp_flash_get_size [OpenOCD] size 0x1000000 Info : 1185 1701 esp_flash.c:1003 esp_flash_probe(): Auto-detected flash bank 'esp32.cpu0.flash' size 16384 KB Info : 1186 1701 esp_flash.c:1005 esp_flash_probe(): Using flash bank 'esp32.cpu0.flash' size 16384 KB Debug: 1187 1701 esp_flash.c:1022 esp_flash_probe(): allocated 4096 sectors Debug: 1188 [OpenOCD] 1701 esp_flash.c:1407 esp_flash_cmd_set_compression(): Flash compressed upload is off Debug: 1189 1702 esp_flash.c:948 esp_flash_probe(): Flash size = 0 KB @ 0x00000000 'esp32.cpu1' - 'halted' Debug: 1190 1702 esp_flash.c:239 esp_flasher_algorithm_init(): base=00000000[OpenOCD] set=0 Debug: 1191 1703 xtensa.c:833 xtensa_core_[OpenOCD] status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1192 1703 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 [OpenOCD] Debug: 1193 1703 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 1194 1703 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections Debug: 1195 1704 esp_[OpenOCD] algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 1196 1704 target.c:2119 alloc_working_area_try_do(): allocated new working area o[OpenOCD] f 9724 bytes at address 0x40090000 Debug: 1197 1704 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1198 1705 tar[OpenOCD] get.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1199 1705 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 1200 1711 xt[OpenOCD] ensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1201 1711 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 1202 1714 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1203 1714 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 1204 1716 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1205 1716 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 [OpenOCD] Debug: 1206 1719 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1207 1[OpenOCD] 719 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 [OpenOCD] Debug: 1208 [OpenOCD] 1727 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1209 1727 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 1210 1730 xtensa.c:833 xtensa_core_status_check(): [esp32.cp[OpenOCD] u0] DSR (8080CC11) Debug: 1211 1730 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 [OpenOCD] Debug: 1212 1733 xtensa.c:833 xtensa_core_status_check(): [esp32[OpenOCD] .cpu0] DSR (8080CC11) Debug: 1213 1733 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 1214 1735 xtensa.c:833 xtensa_core_status_check[OpenOCD] (): [esp32.cpu0] DSR (8080CC11) Debug: 1215 1736 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 1216 1739 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1217 1739 target.c:2471 targe[OpenOCD] t_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 1218 1742 xtensa.c:833 xtensa_core_status_check(): [[OpenOCD] esp32.cpu0] DSR (8080CC11) Debug: 1219 1742 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 122[OpenOCD] 0 1746 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1221 1746 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] Debug: 1222 1749 xtensa.c:833 xtensa_core_status_check(): [esp32.c[OpenOCD] pu0] DSR (8080CC11) Debug: 1223 1749 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debug: 1224 1751 xtensa.c:833 xtensa_cor[OpenOCD] e_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1225 1752 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 1226 1761 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1227 1762 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 1228 1765 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1229 1765 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 Debug: 1230 1768 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1231 1768 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 1232 1771 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1233 1771 target.c:2471 target_write_buffer(): writing buffe[OpenOCD] r of 512 byte at 0x40092200 [OpenOCD] Debug: 1234 1775 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DS[OpenOCD] R (8080CC11) Debug: 1235 1776 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 Debug: 1236 1777 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1237 1779 xtensa.c:833 xtensa_core_sta[OpenOCD] tus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1238 1779 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 1239 1780 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> 1060 Debug: 1240 1780 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1241 1780 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: [OpenOCD] 1242 1780 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1243 1781 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1244 1781 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 1245 1784 xtensa.c:8[OpenOCD] 33 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1246 1784 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug: 1247 17[OpenOCD] 87 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1248 1788 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 Debug: 1249 1788 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: [OpenOCD] 1250 1788 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1300 bytes at address 0x3ffc045c Debug: 1251 1789 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1252 1789 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc096f (1300 bytes) Debug: 1253 1789 target.c:1986 print_wa_layout(): 0x3ffc0970-0x3ffd7fff (95888 bytes) Debug: 1254 1790 target.c:2119 alloc_working_area_try_do(): allocated new wo[OpenOCD] rking area of 28 bytes at address 0x400925fc Debug: 1255 1790 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1256 1790 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 1257 1791 target.c:1986 print_wa_layout(): 0x40092618-0x40093fff (6632 bytes) Debug: 1258 1791 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 1259 1792 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1260 1792 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 88.786 ms Debug: 1261 1792 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 9 (6/3). Debug: 1262 1792 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc0970 Debug: 1263 1793 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 5 (a2) Debug: 1264 1793 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[1] = -1 (a3) Debug: 1265 1793 xtensa_[OpenOCD] algorithm.c:140 xtensa_algo_init(): Set arg[2] = 0 (a4) Debug: 1266 1794 target.c:2119 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x3ffc0970 Debug: 1267 1794 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1268 1794 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc096f (1300 bytes) Debug: 1269 1794 target.c:1986 print_wa_layout(): * 0x3ffc0970-0x3ffc098b (28 bytes) Debug: 1270 1795 target.c:1986 print_wa_layout(): 0x3ffc098c-0x3ffd7fff (95860 bytes) Debug: 1271 1795 esp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, sta[OpenOCD] ck 1300 bytes @ 0x3ffc0970 Debug: 1272 1795 xtensa.c:1267 xtensa_resume(): [esp32.cpu0] start Debug: 1273 1796 xtensa.c:1200 xtensa_prepare_resume(): [esp32.cpu0] current=0 address=0x400925fc, handle_breakpoints=1, debug_execution=1) Debug: 1274 1796 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 1275 1796 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cp[OpenOCD] u0] Writing back reg pc val 400925FC Debug: 1276 1797 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowbase val 00000000 Debug: 1277 1797 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowstart val 00000001 Debug: 1278 1797 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 00060025 Debug: 1279 1798 xtensa.c:701 xtensa_queue_write_dirty_user_regs_u32(): [esp32.cpu0] start Debug: 1280 1798 xte[OpenOCD] nsa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a0 value 00000000, num =1 Debug: 1281 1798 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 3FFC0960, num =2 Debug: 1282 1799 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Wr[OpenOCD] iting back reg a2 value 00000005, num =3 Debug: 1283 1799 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value FFFFFFFF, num =4 Debug: 1284 1799 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a4 value 3FFC0970, num =5 Debug: 1285 1800[OpenOCD] xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 40091994, num =9 D[OpenOCD] ebug: 1286 1801 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1287 1801 xtensa.c:1249 xtensa_do_resume(): [esp32.cpu0] start Debug: 1288 1802 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC01) Debug: 1289 1802 target.c:1860 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1290 1802 esp32.c:508 esp32_handle_target_event(): 2 Debug: 1291 1803 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 2 Debug: 1292 1803 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 2 Debug: 1293 1803 xtensa.c:2392 xtensa_handle_target_event(): 2 Debug: 1294 1803 esp_algorithm.c:218 algorithm_run(): Wait algorithm completion Debug: 1295 1804 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu0] start Debug: 1296 1807 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1297 1811 xtensa.c:833 xtensa_core[OpenOCD] _status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1298 1812 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1299 1812 xtensa.c:1808 xtensa_[OpenOCD] poll(): [esp32.cpu0] Target halted, pc=0x40092612, debug_reason=00000001, oldstate=00000004 Debug: 1300 1813 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1301 1813 xtensa.c:1814 xtensa_poll(): [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Debug: 1302 1814 esp_xtensa_smp.c:258 esp_xtensa_smp_update_[OpenOCD] halt_gdb(): GDB target 'esp32.cpu0' Debug: 1303 1814 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1304 1814 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1305 1815 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1306 1815 target.c:1860 target_call_event_callbacks(): [OpenOCD] target event 17 (debug-halted) for core esp32.cpu0 Debug: 1307 1815 esp32.c:508 esp32_handle_target_event(): 17 Debug: 1308 1815 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 17 Debug: 1309 1816 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 17 Debug: 1310 1816 xtensa.c:2392 xtensa_handle_target_event(): 17 Debug: 1311 1816 xtensa.c:2170 xtensa_wait_algorithm(): Read mem params Debug: 1312 1816 xtensa.c:2172 xtensa_wait_algorithm()[OpenOCD] : Check mem param @ 0x3ffc0970 Debug: 1313 1816 xtensa.c:2174 xtensa_wait_algorithm(): Read mem param @ 0x3ffc0970 Debug: 1314 1816 target.c:2536 target_read_buffer(): reading buffer of 28 byte at 0x3ffc0970 Debug: 1315 1817 xtensa.c:833 xtensa_core_statu[OpenOCD] s_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1316 1818 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a15: 0x000050aa -> 0x00000000 Debug: 1317 1818 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a14: 0x00000020 -> 0x00000000 Debug: 1318 1818 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a13: 0x01000000 -> 0x00000000 Debug: 1319 1818 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a12: 0x00000001 -> 0x00000000 Debug: 1320 1819 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0870 -> 0x00000000 Debug: 1321 1819 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a8: 0x80092610 -> 0x00000000 Debug: 1322 1819 xtensa[OpenOCD] .c:2204 xtensa_wait_algorithm(): restoring register a4: 0x3ffc0970 -> 0x00000000 Debug: 1323 1820 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a3: 0xffffffff -> 0x00000000 Debug: 1324 1820 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a1: 0x3ffc0960 -> 0x00000000 Debug: 1325 1820 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ccount: 0x00005cf6 -> 0x00000004 Debug: 1326 1820 xtensa.c:2194 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1327 1821 xtensa.c:2204 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1328 1821 xtensa.c:2204 xtensa_wait_algorithm(): restoring register epc6: 0x40092612 -> 0x40000400 Debug: 1329 1821 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1330 1823 xtensa.c:2204 xtensa_wait_algorithm(): restoring register configid0: 0x40092612 -> 0x40000400 Debug: 1331 1823 xtensa.c:2204 xtensa_wait_algorithm(): restoring register lcount: 0xffffffff -> 0x00000000 Debug: 1332 1823 xtensa.c:2204 xtensa_wait_algorithm(): restoring register lend: 0x4000c2f6 -> 0x00000000 Debug: 1333 1823 xtensa.c:2204 xtensa_wait_algorithm(): restoring register lbeg: 0x4000c2e0 -> 0x00000000 Debug: 1334 1823 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar45: 0x08000000 -> 0x00000000 Debug: 1335 1824 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar43: 0xfffffff7 -> 0x00000000 Debug: 1336 1824 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar42: 0x3ff00044 -> 0x00000000 Debug: 1337 1824 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar41: 0x000008ef -> 0x00000000 Debug: 1338 1825 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar40: 0xffffffc0 -> 0x00000000 Debug: 1339 1825 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar39: 0x00000010 -> 0x00000000 Debug: 1340 1825 xtensa.c:220[OpenOCD] 4 xtensa_wait_algorithm(): restoring register ar38: 0x50000000 -> 0x00000000 Debug: 1341 1827 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar37: 0x3ffc0850 -> 0x00000000 Debug: 1342 1827 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar36: 0x00000008 -> 0x00000000 Debug: 1343 1827 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar35: 0x0000002f -> 0x00000000 Debug: 1344 1828 xtensa.c:2204 xtensa_wait_algorithm(): restoring register[OpenOCD] ar33: 0x3ffc07d0 -> 0x00000000 Debug: 1345 1828 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar32: 0x800906bd -> 0x00000000 Debug: 1346 1828 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar31: 0x3ff10000 -> 0x00000000 Debug: 1347 1828 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar29: 0x00000006 -> 0x00000000 Debug: 1348 1829 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar28: 0x3ff10014 -> 0x00000000 Debug: 1349 1830 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar27: 0x0000000[OpenOCD] 6 -> 0x00000000 Debug: 1350 1830 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar26: 0x003fffff -> 0x00000000 Debug: 1351 1830 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar25: 0x50000000 -> 0x00000000 Debug: 1352 1830 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar24: 0x00000006 -> 0x00000000 Debug: 1353 1830 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar23: 0x3ff10000 -> 0x00000000 Debug: 1354 1830 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar22: 0x00000006 -> 0x00000000 Debug: 1355 1831 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar20: 0x00000002 -> 0x00000000 Debug: 1356 1832 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar19: 0x3ffc0970 -> 0x00000000 Debug: 1357 1832 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc0830 -> 0x00000000 Debug: 1358 1832 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar16: 0x80091d83 -> 0x00000000 Debug: 1359 1832 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar15: 0x000050aa -> 0x00000000 Debug: 1360 1832 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar14: 0x00000020 -> 0x00000000 Debug: 1361 1832 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar13: 0x01000000 -> 0x00000000 Debug: 1362 1834 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar12: 0x00000001 -> 0x00000000 Debug: 1363 1834 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0870 -> 0x00000000 Debug: 1364 1834 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar8: 0x80092610 -> 0x00000000 Debug: 1365 1834 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar4: 0x3ffc0970 -> 0x00000000 Debug: 1366 1834 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar3: 0xffffffff -> 0x00000000 Debug: 1367 1834 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc0960 -> 0x00000000 Debug: 1368 1835 xtensa.c:2204 xtensa_wait_algorithm(): restoring register pc: 0x40092612 -> 0x40000400 Debug: 1369 1835 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 1370 1835 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 40000400 Debug: 1371 1835 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg lbeg val 00000000 Debug: 1372 1836 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg lend val 00000000 Debug: 1373 1836 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg lcount val 00000000 Debug: 1374 1836 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg configid0 val 40000400 Debug: 1375 1837 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 0000001F Debug: 1376 1837 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg epc6 val 40000400 Debug: 1377 1837 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg eps6 val 0000001F Debug: 1378 1838 xtens[OpenOCD] a.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ccount val 00000004 Debug: 1379 1840 xtensa.c:701 xtensa_queue_write_dirty_user_regs_u32(): [esp32.cpu0] start Debug: 1380 1840 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 00000000, num =2 Debug: 1381 1841 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value 00000000, num =4 Debug: 1382 1841 xtensa.c:650 xtensa_write_d[OpenOCD] irty_registers(): [esp32.cpu0] Writing back reg a4 value 00000000, num =5 Debug: 1383 1842 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 00000000, num =9 Debug: 1384 1842 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a9 value 00000000, num =10 Debug: 1385 1842 xtensa.c:650 xtensa_write_di[OpenOCD] rty_registers(): [esp32.cpu0] Writing back reg a12 value 00000000, num =13 Debug: 1386 1842 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a13 value 00000000, num =14 Debug: 1387 1842 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a14 value 00000000, num =15 Debug: 1388 1843 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a15 value 00000000, num =16[OpenOCD] Debug: 1389 1843 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar1 value 00000000, num =1 Debug: 1390 1844 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar3 value 00000000, num =3 Debug: 1391 1844 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar4 value 00000000, num =4 Debug: 1392 1844 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar8 value 00000000, num =8 Debug: 1393 1844 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar9 value 00000000, num =9 Debug: 1394 1845 xtensa.[OpenOCD] c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar12 value 00000000, num =12 Debug: 1395 1846 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar13 value 00000000, num =13 Debug: 1396 1846 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar14 value 00000000, num =14 Debug: 1397 1846 xtensa.c:674 xtensa_write_dirty_r[OpenOCD] egisters(): [esp32.cpu0] Writing back reg ar15 value 00000000, num =15 Debug: 1398 1846 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar16 value 00000000, num =16 Debug: 1399 1847 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar17 value 00000000, num =17 Debug: 14[OpenOCD] 00 1848 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar19 value 00000000, num =19 Debug: 1401 1848 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar20 value 00000000, num =20 Debug: 1402 1848 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar22 value 00000000, num =22 Debug: 1403 1848 xtensa.c:674 xtensa_write_[OpenOCD] dirty_registers(): [esp32.cpu0] Writing back reg ar23 value 00000000, num =23 Debug: 1404 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar24 value 00000000, num =24 Debug: 1405 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar25 value 00000000, num =25 Debug: 1406 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar26 value 00000000, num =26 Debug: 1407 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar27 value 00000000, num =27 Debug: 1408 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar28 value 00000000, num =28 Debug: 1409 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar29 value 00000000, num =29 Debug: 1410 1849 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar31 value 00000000, num =31 Debug: 1411 1850 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar32 value 00000000, num =32 Debug: 1412 1850 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar33 value 00000000, num =33 Debug: 1413 1850 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar35 value 00000000, num =35 Debug: 1414 1850 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar36 value 00000000, num =36 Debug: 1415 1851 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar37 value 00000000, num =37 Debug: 1416 1851 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar38 value 00000000, num =38 Debug: 1417 1851 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar39 value 00000000, num =39 Debug: 1418 1851 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar40 value 00000000, num =40 Debug: 1419 1851 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar41 value 00000000, num =41 Debug: 1420 1851 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar42 value 00000000, num =42 Debug: 1421 1852 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar43 value 00000000, num =43 Debug: 1422 1852 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar45 value 00000000, num =45 Debug: 1423 1854 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1424 1854 esp_algorithm.c:246 algorithm_run(): Got algorithm RC 0x0 Debug: 1425 1854 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x3ffc0970 Debug: 1426 1854 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1427 1854 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc096f (1300 bytes) Debug: 1428 1855 target.c:1986 print_wa_layout(): 0x3ffc0970-0x3ffd7fff (95888 bytes) Debug: 1429 1855 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x400925fc Debug: 1430 1855 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1431 1855 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1432 1855 target.c:2206 target_free_working_area_restore(): freed 1300 bytes of working area at address 0x3ffc045c Debug: 1433 1856 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1434 1856 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1435 1856 target.c:2206 target_free_working_area_restore(): freed 9724 bytes of working area at address 0x40090000 Debug: 1436 1856 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1437 1856 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3ffc0000 Debug: 1438 1857 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1439 1857 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 Debug: 1440 1857 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Info : 1441 1858 esp_flash.c:402 esp_flash_get_mappings(): Flash mapping 0: 0x10020 -> 0x3f400020, 266 KB Info : 1442 1858 esp_flash.c:402 esp_flash_get_mappings(): Flash mapping 1: 0x60020 -> 0x400d0020, 1105 KB Debug: 1443 1858 esp_flash.c:239 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 1444 1859 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1445 1859 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 Debug: 1446 1859 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 1447 1859 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections Debug: 1448 1860 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 1449 1860 target.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 bytes at address 0x40090000 Debug: 1450 1860 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1451 1860 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1452 1860 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 Debug: 1453 1863 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1454 1863 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 1455 1866 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1456 1867 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 Debug: 1457 1869 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1458 1870 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 Debug: 1459 1874 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1460 1874 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 1461 1877 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1462 1877 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 1463 1881 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1464 1881 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 1465 1883 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1466 1884 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 1467 1887 xtensa[OpenOCD] .c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1468 1887 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 1469 1889 xtensa.c:833 xtensa_core_status_check(): [e[OpenOCD] sp32.cpu0] DSR (8080CC11) Debug: 1470 1890 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 1471 1893[OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1472 1893 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 1473 1896[OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1474 1896 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] Debug: 147[OpenOCD] 5 1899 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1476 1899 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debug: 1477 1901 xtensa.c:833 xtensa_core_status_c[OpenOCD] heck(): [esp32.cpu0] DSR (8080CC11) Debug: 1478 1902 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 1479 1905 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1480 1905 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 Debug: 1481 1908 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1482 1908 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 1483 1911 xtensa.c:833 xtensa_core_stat[OpenOCD] us_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1484 1911 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 1485 19[OpenOCD] 13 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1486 1914 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] Debug: 1487 1916 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1488 1916 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 Debug: 1489 1917 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 14[OpenOCD] 90 1920 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1491 1920 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 1492 1920 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> 1060 Debug: 1493 1920 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1494 1921 target.c:211[OpenOCD] 9 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: 1495 1921 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1496 1921 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1497 1921 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 1498 1924 xtensa.c:833 xtensa_core_st[OpenOCD] atus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1499 1924 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug: 1500 1927 xtensa.c:833 xtensa_co[OpenOCD] re_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1501 1927 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 [OpenOCD] Debug: [OpenOCD] 1502 1928 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1503 1928 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1024 byte[OpenOCD] s at address 0x3ffc045c Debug: 1504 1928 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1505 1929 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc085b (1024 bytes) Debug: 1506 192[OpenOCD] 9 target.c:1986 print_wa_layout(): 0x3ffc085c-0x3ffd7fff (96164 bytes) Debug: 1507 1929 target.c:2119 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x400925fc Debug: 150[OpenOCD] 8 1929 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1509 1929 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 1510 1929 target.c:1986 print_wa_layout(): 0x40092618-0x40093fff[OpenOCD] (6632 bytes) Debug: 1511 1929 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 1512 1930 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1513 1930 esp_algorithm.c:442 algorithm_load_func_image(): Stub l[OpenOCD] oaded in 70.408 ms Debug: 1514 1930 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 7 (6/1). Debug: 1515 1931 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc085c Debug: 1516 1931 xtensa_algorithm.c:64 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc0850 [OpenOCD] Debug: 1517 1931 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 4 (a2) Debug: 1518 1931 esp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, stack 1024 bytes @ 0x3ffc085c Debug: 1519 1931 xtensa.c:1267 xtensa_resume(): [esp32.cpu0] start Debug: 1520 1931 xtensa.c:1200 xtensa_prepare_resume(): [esp32.cpu0] [OpenOCD] current=0 address=0x400925fc, handle_breakpoints=1, debug_execution=1) Debug: 1521 1932 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 1522 1932 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 400925FC Debug: 1523 1932 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing bac[OpenOCD] k reg windowbase val 00000000 Debug: 1524 1932 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowstart val 00000001 Debug: 1525 1933 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 00060025 Debug: 1526 1933 xtensa.c:701 xtensa_queue_write_dirty_user_reg[OpenOCD] s_u32(): [esp32.cpu0] start Debug: 1527 1933 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a0 value 00000000, num =1 Debug: 1528 1933 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 3FFC0840, num =2 Debug: 1529 1934 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a2 value 00000004, num =3 Debug: 15[OpenOCD] 30 1934 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value 00000000, num =4 Debug: 1531 1934 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 40091994, num =9 Debug: 1532 1935 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1533 1935 xtensa.c:1249 xtensa_do_resume(): [esp32.cpu0] start Debug: 1534 1936 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1535 1936 target.c:1860 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1536 1936 esp32.c:508 esp32_handle_target_event(): 2 Debug: 1537 1937 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 2 Debug: 1538 1937 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 2 Debug: 1539 1937 xtensa.c:2392 xtensa_handle_target_event(): 2 Debug: 1540 1937 esp_algorithm.c:218 algorithm_run(): Wait algorithm completion Debug: 1541 1939 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu0] start [OpenOCD] Debug: 1542 1941 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1543 194[OpenOCD] 5 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 15[OpenOCD] 44 1946 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1545 1946 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x40092612, debug_reason=00000001, oldstate=00000004 [OpenOCD] Debug: 1546 1946 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Halt reason=0x00000008, exc_cause=0, dsr=0x8080cc11 Info : 1547 1946 xtensa.c:1814 xtensa_poll(): [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00[OpenOCD] 000001 [OpenOCD] Debug: 154[OpenOCD] 8 1948 esp_xtensa_smp.c:258 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 1549 1948 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu0' Debug: 1550 1948 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1551 [OpenOCD] 1948 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_gdb(): exit Debug: 1552 1949 target.c:1860 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1553 1949 esp32.c:508 esp32_handle_target_event(): 17 Debug: 1554 1949 esp_xtensa_smp.c:608 esp_xtensa_smp_handl[OpenOCD] e_target_event(): 17 Debug: 1555 1949 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 17 Debug: 1556 1949 xtensa.c:2392 xtensa_handle_target_event(): 17 Debug: 1557 1949 xtensa.c:2170 xtensa_wait_algorithm(): Read mem params Debug: 1558 1950 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a14: 0x3ffc0304 -> 0x00000000 Deb[OpenOCD] ug: 1559 1950 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a12: 0x00000001 -> 0x00000000 Debug: 1560 1950 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a10: 0x01000000 -> 0x00000000 Debug: 1561 1950 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a9: 0x3ffc0750 -> 0x00000000 Debug: 1562 1951 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a8: 0x80092610 -> 0x00000000 Debug: 1563 1951 xtensa.c:2204 xtensa_wait_algorithm(): restoring register a2: 0x01000000 -> 0x00000000 Debug: 1564 1951 xtensa.c:2204 xtensa_wait_algorithm(): restoring register [OpenOCD] a1: 0x3ffc0840 -> 0x00000000 Debug: 1565 1952 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ccount: 0x00000865 -> 0x00000004 Debug: 1566 1952 xtensa.c:2194 xtensa_wait_algorithm(): Skip restoring register debugcause: 0x00000008 -> 0x00000020 Debug: 1567 1952 xtensa.c:2204 xtensa_wait_algorithm(): restoring register eps6: 0x00060025 -> 0x0000001f Debug: 1568 1953 xtensa.c:2204 xtensa_wait_algorithm(): restoring register epc6: 0x40092612 -> 0x40000400 Debug: 1569 1953 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ps: 0x00060025 -> 0x0000001f Debug: 1570 1953 xtensa.c:2204 xtensa_wait_algorithm[OpenOCD] (): restoring register configid0: 0x40092612 -> 0x40000400 Debug: 1571 1954 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar31: 0x00040000 -> 0x00000000 Debug: 1572 1954 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar30: 0x80000040 -> 0x00000000 Debug: 1573 1954 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar29: 0x70000000 -> 0x00000000 Debug: 1574 1954 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar28: 0x3ff42000 -> 0x00000000 Debug: 1575 1955 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar27: 0x3ff42010 -> 0x00000000 Debug: 1576 1955 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar26: 0x3ffae270 -> 0x00000000 Debug: 1577 1956 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar24: 0x3ff42024 -> 0x00000000 Debug: 1578 1956 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar22: 0x80000040 -> 0x00000000 Debug: 1579 1956 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar21: 0x5c000007 -> 0x00000000 Debug: 1580 1956 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar20: 0x70000000 -> 0x00000000 Debug: 1581 1957 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar19: 0x01000000 -> 0x00000000 Debug: 1582 1957 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar17: 0x3ffc0730 -> 0x00000000 Debug: 1583 1957 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar16: 0x80091b40 -> 0x00000000 Debug: 1584 1957 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar14: 0x3ffc0304 -> 0x00000000 Debug: 1585 1957 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar12: 0x00000001 -> 0x00000000 Debug: 1586 1958 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar10: 0x01000000 -> 0x00000000 Debug: 1587 1958 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar9: 0x3ffc0750 -> 0x00000000 Debug: 1588 1958 xtensa.c:2204 xtensa_wait_algorithm(): restoring reg[OpenOCD] ister ar8: 0x80092610 -> 0x00000000 Debug: 1589 1959 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar2: 0x01000000 -> 0x00000000 Debug: 1590 1959 xtensa.c:2204 xtensa_wait_algorithm(): restoring register ar1: 0x3ffc0840 -> 0x00000000 Debug: 1591 1959 xtensa.c:2204 xtensa_wait_algorithm(): restoring register pc: 0x40092612 -> 0x40000400 Debug: 1592 1959 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.cpu0] start Debug: 1593 1960 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 40000400 Debug: 1594 1960 xtensa.c:585 xtensa_write_dirty_registers()[OpenOCD] : [esp32.cpu0] Writing back reg configid0 val 40000400 Debug: 1595 1960 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 0000001F Debug: 1596 1960 xtensa.c:585 xtensa_write_dirty_regi[OpenOCD] sters(): [esp32.cpu0] Writing back reg epc6 val 40000400 Debug: 1597 1960 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg eps6 val 0000001F Debug: [OpenOCD] 1598 1961 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ccount val 00000004 Debug: 1599 1961 xtensa.c:701 xtensa_queue_write_d[OpenOCD] irty_user_regs_u32(): [esp32.cpu0] start Debug: 1600 1961 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 00000000, num =2 [OpenOCD] Debug: 1601 1961 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a2 value 00000000, num =3 Debug: 1602 1961 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back re[OpenOCD] g a3 value 00000000, num =4 Debug: 1603 1962 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a8 value 00000000, num =9 Debug: 1604 1962 xtensa.c:650 xtensa_write_dirty_regis[OpenOCD] ters(): [esp32.cpu0] Writing back reg a9 value 00000000, num =10 Debug: 1605 1962 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a10 value 00000000, num =11 [OpenOCD] Debug: 1606 1962 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a12 value 00000000, num =13 Debug: 1607 1962 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1[OpenOCD] 4 value 00000000, num =15 Debug: 1608 1963 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar1 value 00000000, num =1 Debug: 1609 1963 xtensa.c:674 xtensa_wri[OpenOCD] te_dirty_registers(): [esp32.cpu0] Writing back reg ar2 value 00000000, num =2 Debug: 1610 1963 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar8 value 00000000, num =8 D[OpenOCD] ebug: 1611 1963 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar9 value 00000000, num =9 Debug: 1612 1963 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu[OpenOCD] 0] Writing back reg ar10 value 00000000, num =10 Debug: 1613 1964 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar12 value 00000000, num =12 Debug: [OpenOCD] 1614 1964 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar14 value 00000000, num =14 Debug: 1615 1964 xtensa.c:674 xtensa_write_dirty_regis[OpenOCD] ters(): [esp32.cpu0] Writing back reg ar16 value 00000000, num =16 Debug: 1616 1964 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar17 value 00000[OpenOCD] 000, num =17 Debug: 1617 1965 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar19 value 00000000, num =19 Debug: 1618 1965 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing [OpenOCD] back reg ar20 value 00000000, num =20 Debug: 1619 1965 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar21 value 00000000, num =21 Debug: 1620 1965 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar22 value [OpenOCD] 00000000, num =22 Debug: 1621 1966 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar24 value 00000000, num =24 Debug: 1622 1966 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar26 value 00000000, num =26 Debug: 1623 1966 xtensa.c:674 xtensa_write_dirty_regist[OpenOCD] ers(): [esp32.cpu0] Writing back reg ar27 value 00000000, num =27 Debug: 1624 1967 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar28 value 00000000, num =28 Debug: 1625 1967 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar29 value 00000000, num =29 Debug: 1626 1967 xtensa.c:674 xtensa_write_dir[OpenOCD] ty_registers(): [esp32.cpu0] Writing back reg ar30 value 00000000, num =30 Debug: 1627 1967 xtensa.c:674 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ar31 value 00000000, num =31 [OpenOCD] Debug: 1628 1968 xtensa.c:833 xtensa_core_status_check(): [e[OpenOCD] sp32.cpu0] DSR (8080CC11) Debug: 1629 1968 esp_algorithm.c:246 algorithm_run(): Got algorithm RC 0x1000000 Debug: 1630 1969 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x400925fc Debug: 1631 1969 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1632 1969 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1633 1969 target.c:2206 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc045c Debug: 1634 1969 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1635 1970 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1636 1970 target.c:2206 target_free_working_area_restore(): freed 9724 bytes of working area at address 0x40090000 Debug: 1637 1970 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1638 1970 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3ffc0000 Debug: 1639 1971 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1640 1971 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 Debug: 1641 1971 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Debug: 1642 1972 esp_flash.c:344 esp_flash_get_size(): esp_flash_get_size size 0x1000000 Info : 1643 1972 esp_flash.c:1003 esp_flash_probe(): Auto-detected flash bank 'esp32.cpu1.flash' size 16384 KB Info : 1644 1972 esp_flash.c:1005 esp_flash_probe(): Using flash bank 'esp32.cpu1.flash' size 16384 KB Debug: 1645 1972 esp_flash.c:1022 esp_flash_probe(): allocated 4096 sectors Debug: 1646 1972 command.c:166 script_debug(): command - echo ** Programming Started ** [OpenOCD] User : 1647 1974 command.c:696 handle_echo(): ** Programming Started ** Debug: 1648 1975 command.c:166 script_debug(): command - esp flash_stub_clock_boost on [OpenOCD] Debug: 1649 1976 esp_flash.c:1543 esp_flash_parse_cmd_clock_boost(): Clock boost is on Debug: 1650 1976[OpenOCD] esp_flash.c:239 esp_flasher_algorithm_init(): base=00000000 set=0 Debug: 1651 1976 xtensa.c:833 xtensa_core_s[OpenOCD] tatus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1652 1977 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 [OpenOCD] Debug: 1653 1977 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 1654 1977 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections Debug[OpenOCD] : 1655 1977 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 1656 1977 target.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 bytes at address 0x40[OpenOCD] 090000 Debug: 1657 1978 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1658 1978 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1659 1978 target.c:2[OpenOCD] 471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 1660[OpenOCD] 1980 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1661 1980 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 1662 1982 xtensa.c:833 xtensa_c[OpenOCD] ore_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1663 1982 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 1664 1986 xtensa.c[OpenOCD] :833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1665 1986 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 [OpenOCD] Debug: 166[OpenOCD] 6 1991 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1667 1991 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 [OpenOCD] Debug: 1668 1994 xtensa.c:833 xtensa_core_status_check(): [esp32.cp[OpenOCD] u0] DSR (8080CC11) Debug: 1669 1994 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 1670 [OpenOCD] 1996 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1671 1996 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 [OpenOCD] Debug: 1672[OpenOCD] 1999 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1673 1999 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 1674 2002 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0][OpenOCD] DSR (8080CC11) Debug: 1675 2002 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 Debug: 1676 2004 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1677 2004 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 1678 2007 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1679 2007 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 1680 2010 xtensa.c:833 xtensa_core_sta[OpenOCD] tus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1681 2010 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] Debug: 1682 2013 xtensa.c:833 x[OpenOCD] tensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1683 2013 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debug: 16[OpenOCD] 84 2015 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1685 2015 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 1686 2018 xtensa.c:833 xtensa_core_s[OpenOCD] tatus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1687 2018 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 1688 2023 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1689 2023 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 1690 2026 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1691 2026 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 1692 2029 xtensa.c:833 xtensa_core_status_[OpenOCD] check(): [esp32.cpu0] DSR (8080CC11) Debug: 1693 2029 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] Debug: 1[OpenOCD] 694 2034 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1695 2034 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 [OpenOCD] Debug: 16[OpenOCD] 96 2035 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1697 2038 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1698 2038 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 1699 203[OpenOCD] 8 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> 1060 Debug: 1700 2039 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1701 2039 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: 1702 2039 target.c:1986 print_wa_layout(): * 0x3ffc0000[OpenOCD] -0x3ffc045b (1116 bytes) Debug: 1703 2039 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1704 2040 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 1705 2[OpenOCD] 046 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1706 2046 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug: 1707 2049 xtensa.c:833 xtensa_core_status_check(): [esp32.cp[OpenOCD] u0] DSR (8080CC11) Debug: 1708 2049 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 [OpenOCD] Debug: 1709 2050 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1710 2050 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc045c Debug: 1711 2050 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1712 2050 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc085b (1024 bytes) Debu[OpenOCD] g: 1713 2050 target.c:1986 print_wa_layout(): 0x3ffc085c-0x3ffd7fff (96164 bytes) Debug: 1714 2051 target.c:2119 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x400925fc Debug: 1715 2051 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1716 2051 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 1717[OpenOCD] 2051 target.c:1986 print_wa_layout(): 0x40092618-0x40093fff (6632 bytes) Debug: 1718 2051 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 1719 2052 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1720 2053 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 76.059 ms Debug: 1721 2053 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 8 (6/2). Debug: 1722 2053 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc085c Debug: 1723 2053 xtensa_algorithm.c:64 xtensa_algo[OpenOCD] _regs_init_start(): Adjust stack addr to 0x3ffc0850 Debug: 1724 2054 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 11 (a2) Debug: 1725 2054 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[1] = -1 (a3) Debug: 1726 2054 esp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, stack 1024 bytes @ 0x3ffc085c Debug: 1727 2054 xtensa.c:1267 xte[OpenOCD] nsa_resume(): [esp32.cpu0] start Debug: 1728 2054 xtensa.c:1200 xtensa_prepare_resume(): [esp32.cpu0] current=0 address=0x400925fc, handle_breakpoints=1, debug_execution=1) Debug: 1729 2055 xtensa.c:572 xtensa_write_dirty_registers(): [esp32.c[OpenOCD] pu0] start Debug: 1730 2055 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg pc val 400925FC Debug: 1731 2055 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowba[OpenOCD] se val 00000000 Debug: 1732 2055 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg windowstart val 00000001 Debug: 1733 2056 xtensa.c:585 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg ps val 00060025 Debug: 1734 2056 xtensa.c:701 xtensa_queue_write_dirty_user_regs_u32(): [OpenOCD] [esp32.cpu0] start Debug: 1735 2056 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a0 value 00000000, num =1 Debug: 1736 2056 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a1 value 3FFC0840, num =2 Debug: 1737 2056 xtensa.c:650 xtensa_write_dirty_registers(): [esp[OpenOCD] 32.cpu0] Writing back reg a2 value 0000000B, num =3 Debug: 1738 2057 xtensa.c:650 xtensa_write_dirty_registers(): [esp32.cpu0] Writing back reg a3 value FFFFFFFF, num =4 Debug: 1739 2057 xtensa.c:650 xtensa_write_dirty_register[OpenOCD] s(): [esp32.cpu0] Writing back reg a8 value 40091994, num =9 [OpenOCD] Debug: 1740 205[OpenOCD] 8 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1741 2058 xtensa.c:1249 xtensa_do_resume(): [esp32.cpu0] start [OpenOCD] Debug: 1742 2058 xtensa.c:833 xtensa_core_status_ch[OpenOCD] eck(): [esp32.cpu0] DSR (8080CC01) Debug: 1743 2058 target.c:1860 target_call_event_callbacks(): target event 2 (resumed) for core esp32.cpu0 Debug: 1744 2059 esp32.c:508 esp32_handle_target_event(): 2 Debug: 1745 2059 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 2 Debug: 1746 2059 esp_xtensa.c:80 esp_xtensa_handle_target_event():[OpenOCD] 2 Debug: 1747 2059 xtensa.c:2392 xtensa_handle_target_event(): 2 Debug: 1748 2059 esp_algorithm.c:218 algorithm_run(): Wait algorithm completion [OpenOCD] Debug: 1749 2060 target.c:3347 target_wait_state(): waiting for target halted... [OpenOCD] ❌ Error: 1750 4206[OpenOCD] 1 target.c:3355 target_wait_state(): timed out while waiting for target halted Debug: 1751 42061 xtensa.c:1163 xtensa_halt(): [esp32.cpu0] start [OpenOCD] Debug: 17[OpenOCD] 52 42066 xtensa.c:1174 xtensa_halt(): [esp32.cpu0] Core status 0x8080cc01 [OpenOCD] Debug: 17[OpenOCD] 53 42067 xtensa.c:934 xtensa_fetch_all_regs(): [esp32.cpu0] start [OpenOCD] Debug: 1754 [OpenOCD] 42070 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (80A0CC11) [OpenOCD] Debug: 1755 42074 xtensa.c:83[OpenOCD] 3 xtensa_core_status_check(): [esp32.cpu0] DSR (80A0CC11) [OpenOCD] Debug: 1756 42076 xte[OpenOCD] nsa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (80A0CC11) Debug: 1757 42076 xtensa.c:1808 xtensa_poll(): [esp32.cpu0] Target halted, pc=0x400[OpenOCD] 82343, debug_reason=00000000, oldstate=00000004 Debug: 1758 42077 xtensa.c:1812 xtensa_poll(): [esp32.cpu0] Halt reason=0x00000020, exc_cause=0, dsr=0x80a0[OpenOCD] cc11 Info : 1759 42077 xtensa.c:1814 xtensa_poll(): [esp32.cpu0] Target halted, PC=0x40082343, debug_reason=00000000 [OpenOCD] Debug: 1760 42077 e[OpenOCD] sp_xtensa_smp.c:258 esp_xtensa_smp_update_halt_gdb(): GDB target 'esp32.cpu0' Debug: 1761 42078 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_[OpenOCD] gdb(): Check target 'esp32.cpu0' Debug: 1762 42079 esp_xtensa_smp.c:272 esp_xtensa_smp_update_halt_gdb(): Check target 'esp32.cpu1' Debug: 1763 42079 esp_xtensa_smp.c:317 esp_xtensa_smp_update_halt_g[OpenOCD] db(): exit Debug: 1764 42079 target.c:1860 target_call_event_callbacks(): target event 17 (debug-halted) for core esp32.cpu0 Debug: 1765 42079 esp32.c:508 esp32_handle_target_event(): 17 Debug: 176[OpenOCD] ❌ 6 42079 esp_xtensa_smp.c:608 esp_xtensa_smp_handle_target_event(): 17 Debug: 1767 42080 esp_xtensa.c:80 esp_xtensa_handle_target_event(): 17 Debug: 1768 42080 xtensa.c:2392 xtensa_handle_target_event(): 17 Error: 1769 42080 xtensa.c:2140 xtensa_wait_algorithm(): [OpenOCD] ❌ xtensa_wait_algorithm: not halted 0, pc 0x40082343, ps 0x60423 Error: 1770 42080 esp_algorithm.c:225 algorithm_run(): Failed to wait algorithm (-302)! Error: 1771 42080 esp_algorithm.c:243 algorithm_run(): Algorithm run failed (-302)! Debug: 1772 42080 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x400925fc Debug: 1773 42080 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1774 42081 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1775 42081 target.c:2[OpenOCD] 206 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc045c Debug: 1776 42081 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1777 42081 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1778 42082 target.c:2206 target_free_working_area_restore(): freed 9724 bytes of working area at address 0x40090000 Debug: 1779 42082 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1780 42082 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3ffc0000 Debug: 1781 42082 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1782 42082 xtens[OpenOCD] a.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Debug: 1783 42084 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Debug: 1784 4[OpenOCD] 2084 esp_flash.c:1297 esp_flash_boost_clock_freq(): esp_flash_boost_clock_freq old_freq (0) new_freq (-1) Debug: 1785 42085 command.c:166 script_debug(): command - flash write_image erase c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin 0x1000 [OpenOCD] Debug: 1786[OpenOCD] 42087 configuration.c:99 find_file(): found c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin Debug: 1787 42087 configu[OpenOCD] ration.c:99 find_file(): found c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin Debug: 1788 42088 core.c:940 flash_write_unlock_verify([OpenOCD] ): image_read_section: section = 0, t_section_num = 0, section_offset = 0, buffer_idx = 0, size_read = 27936 Debug: 1789[OpenOCD] 42088 esp_flash.c:239 esp_flasher_algorithm_init(): base=00000000 set=0 [OpenOCD] Debug: 1790 42090 xtensa.c:[OpenOCD] 833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1791 42090 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 [OpenOCD] Debug: 1792 42090 xtensa.c:792[OpenOCD] xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 1793 42091 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections Debug: 1794 42091 esp_algorithm.c:31[OpenOCD] 9 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 1795 42091 target.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 bytes at address 0x40090000 De[OpenOCD] bug: 1796 42091 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1797 42091 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1798 42092 target.c:2471 target_wri[OpenOCD] te_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 179[OpenOCD] 9 42095 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1800 42095 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 18[OpenOCD] 01 42098 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1802 42098 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 1803 42100 xtensa.c:83[OpenOCD] 3 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1804 42100 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 [OpenOCD] Debug: 1805 42103 xtensa.c:8[OpenOCD] 33 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1806 42104 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 [OpenOCD] Debug: 180[OpenOCD] 7 42107 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1808 42107 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 1809 [OpenOCD] 42110 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1810 42110 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 [OpenOCD] Debug: 1811 [OpenOCD] 42114 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1812 42114 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 1813 42117 xtensa.c:833 xtensa_core_status_check():[OpenOCD] [esp32.cpu0] DSR (8080CC11) Debug: 1814 42117 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 1815[OpenOCD] 42121 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1816 42121 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 1817 [OpenOCD] 42124 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1818 42124 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 1819 4212[OpenOCD] 8 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1820 42129 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] De[OpenOCD] bug: 1821 42133 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1822 42133 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debu[OpenOCD] g: 1823 42136 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1824 42136 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 1825 [OpenOCD] 42139 [OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1826 42140 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 1827[OpenOCD] 42144 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1828 42144 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 1829[OpenOCD] 42147 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1830 42147 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 1831 42151 xtensa.c:833 xtensa_core_statu[OpenOCD] s_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1832 42151 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] Debug: 1833 [OpenOCD] 42154 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1834 42154 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 [OpenOCD] Debug: 1835 42157 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 18[OpenOCD] 36 42166 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1837 42166 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 1838 42166 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> [OpenOCD] 1060 Debug: 1839 42167 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1840 42167 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3[OpenOCD] ffc0000 Debug: 1841 42167 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1842 42167 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1843[OpenOCD] 42168 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 1844 42171 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1845 42171 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 Debug: 1846 42174 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1847 42174 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 Debug: 1848 42175 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1849 42175 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1024 bytes at address 0x3ffc045c Debug: 1850 42175 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1851 42175 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc085b (1024 bytes) Debug: 1852 42175 target.c:1986 print_wa_layout(): 0x3ffc085c-0x3ffd7fff (96164 bytes) Debug: 1853 42175 target.c:2119 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x400925fc Debug: 1854 42175 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1855 42175 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 1856 42176 target.c:1986 print_wa_layout(): 0x40092618-0x40093fff (6632 bytes) Debug: 1857 42176 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 1858 42177 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1859 42177 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 87.18 ms Debug: 1860 42177 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 9 (6/3). Debug: 1861 42178 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr[OpenOCD] 0x3ffc085c Debug: 1862 42179 xtensa_algorithm.c:64 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc0850 Debug: 1863 42179 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 2 (a2) Debug: 1864 42179 xtensa_algorithm.c:140 xtensa_algo[OpenOCD] _init(): Set arg[1] = 4096 (a3) Debug: 1865 42179 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[2] = 28672 (a4) Debug: 1866 42179 esp_algorithm.c:196 algorithm_[OpenOCD] ❌ run(): Algorithm start @ 0x400925fc, stack 1024 bytes @ 0x3ffc085c Error: 1867 42180 target.c:920 target_start_algorithm(): Target is already running an algorithm Error: 1868 42180 esp_algorithm.c:203 algorit[OpenOCD] hm_run(): Failed to start algorithm (-4)! Debug: 1869 42181 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x400925fc Debug: 1870 42181 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1871 42181 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1872 42181 target.c:2206 target_free_working_area_restore(): freed 1024 bytes of working area at address 0x3ffc045c Debug: 1873 42181 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1874 42181 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1875 42182 target.c:2206 target_free_working_area_restore(): freed [OpenOCD] 9724 bytes of working area at address 0x40090000 Debug: 1876 42183 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1877 42183 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3f[OpenOCD] fc0000 Debug: 1878 42183 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffd7fff (98304 bytes) Debug: 1879 42183 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 Debug: 1880 42184 xtensa.c:792 xtensa_smpbreak_set(): [esp32.c[OpenOCD] pu0] set smpbreak=30000, state=2 Info : 1881 42184 esp_flash.c:454 esp_flash_erase(): PROF: Erased 28672 bytes in 96.274 ms Debug: 1882 42184 esp_flash.c:239 esp_flasher_algorithm_init(): base=00000000 set=0 [OpenOCD] Debug: 1883 42185 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1884 42185 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 [OpenOCD] Debug: 1885 42186 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 1886 42186 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections [OpenOCD] Debug: 1887 42188 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 1888 42188 target.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 bytes at address 0x40090000 Debug: 1889 42188 target.c:1986 p[OpenOCD] rint_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1890 42188 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1891 42188 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 1892 42194 xtensa.c:83[OpenOCD] 3 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1893 42194 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 1[OpenOCD] 894 42197 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1895 42197 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 189[OpenOCD] 6 42200 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1897 42200 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 [OpenOCD] Debug: 1898 42204 xtensa.c:833 xtensa[OpenOCD] _core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1899 42205 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 Debug: 1900 42209 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1901 42209 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 Debug: 1902 42211 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 1903 42211 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 [OpenOCD] Debug: 1904 42215 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1905 42215 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 [OpenOCD] Debug: 1906[OpenOCD] 42217 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1907 42218 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 1908 [OpenOCD] 42223 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1909 42223 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 191[OpenOCD] 0 42226 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1911 42226 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: [OpenOCD] 1912 42229 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1913 42230 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 [OpenOCD] Debug: 1914 42233[OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1915 42233 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 [OpenOCD] Debug: 1916 42237 xt[OpenOCD] ensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1917 42237 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 1918 42241 xtensa.c:833 xtensa_core_status_c[OpenOCD] heck(): [esp32.cpu0] DSR (8080CC11) Debug: 1919 42242 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 1920 42245 xtensa.c:833 xtensa_core_s[OpenOCD] tatus_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1921 42245 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 19[OpenOCD] 22 42248 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1923 42248 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] D[OpenOCD] ebug: 1924 42253 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1925 42253 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] Debug: 1926 42257 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1927 42257 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 Debug: 1928 42258 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1929 42261 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1930 42261 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 1931 42261 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> 1060 Debug: 1932 42262 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 1933 42262 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: 1934 42262 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b [OpenOCD] (1116 bytes) Debug: 1935 42263 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffd7fff (97188 bytes) Debug: 1936 42264 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 1937 42267 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1938 42267 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug:[OpenOCD] 1939 42274 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1940 42274 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 [OpenOCD] Debug: 1941 42276 xtensa.c[OpenOCD] :833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1942 42276 target.c:2119 alloc_working_area_try_do(): allocated new working area of 33792 bytes at address 0x3ffc045c Debug: 1943 42276 target.c:1986 [OpenOCD] print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1944 42277 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 1945 42[OpenOCD] 277 target.c:1986 print_wa_layout(): 0x3ffc885c-0x3ffd7fff (63396 bytes) Debug: 1946 42277 target.c:2119 alloc_working_area_try_do(): allocate[OpenOCD] d new working area of 28 bytes at address 0x400925fc Debug: 1947 42277 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debu[OpenOCD] g: 1948 42278 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 1949 42278 target.c:1986 print_wa_layout(): 0x40092618-0x40093fff (6632 bytes) Debug: 1950 42278 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 1951 42279 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1952 42279 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 92.932 ms Debug: 1953 42280 xtensa_algorithm.c:114 xte[OpenOCD] nsa_algo_init(): reg params count 8 (6/2). Debug: 1954 42281 xtensa_algorithm.c:61 xtensa_algo_regs_init_start(): Check stack addr 0x3ffc885c Debug: 1955 42281 xtensa_algorithm.c:64 xtensa_alg[OpenOCD] o_regs_init_start(): Adjust stack addr to 0x3ffc8850 Debug: 1956 42281 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 1 (a2) Debug: 1957 42281 xtensa_algorithm.c:140 xtensa_al[OpenOCD] go_init(): Set arg[1] = 0 (a3) Debug: 1958 42282 target.c:2119 alloc_working_area_try_do(): allocated new working area of 24 bytes at address 0x3ffc885c Debug: 1959 42282 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x[OpenOCD] 3ffc045b (1116 bytes) Debug: 1960 42282 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 1961 42282 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 1962 42283 target.c:1986 prin[OpenOCD] t_wa_layout(): 0x3ffc8874-0x3ffd7fff (63372 bytes) Debug: 1963 42283 target.c:2119 alloc_working_area_try_do(): allocated new working area of 32768 bytes at address 0x3ffc8874 Debug: 1964 42283 target.c:1986 prin[OpenOCD] t_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1965 42283 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 1966 42284 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) D[OpenOCD] ebug: 1967 42284 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 1968 42285 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 1969 42285 e[OpenOCD] sp_flash.c:619 esp_flash_write_state_init(): PROF: Allocated target buffer 32768 bytes in 1.037 ms Debug: 1970 42285 target.c:2471 target_[OpenOCD] write_buffer(): writing buffer of 24 byte at 0x3ffc885c [OpenOCD] Debug: 197[OpenOCD] ❌ 1 42287 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 1972 42287 esp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, stack 33792 bytes @ 0x3ffc885c Error: 1973 42287 target.c:920 target_start_algorithm(): Target is already running an algorithm Error: 1974 42288 esp_algorithm.c:203 algorithm_run(): Failed to start algorithm (-4)! Debug: 1975 42289 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working [OpenOCD] area at address 0x400925fc Debug: 1976 42289 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 1977 42289 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 1978 42289 target.c:2206 target_free_working_area_restore(): freed 33792 bytes of working area at address 0x3ffc045c Debug: 1979 42290 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 1980 42290 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 1981 42290 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 1982 42290 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (327[OpenOCD] 68 bytes) Debug: 1983 42291 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 1984 42291 target.c:2206 target_free_working_area_restore(): freed 9724 bytes of working area at address 0x40090000 Debug: 1985 42292 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 1986 42[OpenOCD] 292 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3ffc0000 Debug: 1987 42292 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffc885b (34908 bytes) Debug: 1988 42293 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 1989 42293 target.c:1986 print_wa_layout(): * 0x3[OpenOCD] ffc8874-0x3ffd0873 (32768 bytes) Debug: 1990 42293 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 1991 42293 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 [OpenOCD] Debug: 1992 42294 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Info : 1993 42294 esp_flash.c:779 esp_flash_write(): PROF: Wrote 28672 bytes in 108.971 ms (data transfer time included) [OpenOCD] Debug: 1994 42295 command.c:166 script_debug(): command - expr [clock milliseconds] - $start_time [OpenOCD] Debug: 1995 42298 command.c:166 script_debug([OpenOCD] ): command - echo ** Programming Finished in 41288 ms ** [OpenOCD] User : 1996 42[OpenOCD] 303 command.c:696 handle_echo(): ** Programming Finished in 41288 ms ** Debug: 1997 42303 command.c:166 script_debug(): command - echo ** Verify Started ** [OpenOCD] User : 1998 423[OpenOCD] 05 command.c:696 handle_echo(): ** Verify Started ** Debug: 1999 42306 command.c:166 script_debug(): command - esp verify_bank_hash 0 c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin 0x1000 [OpenOCD] Debug: 200[OpenOCD] 0 42308 configuration.c:99 find_file(): found c:/svn/P_ARM_xx/ESP32/build/bootloader/bootloader.bin Debug: 2001 42308 esp_flash.c:1469 esp_flash_verify_bank_hash(): File size: 27936 bank_size: 16777216 offset: 4096 [OpenOCD] Debug: 2002 42309 esp_flash.c:239 esp_flasher_algorithm_init[OpenOCD] (): base=00000000 set=0 Debug: 2003 42310 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug[OpenOCD] : 2004 42310 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x0 clear=0x630000 [OpenOCD] Debug: 2005 42312 xtensa.c:792 xtens[OpenOCD] a_smpbreak_set(): [esp32.cpu0] set smpbreak=0, state=2 Debug: 2006 42312 esp_algorithm.c:312 algorithm_load_func_image(): stub: base 0x0, start 0x40091994, 2 sections Debug: 2007 42312 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 9723, flags 1 Debug: 2008 42313 targe[OpenOCD] t.c:2119 alloc_working_area_try_do(): allocated new working area of 9724 bytes at address 0x40090000 Debug: 2009 42313 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 2010 42314 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes[OpenOCD] ) Debug: 2011 42314 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090000 [OpenOCD] Debug: 201[OpenOCD] 2 42324 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2013 42324 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090200 [OpenOCD] Debug: 2014 42328 xte[OpenOCD] nsa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2015 42328 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090400 [OpenOCD] Debug: 2016 42331 xtensa.c:833 xtensa_core_status_[OpenOCD] check(): [esp32.cpu0] DSR (8080CC11) Debug: 2017 42331 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090600 [OpenOCD] Debug: 20[OpenOCD] 18 42334 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2019 42334 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090800 [OpenOCD] Debug: 2020 42337[OpenOCD] xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2021 42337 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090a00 [OpenOCD] Debug: 2022 4[OpenOCD] 2340 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2023 42341 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090c00 Debug: 2024 42343 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2025 42343 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40090e00 Debug: 2026 42346 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2027 42347 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091000 [OpenOCD] Debug: 2028 42350 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2029 42350 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091200 [OpenOCD] Debug: 2030 42353 xtensa.c:833 xtensa_core_status[OpenOCD] _check(): [esp32.cpu0] DSR (8080CC11) Debug: 2031 42353 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091400 [OpenOCD] Debug: 2032 42358 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2033 42358 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091600 Debug: 2034 42362 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2035 42362 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091800 Debug: 2036 42365 xtensa.c:833 xtensa_core_status_[OpenOCD] check(): [esp32.cpu0] DSR (8080CC11) Debug: 2037 42365 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091a00 [OpenOCD] Debug: 2038 42368 xtensa.c:833 xtensa_core_status_check(): [esp32[OpenOCD] .cpu0] DSR (8080CC11) Debug: 2039 42368 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091c00 [OpenOCD] Debug: 204[OpenOCD] 0 42371 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2041 42371 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40091e00 [OpenOCD] Debug: 2042 423[OpenOCD] 75 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2043 42375 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092000 [OpenOCD] Debug: 2044 42[OpenOCD] 379 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2045 42379 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x40092200 [OpenOCD] Debug: 2046 42383 xtensa.[OpenOCD] c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2047 42383 target.c:2471 target_write_buffer(): writing buffer of 507 byte at 0x40092400 [OpenOCD] Debug: 2048 42384 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) [OpenOCD] Debug: 2049 42387 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2050 42387 esp_algorithm.c:319 algorithm_load_func_image(): addr 0x00000000, sz 1060, flags 0 Debug: 2051 42388 esp_algorithm.c:351 algorithm_load_func_image(): DATA sec size 1060 -> 1060 Debug: 2052 42388 esp_algorithm.c:356 algorithm_load_func_image(): BSS sec size 53 -> 56 Debug: 2053 42389 target.c:2119 alloc_working_area_try_do(): allocated new working area of 1116 bytes at address 0x3ffc0000 Debug: 2054 42389 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 2055 42389 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 2056 42389 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 2057 42389 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 2058 42389 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 2059 42389 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0000 [OpenOCD] Debug: 2060 42392 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2061 42393 target.c:2471 target_write_buffer(): writing buffer of 512 byte at 0x3ffc0200 [OpenOCD] Debug: 20[OpenOCD] 62 42397 xtensa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2063 42397 target.c:2471 target_write_buffer(): writing buffer of 36 byte at 0x3ffc0400 [OpenOCD] Debug: 2064 42398 xte[OpenOCD] nsa.c:833 xtensa_core_status_check(): [esp32.cpu0] DSR (8080CC11) Debug: 2065 42398 target.c:2119 alloc_working_area_try_do(): allocated new working area of 33792 bytes at address 0x3ffc045c Debug: 2066 42398 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) D[OpenOCD] ebug: 2067 42399 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 2068 42399 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 2069 42399 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 2070 42399 target.c:1986 print_wa_layout(): 0x[OpenOCD] 3ffd0874-0x3ffd7fff (30604 bytes) Debug: 2071 42400 target.c:2119 alloc_working_area_try_do(): allocated new working area of 28 bytes at address 0x400925fc Debug: 2072 42400 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 2073 42400 target.c:1986 print_wa_layout(): * 0x400925fc-0x40092617 (28 bytes) Debug: 2074 42401[OpenOCD] target.c:1986 print_wa_layout(): 0x40092618-0x40093fff (6632 bytes) Debug: 2075 42401 target.c:2471 target_write_buffer(): writing buffer of 28 byte at 0x400925fc [OpenOCD] Debug: 2076 42403 xtensa.c:833 xtensa_core_status_ch[OpenOCD] eck(): [esp32.cpu0] DSR (8080CC11) Debug: 2077 42403 esp_algorithm.c:442 algorithm_load_func_image(): Stub loaded in 91.07 ms Debug: 2078 42404 xtensa_algorithm.c:114 xtensa_algo_init(): reg params count 10 (6/4). Debug: 2079 42405 xtensa_algorithm.c:61 xtensa_algo_regs_i[OpenOCD] nit_start(): Check stack addr 0x3ffc885c Debug: 2080 42405 xtensa_algorithm.c:64 xtensa_algo_regs_init_start(): Adjust stack addr to 0x3ffc8850 Debug: 2081 42405 xtensa_algorithm.c:129 xtensa_algo_init(): Set arg[0] = 10 (a2) Debug: 2082 42405 xtensa_algorithm.c:140 xtensa_algo_[OpenOCD] init(): Set arg[1] = 4096 (a3) Debug: 2083 42405 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[2] = 27936 (a4) Debug: 2084 42406 xtensa_algorithm.c:140 xtensa_algo_init(): Set arg[3] = 0 (a5) Debug: 2085 42407 target.c:2119 alloc_working_area_try_do(): allocated ne[OpenOCD] ❌ w working area of 32 bytes at address 0x3ffd0874 Debug: 2086 42407 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 2087 42407 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 2088 42407 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 2089 42407 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 2090 42408 target.c:1986 print_wa_layout(): * 0x3ffd0874-0x3ffd0893 (32 bytes) Debug: 2091 42409 target.c:1986 print_wa_layout(): 0x3ffd0894-0x3ffd7fff (30572 bytes) Debug: 2092 42409 esp_algorithm.c:196 algorithm_run(): Algorithm start @ 0x400925fc, stack 33792 bytes @ 0x3ffc885c Error: 2093 42409 target.c:920 target_start_algorithm(): Target is already running an algorithm Error: 2094 42409 esp_algorithm.c:203 algorithm_run(): Failed to start algorithm (-4)! Debug: 2095 42409 target.c:2206 target_free_working_area_restore(): freed 32 bytes of working area at address 0x3ffd0874 Debug: 2096 42409 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 2097 42410 target.c:1986 print_wa_layout(): * 0x3ffc045c-0x3ffc885b (33792 bytes) Debug: 2098 42410 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 2099 42410 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 2100 42410 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 2101 42411 target.c:2206 target_free_working_area_restore(): freed 28 bytes of working area at address 0x400925fc Debug: 2102 42411 target.c:1986 print_wa_layout(): * 0x40090000-0x400925fb (9724 bytes) Debug: 2103 42411 target.c:1986 print_wa_layout(): 0x400925fc-0x40093fff (6660 bytes) Debug: 2104 42413 target.c:2206 target_free_working_area_restore(): freed 33792 bytes of working area at address 0x3ffc045c Debug: 2105 42413 target.c:1986 print_wa_layout(): * 0x3ffc0000-0x3ffc045b (1116 bytes) Debug: 2106 42413 target.c:1986 print_wa_layout(): 0x3ffc045c-0x3ffc885b (33792 b[OpenOCD] ytes) Debug: 2107 42413 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 2108 42414 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 2109 42414 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 2110 42414 target.c:2206 target_free_working_area_restore(): freed 9724 bytes of working area at address 0x40090000 Debug: 2111 42415 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2112 42415 target.c:2206 target_free_working_area_restore(): freed 1116 bytes of working area at address 0x3ffc0000 Debug: 2113 42415 target.c:1986 print_wa_layout(): 0x3ffc0000-0x3ffc885b (34908 bytes) Debug: 2114 42416 target.c:1986 print_wa_layout(): * 0x3ffc885c-0x3ffc8873 (24 bytes) Debug: 2115 42416 target.c:1986 print_wa_layout(): * 0x3ffc8874-0x3ffd0873 (32768 bytes) Debug: 2116 42416 target.c:1986 print_wa_layout(): 0x3ffd0874-0x3ffd7fff (30604 bytes) Debug: 2117 42416 xtensa.c:776 xtensa_smpbreak_write(): [esp32.cpu0] write smpbreak set=0x30000 clear=0x600000 Debug: 2118 424[OpenOCD] ❌ 18 xtensa.c:792 xtensa_smpbreak_set(): [esp32.cpu0] set smpbreak=30000, state=2 Info : 2119 42418 esp_flash.c:1262 esp_flash_calc_hash(): PROF: Flash verified in 108.254 ms Error: 2120 42418 esp_flash.c:1502 esp_flash_verify_bank_hash(): **** Verification failure! **** Error: 2121 42418 esp_flash.c:1505 esp_flash_verify_bank_hash(): target_hash c577af...000 [OpenOCD] ❌ Error: 2122 42419 esp_flash.c:1508 esp_flash_verify_bank_hash(): file_hash: 675a7e...63c8af Debug: 2123 42419 command.c:556 run_command(): Command 'esp verify_bank_hash' failed with error code -4 Debug: 2124 42419 command.c:166 script_debug(): command - target names [OpenOCD] Debug: 2125 42424 command.c:166 script_debug(): command - esp32.cpu0 configure -work-area-backup 1 [OpenOCD] Debug: 21[OpenOCD] 26 42426 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 2127 42428 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2128 42428 command.c:166 script_debug(): command - esp32.cpu0[OpenOCD] configure -alt-work-area-backup 1 [OpenOCD] Debug: 2129[OpenOCD] 42430 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 2130 42432 target.c:1986 print_wa_layout(): 0x40090000-0x40093fff (16384 bytes) Debug: 2131 42432 command.c[OpenOCD] :166 script_debug(): command - esp32.cpu1 configure -work-area-backup 1 [OpenOCD] Debug: [OpenOCD] 2132 42434 target.c:2239 target_free_all_working_areas_restore(): freeing all working areas Debug: 2133 42434 command.c:166 script_debug(): command - esp32.cpu1 configure -al[OpenOCD] t-work-area-backup 1 [OpenOCD] Debug: 2134 42437 target.c:2239 target_fre[OpenOCD] e_all_working_areas_restore(): freeing all working areas Debug: 2135 42437 command.c:166 script_debug(): command - echo ** Flashing Failed ** [OpenOCD] User : 2136 42445 command.c:696 handle_echo(): ** Flashing Failed ** User : 2137 42445 options.c:63 configuration_output_handler(): -1User : 2138 42445 options.c:63 configuration_output_handler(): ```

PS: Should i post this error in the ESP32-OpenOCD repo?

chipweinberger commented 2 years ago

here is the doc I was referring to:

https://github.com/espressif/vscode-esp-idf-extension/blob/master/docs/DEBUGGING.md

vdm97 commented 2 years ago

here is the doc I was referring to:

https://github.com/espressif/vscode-esp-idf-extension/blob/master/docs/DEBUGGING.md

Thank you for the link but i do not get how this should help me. The error is not present when Bluetooth is deactivated and only appears when i activate Bluetooth so i do not think that it is a VSCode ESP IDF extension / OpenOCD misconficuration. I could be wrong of course..

vdm97 commented 2 years ago

I have some new information regarding this issue. While adding the BLE functionality i noticed, that my heap gets really full. Therefore i spent some time freeing up space. Yesterday i updated to ESP-IDF v4.4.3 and noticed that my flashing problem does not occur anymore. After some testing i found out that it was not the new version of ESP-IDF that fixed the problem but instead freeing up the heap. I attached the output of heap_caps_print_heap_info(MALLOC_CAP_8BIT) for both cases.

Heap summary working case

``` Heap summary for capabilities 0x00000004: At 0x3ffb2730 len 15448 free 4 allocated 13492 min_free 4 largest_free_block 0 alloc_blocks 82 free_blocks 0 total_blocks 82 At 0x3ffb6388 len 7288 free 4 allocated 5488 min_free 4 largest_free_block 0 alloc_blocks 43 free_blocks 0 total_blocks 43 At 0x3ffb9a20 len 16648 free 4 allocated 14952 min_free 4 largest_free_block 0 alloc_blocks 17 free_blocks 0 total_blocks 17 At 0x3ffd0e78 len 61832 free 4 allocated 59556 min_free 4 largest_free_block 0 alloc_blocks 162 free_blocks 0 total_blocks 162 At 0x3ffe0440 len 15072 free 24 allocated 13248 min_free 4 largest_free_block 0 alloc_blocks 44 free_blocks 1 total_blocks 45 At 0x3ffe4350 len 113840 free 31000 allocated 80132 min_free 15516 largest_free_block 28672 alloc_blocks 271 free_blocks 11 total_blocks 282 Totals: free 31040 allocated 186868 min_free 15536 largest_free_block 28672 ```

Heap summary broken case

``` Heap summary for capabilities 0x00000004: At 0x3ffb2730 len 15448 free 4 allocated 13604 min_free 4 largest_free_block 0 alloc_blocks 54 free_blocks 0 total_blocks 54 At 0x3ffb6388 len 7288 free 4 allocated 5488 min_free 4 largest_free_block 0 alloc_blocks 43 free_blocks 0 total_blocks 43 At 0x3ffb9a20 len 16648 free 4 allocated 14952 min_free 4 largest_free_block 0 alloc_blocks 17 free_blocks 0 total_blocks 17 At 0x3ffd3670 len 51600 free 4 allocated 49404 min_free 4 largest_free_block 0 alloc_blocks 142 free_blocks 0 total_blocks 142 At 0x3ffe0440 len 15072 free 4 allocated 13400 min_free 4 largest_free_block 0 alloc_blocks 11 free_blocks 0 total_blocks 11 At 0x3ffe4350 len 113840 free 9064 allocated 101916 min_free 3296 largest_free_block 6144 alloc_blocks 309 free_blocks 7 total_blocks 316 Totals: free 9084 allocated 198764 min_free 3316 largest_free_block 6144 ```

Image size working case

``` Total sizes: Used static DRAM: 78616 bytes ( 45964 remain, 63.1% used) .data size: 22288 bytes .bss size: 56328 bytes Used static IRAM: 119174 bytes ( 11898 remain, 90.9% used) .text size: 118147 bytes .vectors size: 1027 bytes Used Flash size : 1346396 bytes .text : 1105923 bytes .rodata : 240217 bytes Total image size: 1487858 bytes (.bin may be padded larger) ```

Image size broken case

``` Total sizes: Used static DRAM: 90236 bytes ( 34344 remain, 72.4% used) .data size: 23316 bytes .bss size: 66920 bytes Used static IRAM: 121086 bytes ( 9986 remain, 92.4% used) .text size: 120059 bytes .vectors size: 1027 bytes Used Flash size : 1407143 bytes .text : 1126587 bytes .rodata : 280300 bytes Total image size: 1551545 bytes (.bin may be padded larger) ```

If find the fix really strange and think that freeing up the heap is not the real fix but i cannot think of any other change i did to the code which might cause the issue/fix. Therefore i am not sure if i should close this issue.

gojimmypi commented 1 year ago

Yesterday I encountered a similar JTAG problem.

Does anyone else think it might be related to the CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE=y setting? Given that I also removed the Bluetooth settings, I suppose it could also be a memory issue?

I'm not sure I've ever encountered a low memory issue causing JTAG programming problems. Is there a device RAM overhead for JTAG programming and/or single-step debugging?

@vdm97 I'd be interested in seeing your sdkconfig settings if possible.

vdm97 commented 1 year ago

Hi @gojimmypi,

my sdkconfig is posted above:

Body was too long... sdkconfig

PS: I do not use the CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLEsetting.

vdm97 commented 1 year ago

Today i encountered this error again. After updating from IDF version 4.4.3 to version 5.0.2 my IRAM usage was at 92.7 % and i could not flash my ESP32-WROOM-32 a second time anymore. So i started to search for a solution and found this issue but updating OpenOCD to the newest release did not help. Therefore i removed the last configurable piece of code from the IRAM (CONFIG_LWIP_IRAM_OPTIMIZATION) which reduced the IRAM usage to 82.2 %. After a manual flash via serial flashing i could flash again with the ESP-IDF VS Code Extension like before. So unfortunately the error is still present...

chconnor commented 11 months ago

Thanks for your investigations. You mentioned the heap size... could it possibly be related to written flash size? (I'm a total beginner, so I'm just brainstorming here.)

I'm seeing similar -- my procedure is to switch to a smaller project and do a non-debug upload. Then I can go back to the "large" project and do a debug upload and it works, but only one time. Then the board is "broken" for debugging until I repeat the procedure.

I posted at the PIO forum with some more details: https://community.platformio.org/t/interesting-results-re-chronic-esp-prog-problems/37168

Relevant quote:

You have to switch to a “small” project, and you have to do a non-debug upload to fix it. Trying to do a non-debug upload of the “large” project will not fix it. Trying to do a debug upload of a “small” project will not work, and will not fix it.

My “large” project uses about 79% of the flash. Successful debug logs show that it’s uploading 1044480 bytes. Again, this only works one time, then it is “broken” until the procedure above is followed.

A “small” project can be debugged over and over without issue.

It's interesting to me that your flash usage is right around where mine is... I've been incrementally building this project, and it just started to fail, so if in fact there is a firm threshold of image size that triggers the issue, I would expect it to be near the size I'm currently failing at (1044480.)

erhankur commented 11 months ago

Sorry, I just saw this long-time-opened issue.

OpenOCD uses the IRAM memory 0x3FFE0000 to 0x3FFF8000 for the working area meaning that it is a region in the SRAM for the stub flasher code and data. https://github.com/espressif/openocd-esp32/blob/master/tcl/target/esp32.cfg#L32 This region is in use by OpenOCD, when you want to flash applications or use flash breakpoints. Before running the flasher stub, OpenOCD will read this region, save it, run the flasher stub application, and restore it.

As I understand, when your application IRAM usage is high, you can not update your application from the JTAG. Correct?

I can try to create a test app, to reproduce the issue by allocating a high chunk of memory from the heap. Or maybe someone can do it by simulating the application memory usage? Also, are any other settings needed to see the failure?

I am sorry to hear that this issue is called a 'chronic' in the community. I will do my best to find a solution.

chconnor commented 11 months ago

Thanks! I have been working this morning to narrow things down. Unfortunately I am a beginner and barely know C or microcontrollers (e.g. I barely understand what IRAM even is) but I will help if I can!

Here is what I found today (doing this on an ESP32-DevKitC-VIE which uses WROVER):

Suspecting that the issue was written flash size, I made a program that #include's "bigfile.h" where bigfile is like this:

const long arrsize = 260000;
const int bigarray[260000] = {
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
...
0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, };

(they are ints and I mistakenly assigned bytes, but I assume that's irrelevant)

And main.cpp was:

#include <Arduino.h>
#include <bigfile.cpp>

void setup()
{
  Serial.begin(115200);
  while (!Serial) delay(10);
  srand(time(NULL));
  Serial.println(bigarray[rand()%arrsize]);
}

void loop() {;}

...even though flash was 99.5% used, this debugged fine.

So instead I used a python script to generate ../include/bigfile.cpp which is like this:

#pragma GCC push_options
#pragma GCC optimize("O0")
static volatile int i = 0;
void func0(int newv);
void func0(int newv) { volatile int a = 0; a += 1; i = a; }
void func1(int newv);
void func1(int newv) { volatile int a = 0; a += 1; i = a; func0(a); }
void func2(int newv);
void func2(int newv) { volatile int a = 0; a += 1; i = a; func1(a); }
void func3(int newv);
void func3(int newv) { volatile int a = 0; a += 1; i = a; func2(a); }
...
void func124(int newv) { volatile int a = 0; a += 1; i = a; func123(a); }
#pragma GCC pop_options

And main is like this:

#include <Arduino.h>
#include <bigfile.cpp>

void setup()
{
  Serial.begin(115200);
  while (!Serial) delay(10);
  func124(0);
}

void loop() {;}

I'm a clueless beginner so I'm obviously just trying anything I can to prevent the code from being optimized away. No idea if any of this is smart.

If I generate bigfile.cpp with 124 functions (and main calls func123(0)) then it works: I can debug multiple times in a row.

If I generate bigfile.cpp with 125 functions (and main calls func124(0)) then I can debug the first time but it doesn't debug properly: e.g. it stops at setup() and I hit F5 and it stops at some random other place for no apparent reason. Then when I stop debugging and try to F5 again, it does not work, etc. In other words, it's the same pattern as described: I have to flash in non-debug mode, and I must do so with a smaller-sized program (e.g. regenerate bigfile.cpp with 124 or less functions). Then it will work again.

platformio.ini of test project

``` [env:esp32dev] platform = espressif32 board = esp32dev framework = arduino monitor_speed = 115200 monitor_port = /dev/ttyUSB0 debug_tool = esp-prog debug_init_break = tbreak setup ```

Apologies if everything in this comment is a waste of time; I just wanted to share in case it is useful. Maybe the way I am nesting function calls in the test code is bound to cause problems and this is a different issue. At any rate, if there is anything else I can do to assist let me know!

Here are debug console outputs: goodflash_at_124 is the one that worked repeatedly; goodflash_but_bad_session_at_125.txt is where it seemed to flash OK but debugging was unpredictable/broken. badflash_at_125 is the subsequent attempt to flash which just hangs. The specific errors and pattern of failure are a little different from my real project, but I guess that would be expected if this is a case of the process overwriting openocd memory accidentally or something.

goodflash_at_124.txt

``` Reading symbols from /proj/geeky/esp32/flashtest/.pio/build/esp32dev/firmware.elf... PlatformIO Unified Debugger -> https://bit.ly/pio-debug PlatformIO: debug_tool = esp-prog PlatformIO: Initializing remote target... Open On-Chip Debugger v0.11.0-esp32-20220706 (2022-07-06-15:48) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html adapter speed: 20000 kHz WARNING: boards/esp-wroom-32.cfg is deprecated, and may be removed in a future release. adapter speed: 5000 kHz Info : tcl server disabled Info : telnet server disabled Info : clock speed 5000 kHz Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : starting gdb server for esp32.cpu0 on pipe Info : accepting 'gdb' connection from pipe Info : [esp32.cpu0] Target halted, PC=0x400F2A56, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x4008A42B, debug_reason=00000000 Warn : No symbols for FreeRTOS! Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Auto-detected flash bank 'esp32.cpu0.flash' size 8192 KB Info : Using flash bank 'esp32.cpu0.flash' size 8192 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : Using flash bank 'esp32.cpu0.irom' size 144 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : Using flash bank 'esp32.cpu0.drom' size 52 KB Info : New GDB Connection: 1, Target esp32.cpu0, state: halted 0x400f2a56 in esp_pm_impl_waiti () at /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/hal/esp32/include/hal/cpu_ll.h:183 183 /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/hal/esp32/include/hal/cpu_ll.h: No such file or directory. Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Auto-detected flash bank 'esp32.cpu1.flash' size 8192 KB Info : Using flash bank 'esp32.cpu1.flash' size 8192 KB Auto-detected flash bank 'esp32.cpu1.flash' size 8192 KB Using flash bank 'esp32.cpu1.flash' size 8192 KB ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 20480 bytes in 389.263 ms PROF: Erased 20480 bytes in 389.263 ms Info : PROF: Data transferred in 104.293 ms @ 191.767 KB/s PROF: Data transferred in 104.293 ms @ 191.767 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 20480 bytes in 368.628 ms (data transfer time included) PROF: Wrote 20480 bytes in 368.628 ms (data transfer time included) ** Programming Finished in 1230 ms ** ** Programming Finished in 1230 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 114.047 ms PROF: Flash verified in 114.047 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 4096 bytes in 154.51 ms PROF: Erased 4096 bytes in 154.51 ms Info : PROF: Data transferred in 28.633 ms @ 139.699 KB/s PROF: Data transferred in 28.633 ms @ 139.699 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 4096 bytes in 269.382 ms (data transfer time included) PROF: Wrote 4096 bytes in 269.382 ms (data transfer time included) ** Programming Finished in 683 ms ** ** Programming Finished in 683 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 108.357 ms PROF: Flash verified in 108.357 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 8192 bytes in 201.349 ms PROF: Erased 8192 bytes in 201.349 ms Info : PROF: Data transferred in 45.201 ms @ 176.987 KB/s PROF: Data transferred in 45.201 ms @ 176.987 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 8192 bytes in 287.508 ms (data transfer time included) PROF: Wrote 8192 bytes in 287.508 ms (data transfer time included) ** Programming Finished in 744 ms ** ** Programming Finished in 744 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 115.405 ms PROF: Flash verified in 115.405 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 274432 bytes in 1652.85 ms PROF: Erased 274432 bytes in 1652.85 ms Info : PROF: Data transferred in 1298.37 ms @ 206.413 KB/s PROF: Data transferred in 1298.37 ms @ 206.413 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 274432 bytes in 1637.27 ms (data transfer time included) PROF: Wrote 274432 bytes in 1637.27 ms (data transfer time included) ** Programming Finished in 3548 ms ** ** Programming Finished in 3548 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 248.39 ms PROF: Flash verified in 248.39 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 Temporary breakpoint 1 at 0x400d3830: file src/main.cpp, line 5. PlatformIO: Initialization completed PlatformIO: Resume the execution to `debug_init_break = tbreak setup` PlatformIO: More configuration options -> https://bit.ly/pio-debug Note: automatically using hardware breakpoints for read-only addresses. Info : [esp32.cpu0] Target halted, PC=0x400DB47F, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x400DB47F, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x400D3830, debug_reason=00000001 [esp32.cpu1] Target halted, PC=0x400D3830, debug_reason=00000001 [New Thread 1073465464] [New Thread 1073466864] [New Thread 1073445580] [New Thread 1073446240] [New Thread 1073443880] [New Thread 1073464064] [Switching to Thread 1073468844] Thread 1 "loopTask" hit Temporary breakpoint 1, setup () at src/main.cpp:5 5 { pio_reset_run_target Cannot execute this command while the target is running. Use the "interrupt" command to stop the target and then try again. Cannot execute this command while the target is running. Use the "interrupt" command to stop the target and then try again. Cannot execute this command while the target is running. Use the "interrupt" command to stop the target and then try again. ```

goodflash_but_bad_session_at_125.txt

``` Reading symbols from /proj/geeky/esp32/flashtest/.pio/build/esp32dev/firmware.elf... PlatformIO Unified Debugger -> https://bit.ly/pio-debug PlatformIO: debug_tool = esp-prog PlatformIO: Initializing remote target... Open On-Chip Debugger v0.11.0-esp32-20220706 (2022-07-06-15:48) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html adapter speed: 20000 kHz WARNING: boards/esp-wroom-32.cfg is deprecated, and may be removed in a future release. adapter speed: 5000 kHz Info : tcl server disabled Info : telnet server disabled Info : clock speed 5000 kHz Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : starting gdb server for esp32.cpu0 on pipe Info : accepting 'gdb' connection from pipe Info : [esp32.cpu0] Target halted, PC=0x400F2A56, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x4008A45C, debug_reason=00000000 Warn : No symbols for FreeRTOS! Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Auto-detected flash bank 'esp32.cpu0.flash' size 8192 KB Info : Using flash bank 'esp32.cpu0.flash' size 8192 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : Using flash bank 'esp32.cpu0.irom' size 144 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : Using flash bank 'esp32.cpu0.drom' size 52 KB Info : New GDB Connection: 1, Target esp32.cpu0, state: halted 0x400f2a56 in __cxa_guard_dummy () at /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/cxx/cxx_guards.cpp:218 218 /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/cxx/cxx_guards.cpp: No such file or directory. Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Target halted, PC=0x4008ABFB, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x4008ABFB, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Info : Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Flash mapping 0: 0x10020 -> 0x3f400020, 51 KB Flash mapping 1: 0x20020 -> 0x400d0020, 142 KB Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : Auto-detected flash bank 'esp32.cpu1.flash' size 8192 KB Info : Using flash bank 'esp32.cpu1.flash' size 8192 KB Auto-detected flash bank 'esp32.cpu1.flash' size 8192 KB Using flash bank 'esp32.cpu1.flash' size 8192 KB ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 20480 bytes in 389.289 ms PROF: Erased 20480 bytes in 389.289 ms Info : PROF: Data transferred in 102.989 ms @ 194.195 KB/s PROF: Data transferred in 102.989 ms @ 194.195 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 20480 bytes in 370.115 ms (data transfer time included) PROF: Wrote 20480 bytes in 370.115 ms (data transfer time included) ** Programming Finished in 1242 ms ** ** Programming Finished in 1242 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 113.381 ms PROF: Flash verified in 113.381 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 4096 bytes in 156.621 ms PROF: Erased 4096 bytes in 156.621 ms Info : PROF: Data transferred in 28.434 ms @ 140.677 KB/s PROF: Data transferred in 28.434 ms @ 140.677 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 4096 bytes in 277.338 ms (data transfer time included) PROF: Wrote 4096 bytes in 277.338 ms (data transfer time included) ** Programming Finished in 704 ms ** ** Programming Finished in 704 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 107.733 ms PROF: Flash verified in 107.733 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 8192 bytes in 201.858 ms PROF: Erased 8192 bytes in 201.858 ms Info : PROF: Data transferred in 45.477 ms @ 175.913 KB/s PROF: Data transferred in 45.477 ms @ 175.913 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 8192 bytes in 292.718 ms (data transfer time included) PROF: Wrote 8192 bytes in 292.718 ms (data transfer time included) ** Programming Finished in 753 ms ** ** Programming Finished in 753 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 127.811 ms PROF: Flash verified in 127.811 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 ** Programming Started ** ** Programming Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Erased 274432 bytes in 1678.85 ms PROF: Erased 274432 bytes in 1678.85 ms Info : PROF: Data transferred in 1291.31 ms @ 207.541 KB/s PROF: Data transferred in 1291.31 ms @ 207.541 KB/s Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Wrote 274432 bytes in 1627.22 ms (data transfer time included) PROF: Wrote 274432 bytes in 1627.22 ms (data transfer time included) ** Programming Finished in 3570 ms ** ** Programming Finished in 3570 ms ** ** Verify Started ** ** Verify Started ** Info : [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 [esp32.cpu0] Target halted, PC=0x40092612, debug_reason=00000001 Info : PROF: Flash verified in 247.661 ms PROF: Flash verified in 247.661 ms ** Verify OK ** ** Verify OK ** Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x40000400, debug_reason=00000000 Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. Info : [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 [esp32.cpu1] Target halted, PC=0x40000400, debug_reason=00000000 Temporary breakpoint 1 at 0x400d387c: file src/main.cpp, line 5. PlatformIO: Initialization completed PlatformIO: Resume the execution to `debug_init_break = tbreak setup` PlatformIO: More configuration options -> https://bit.ly/pio-debug Note: automatically using hardware breakpoints for read-only addresses. Info : [esp32.cpu0] Target halted, PC=0x400DB083, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' [esp32.cpu0] Target halted, PC=0x400DB083, debug_reason=00000000 Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x400D387C, debug_reason=00000001 [esp32.cpu1] Target halted, PC=0x400D387C, debug_reason=00000001 [New Thread 1073465464] [New Thread 1073466864] [New Thread 1073445580] [New Thread 1073446240] [New Thread 1073443880] [New Thread 1073464064] [Switching to Thread 1073468844] Thread 1 "loopTask" hit Temporary breakpoint 1, setup () at src/main.cpp:5 5 { Info : [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x400D1377, debug_reason=00000002 [esp32.cpu1] Target halted, PC=0x400D1377, debug_reason=00000002 Thread 1 "loopTask" received signal SIGTRAP, Trace/breakpoint trap. 0x400d1377 in func0 (newv=1) at include/bigfile.cpp:5 5 void func0(int newv) { volatile int a = 0; a += 1; i = a; } Info : [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x400D1381, debug_reason=00000002 [esp32.cpu1] Target halted, PC=0x400D1381, debug_reason=00000002 Thread 1 "loopTask" received signal SIGTRAP, Trace/breakpoint trap. 0x400d1381 in func0 (newv=1) at include/bigfile.cpp:5 5 void func0(int newv) { volatile int a = 0; a += 1; i = a; } Info : [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x400D1393, debug_reason=00000002 [esp32.cpu1] Target halted, PC=0x400D1393, debug_reason=00000002 Thread 1 "loopTask" received signal SIGTRAP, Trace/breakpoint trap. 0x400d1393 in func0 (newv=1) at include/bigfile.cpp:5 5 void func0(int newv) { volatile int a = 0; a += 1; i = a; } Info : [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x400F2AA2, debug_reason=00000000 Info : Set GDB target to 'esp32.cpu0' Set GDB target to 'esp32.cpu0' Info : [esp32.cpu1] Target halted, PC=0x4008334C, debug_reason=00000001 [esp32.cpu1] Target halted, PC=0x4008334C, debug_reason=00000001 Thread 1 "loopTask" received signal SIGTRAP, Trace/breakpoint trap. 0x4008334c in panic_abort (details=0x3ffc4fb1 "***ERROR*** A stack overflow in task loopTask has been detected.") at /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_system/panic.c:408 408 /Users/ficeto/Desktop/ESP32/ESP32S2/esp-idf-public/components/esp_system/panic.c: No such file or directory. pio_reset_run_target Info : JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu0 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) JTAG tap: esp32.cpu1 tap/device found: 0x120034e5 (mfg: 0x272 (Tensilica), part: 0x2003, ver: 0x1) Info : [esp32.cpu0] requesting target halt and executing a soft reset [esp32.cpu0] requesting target halt and executing a soft reset Info : [esp32.cpu0] Debug controller was reset. Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Debug controller was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 [esp32.cpu0] Target halted, PC=0x500000CF, debug_reason=00000000 Info : [esp32.cpu1] requesting target halt and executing a soft reset [esp32.cpu1] requesting target halt and executing a soft reset Info : [esp32.cpu0] Core was reset. [esp32.cpu0] Core was reset. Info : [esp32.cpu1] Debug controller was reset. Info : [esp32.cpu1] Core was reset. [esp32.cpu1] Debug controller was reset. [esp32.cpu1] Core was reset. [Inferior 1 (Remote target) detached] ```

badflash_at_125.txt

``` Reading symbols from /proj/geeky/esp32/flashtest/.pio/build/esp32dev/firmware.elf... PlatformIO Unified Debugger -> https://bit.ly/pio-debug PlatformIO: debug_tool = esp-prog PlatformIO: Initializing remote target... Open On-Chip Debugger v0.11.0-esp32-20220706 (2022-07-06-15:48) Licensed under GNU GPL v2 For bug reports, read http://openocd.org/doc/doxygen/bugs.html adapter speed: 20000 kHz WARNING: boards/esp-wroom-32.cfg is deprecated, and may be removed in a future release. adapter speed: 5000 kHz Info : tcl server disabled Info : telnet server disabled Info : clock speed 5000 kHz Error: JTAG scan chain interrogation failed: all ones Error: Check JTAG interface, timings, target power, etc. Error: Trying to use configured scan chain anyway... Error: esp32.cpu0: IR capture error; saw 0x1f not 0x01 Warn : Bypassing JTAG setup events due to errors Error: Unexpected OCD_ID = ffffffff Warn : target esp32.cpu0 examination failed Error: Unexpected OCD_ID = ffffffff Warn : target esp32.cpu1 examination failed Info : starting gdb server for esp32.cpu0 on pipe Info : accepting 'gdb' connection from pipe Error: Target not examined yet Error executing event gdb-attach on target esp32.cpu0: Warn : No symbols for FreeRTOS! Error: Target not halted Error: auto_probe failed Error: Connect failed. Consider setting up a gdb-attach event for the target to prepare target for GDB connect, or use 'gdb_memory_map disable'. Error: attempted 'gdb' connection rejected Ignoring packet error, continuing... warning: unrecognized item "timeout" in "qSupported" response Ignoring packet error, continuing... .pioinit:11: Error in sourced command file: Remote replied unexpectedly to 'vMustReplyEmpty': timeout ```

antoniovazquezblanco commented 6 months ago

I am facing this issue in an esp32 running the hci_uart example with version esp-idf 5.2.1 (https://github.com/espressif/esp-idf/tree/v5.2.1/examples/bluetooth/hci/controller_hci_uart_esp32).

Is there any way I can help debug this issue?

Thanks

erhankur commented 6 months ago

@antoniovazquezblanco using the latest OpenOCD release can you get the stub flasher logs and attach ocd-log.txt here?

openocd -f board/esp32-wrover-kit-3.3v.cfg -c "esp stub_log on" -d3 -locd-log.txt

If you are willing to dive deep into the stub codes, you can follow the steps to get more debug logs. https://github.com/espressif/openocd-esp32/blob/master/contrib/loaders/flash/espressif/README.md

And can you write your steps to reproduce the issue? I did a quick test with the HCI example and didn't see an error.

antoniovazquezblanco commented 6 months ago

The error is intermitent for me. It sometimes happens, sometimes not. I am able to debug with a cppdbg configuration around 30% of the times. Totally unable to debug with espidf config.

Take into account that the command was only run once and that it may not show the usual behaviour. The executed command for my board:

openocd.exe -f interface/jlink.cfg -f target/esp32.cfg -c "esp stub_log on" -d3 -l "ocd-log.txt"

The obtained log: ocd-log.txt

erhankur commented 6 months ago

Your tools are not up to date. Can you run install.bat and download latest idf tool set. OpenOCD release will be v0.12.0-esp32-20240318

And afaik, speed matters with a jlink probe. Try to lower the frequency;

-f interface/jlink.cfg -c "adapter speed 5000" -f target/esp32.cfg -c "esp stub_log on" -d3 -l "ocd-log.txt"

You are right, VSCode + espidf adapter not stable enough. We are working on a new adapter integration. You can give a try. https://github.com/espressif/vscode-esp-idf-extension/pull/1131

For the cppdbg configuration, I use below launch.json. Its OK.

        {
            "name": "ESP-IDF debug(cppdbg)",
            "type": "cppdbg",
            "request": "launch",
            "program": "${config:esp_idf_app_elf_path}",
            "args": [],
            "cwd": "${workspaceFolder}",
            "externalConsole": false,
            "MIMode": "gdb",
            "useExtendedRemote": true,
            "miDebuggerPath": "${config:esp_idf_app_gdb}",
            "debugServerPath": "${config:esp_idf_openocd_path}/openocd",
            "windows" : {
                "miDebuggerPath": "${config:esp_idf_app_gdb}.exe",
                "debugServerPath": "${config:esp_idf_openocd_path}\\openocd.exe",
            },
            "miDebuggerServerAddress": ":3333",
            "debugServerArgs": "${config:esp_idf_openocd_config}",
            "filterStderr": true,
            "filterStdout": false,
            "launchCompleteCommand": "None",
            "setupCommands": [
                { "text": "set remotetimeout 10" },
            ],
            "postRemoteConnectCommands": [
                { "text": "mon reset halt" },
                { "text": "maintenance flush register-cache"},
            ],
            "stopAtConnect": false,
            "logging": {
                "exceptions": true,
                "engineLogging": false,
                "moduleLoad": false,
                "programOutput": false,
                "trace": true,
                "traceResponse": true
            },
        },

So, Please update your OpenOCD and share the logs again.

antoniovazquezblanco commented 5 months ago

I've been away for a while now. I had little to no time for this but this has not failed in the couple of tests I did since I've updated to the latest version and added the -c "adapter speed 5000" option. Adapter speed option seems crucial for correct operation. I will get back to this thread after I find some time to properly test this.

Thanks

LeoCMade commented 1 month ago

I have the same problem with a ESP32-S3-WROOM using the USB-Jtag interface. Espressif IDE 3 with IDF 5.2.2 but also tried the latest stable IDF 5.3.1. The result is the same. i tried changing many parameters without any change. I tried also with the hello world example project but openocd does not work.

pawel6843 commented 1 day ago

I confirm what user chconnor has written. His solution saves my project debug. :) Such situation happens with IDF 5.2.2 ESP32S3.

erhankur commented 13 hours ago

@pawel6843 We made significant size optimizations in the stub code itself. I’m curious, what is your OpenOCD version?

And is there a test applicaton to share with us? I can not still reproduce this error and unfortunately can't help.

pawel6843 commented 13 hours ago

The OpenOCD version I have been using is Open On-Chip Debugger v0.12.0-esp32-20240318 (2024-03-18-18:26). I do not have time right now to even read this whole thread. I just wanted to signal that there seems to be a problem that prevents debugging at all - until somone finds out chconnor's solution. And it is even then still seriously annoying that with big projects we need to load programs twice and switch. Because it was ok hmm before adding Bluetooth Mesh. And even if I would have time, I would have to prepare some another project for it, as I does not feel like I could share this, as it is for my employer.

espressif / openocd-esp32