VHDL target: compare parametric address to constants

[arnfol]

The vhdl code generated by corsair has ADDR_W generic defined, which allows alternating address width. When accessing a register, a comparison of addr is done to the constant of fixed width ADDR_W, like this:

csr_prediction_ren <= ren when (raddr = "000000000000") else '0'; -- 0x0

When I set ADDR_W to a lower value than the default in the parent entity, Vivado did not raise any error or warning, but in the resulting design register never worked and always returned OKAY read response with zeros as if it was an adress miss.

[arnfol]

So, I fixed the problem with ADDR_W but there is a similar problem with DATA_W. Unfortunately, I faced some ugly vhdl type conversions on the reset values, so I removed fixes for DATA_W.

I am not sure if we support or going to support not-32 data width. It could be beneficial to support 64-bit data bus, but I am quite sure that will involve much more changes. @esynr3z do you have any thoughts about it?