The gold standard is to trigger the IMU sampling with a PWM signal from the host computer. This will allow us to time stamp the data precisely on the external clock signal edge and synchronize it with respect to other sensors. Additionally, the sampling period is reduced from 1.22ms to 0.1ms!
On the breakout board we expose DIO4 to accept an external sampling clock. SMPL_PRD and GPIO_CTRL registers activate the external sampling clock (see datasheet, p. 6 and 18).
The goal is to implement a PWM on the host computer that triggers the IMU and a mechanism that associates trigger time stamp to data burst read.
The gold standard is to trigger the IMU sampling with a PWM signal from the host computer. This will allow us to time stamp the data precisely on the external clock signal edge and synchronize it with respect to other sensors. Additionally, the sampling period is reduced from 1.22ms to 0.1ms!
On the breakout board we expose DIO4 to accept an external sampling clock. SMPL_PRD and GPIO_CTRL registers activate the external sampling clock (see datasheet, p. 6 and 18).
The goal is to implement a PWM on the host computer that triggers the IMU and a mechanism that associates trigger time stamp to data burst read.
Additional ressources on such an implementation can be found in Bähnemann et al., Sec. 7.2, p. 1042.
This could be implemented after https://github.com/ethz-asl/mav_imu/issues/3