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eugene-tarassov / vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
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ZCU104: can't pass the synthesis #145

Open xinchen13 opened 1 year ago

xinchen13 commented 1 year ago

Hello, we find this repo helpful and we want to run Rocket and Gemmini on ZCU-104. I tried to modify the vivado project generated by:

make CONFIG=rocket64b1 BOARD=nexys-a7-100t bitstream

I followed the instructions in the issue #104 and tried:

  1. change the board_files from Nexys_A7_100T to Zynq UltraScale+ XCZU7EV-2FFVC1156 MPSoC
  2. change the ddr2 mig to ddr4 mig
  3. delete the xadc module
  4. modify the constraints.

However, these is only 6% of io resource utilized after the vivado synthesis, can I get some help? thank you.

eugene-tarassov commented 1 year ago

Why are you concerned about IO resource utilization? These RISC-V projects use very little of IO resources. 6% is about right.

xinchen13 commented 1 year ago

Sorry, I mean, the synthesis of Vivado passed while all other resources show a usage of 0%, including lut, lutram, bram and dsp. Vivado has not reported an error. Can you offer some ways to solve the problem or debug the project.

eugene-tarassov commented 1 year ago

I see. If you are looking at Post-Synthesis Utilization in the Project Summary, it shows only top module utilization, which is useless. To see all utilization numbers, click Report Utilization under Open Synthesized Design. But even that is only an estimate. To see real utilization you need to run implementation.

xinchen13 commented 1 year ago

Thanks, I'll try it.

Jerryy959 commented 2 months ago

Hello, we find this repo helpful and we want to run Rocket and Gemmini on ZCU-104. I tried to modify the vivado project generated by:

make CONFIG=rocket64b1 BOARD=nexys-a7-100t bitstream

I followed the instructions in the issue #104 and tried:

  1. change the board_files from Nexys_A7_100T to Zynq UltraScale+ XCZU7EV-2FFVC1156 MPSoC
  2. change the ddr2 mig to ddr4 mig
  3. delete the xadc module
  4. modify the constraints.

However, these is only 6% of io resource utilized after the vivado synthesis, can I get some help? thank you.

Hi, are you already running the repo on zcu104? I'm ready to boot rocketchip on my zcu102, can you share your changes based this pro.