eugene-tarassov / vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
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Adding custom module to the SoC #151

Open KostGeo opened 1 year ago

KostGeo commented 1 year ago

Hello there,

I have created a simple custom IP in HLS and added it to the IO block of your block design in Vivado. What are the next steps? I assume that I have to create a custom device driver for it and make it part of the kernel?

Thanks in advance! Kostas

eugene-tarassov commented 1 year ago

Either create a custom device driver and make it part of the kernel or use mmap function to map IP registers into your application address space and run the application as root.