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eugene-tarassov / vivado-risc-v

Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
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Verilator support #212

Open ncppd opened 6 months ago

ncppd commented 6 months ago

Hello Eugene,

since the maintainers of the Rocket Chip repository dropped support for Verilator, there is a gap between HW development and FPGA simulation (and of course debugging!). Do you consider adding support for Verilator in your repository? If not, how much effort do you think this could take?

Thanks! Nikos

eugene-tarassov commented 6 months ago

Verilator has plenty of limitations, it cannot handle mixed Verilog and VHDL designs, doesn't model X or Z states, etc. I don't plan adding support for Verilator. I don't know how much effort this could take - I never used Verilator before. I use Vivado to run simulations.