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eugene-tarassov
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vivado-risc-v
Xilinx Vivado block designs for FPGA RISC-V SoC running Debian Linux distro
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Fix for bootrom when working with a 32-bits Rocket core
#232
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cassebas
closed
3 weeks ago
cassebas
commented
3 weeks ago
In the download() function, some numbers were hardcoded. These numbers are now dependent on the __riscv_xlen value to account for the differences in the 32-/64-bits ELF formats.